Eugene Myers
3feb15e43e
Fix some concurrency problems with SMI handling while a VM/PE is being launched
2018-11-08 11:41:57 -05:00
Eugene Myers
a1346f9c73
Add CR handling and fix TR access bits
2018-11-07 15:38:25 -05:00
Eugene Myers
4483dfd90d
Fix a loop in SMI processing with a PE VM is being loaded
2018-11-05 16:33:13 -05:00
Eugene Myers
2068f5d2da
Fix VM/PE wrmsr/rdmsr parameter passing
2018-09-06 14:35:05 -04:00
Eugene Myers
73a3d2aca6
Intial Commit
2018-07-20 16:02:31 -04:00
Jiewen Yao
2696e3dc80
Update binary according to latest code.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:02:53 +08:00
Jiewen Yao
5fb1d10d98
Make SmMonitorService optional
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:02:15 +08:00
Jiewen Yao
fed93f2347
Sync SimpleSyncLib to EDKII.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:01:35 +08:00
Jiewen Yao
7ca2869b02
Enhance debug message in test FRM.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:54:18 +08:00
Jiewen Yao
f67a8a2ea1
Enhance debug message.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:54:06 +08:00
Jiewen Yao
3b0160622c
enable 1G paging for test FRM.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:53:37 +08:00
Jiewen Yao
ca0afe832d
Enable 1G paging.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:52:46 +08:00
Jiewen Yao
6ddc89f7e7
Fix guest XD enabling issue in test FRM.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:51:43 +08:00
Jiewen Yao
957328a129
Fix guest XD enabling issue. (more)
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:50:39 +08:00
Jiewen Yao
f1bb90b5d4
Fix guest XD enabling issue.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-24 09:54:05 +08:00
Jiewen Yao
94a1a06e2b
Add NOTE on how to enlarge STM heap.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 22:04:21 +08:00
Jiewen Yao
359e96d2c1
Add NOTE for AP handling,
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 22:02:10 +08:00
Jiewen Yao
763a620874
Make SmmMonitorService optional.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:45:13 +08:00
Jiewen Yao
25c4e6b9a5
Add DisableAp/EnableAp.
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to notify CPU driver on convert MONITOR wakeup to HLT wakeup.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:42:02 +08:00
Jiewen Yao
acbdef4d55
Support not SmMonitorServiceProtocol.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:38:10 +08:00
Jiewen Yao
5829c88ac5
Skip MSR 0x400000xx access.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:37:10 +08:00
Jiewen Yao
06960576d1
Support non-paging IA32 guest.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:36:37 +08:00
Jiewen Yao
58c6e9fa74
Fix AsmVmRead IA32.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:36:03 +08:00
Jiewen Yao
8ff8546ef5
Fix AsmVmRead IA32.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:35:51 +08:00
Jiewen Yao
62f54952a2
Fix display version.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:35:10 +08:00
Jiewen Yao
29f2ef94ef
Fix display version.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:34:42 +08:00
Jiewen Yao
aeee693e26
Add >4G memory map.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-08 12:59:17 +08:00
Jiewen Yao
2b5345f479
Add Microcode update handling.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-08 12:58:25 +08:00
Jiewen Yao
a0a6a1c031
Fix CPU number calculation in EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-09-22 15:00:05 +08:00
Jiewen Yao
2d49504a94
Add standalone STM hash record in PCR 0.
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So that STM hash can be known in non-TXT launch path.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-17 16:16:39 +08:00
Jiewen Yao
ac2a67c8b9
Sync latest data structure from MLE writer's guide.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-17 16:15:00 +08:00
Jiewen Yao
8e4c1267e2
Correct event log type.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-02 11:50:13 +08:00
Jiewen Yao
04074850f6
Add TXT launch support in FRM.
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Known limitation:
The FRM does not support S3, and FRM TXT support does not have a complete trusted boot chain.
The purpose of FrmPkg is to validate STM with or without TXT support.
Please do not include it in the production without full validation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-01 20:39:21 +08:00
Jiewen Yao
bce4120374
Add StmPlatformLib for special MSR access.
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A platform BIOS may need override StmPlatformLib to handle some special MSR access,
which must happen in VMX Root Mode if STM is enabled.
If so, this platform owner need override the StmPlatformLib in StmPkg.dsc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-01 16:52:50 +08:00
Jiewen Yao
0640726c01
Add license file.
2016-05-17 13:48:02 +08:00
Jiewen Yao
3da9a66044
Add STM, bios and test package.
2016-03-31 15:15:57 +08:00