coreboot-mirror
/
STM
mirror of https://review.coreboot.org/STM.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Fix guest XD enabling issue. 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Jiewen Yao 2016-11-24 09:54:05 +08:00
parent 94a1a06e2b
commit f1bb90b5d4
2 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Stm/StmPkg/Core/Init/VmcsInit.c
View File

@ -179,6 +179,8 @@ InitializeSmmVmcs (
// Upon receiving control due to an SMI, the STM shall save the contents of the IA32_PERF_GLOBAL_CTRL MSR, disable any
// enabled bits in the IA32_PERF_GLOBAL_CTRL MSR
VmEntryCtrls.Bits.LoadIA32_PERF_GLOBAL_CTRL = 0;
// Need load EFER to support guest enable XD
VmEntryCtrls.Bits.LoadIA32_EFER = 1;
Data64 = AsmReadMsr64 (IA32_VMX_EXIT_CTLS_MSR_INDEX);
VmExitCtrls.Uint32 = (UINT32)Data64 & (UINT32)RShiftU64 (Data64, 32);
@ -186,6 +188,8 @@ InitializeSmmVmcs (
// Upon receiving control due to an SMI, the STM shall save the contents of the IA32_PERF_GLOBAL_CTRL MSR, disable any
// enabled bits in the IA32_PERF_GLOBAL_CTRL MSR
VmExitCtrls.Bits.LoadIA32_PERF_GLOBAL_CTRL = 0;
// Need load EFER to support guest enable XD
VmExitCtrls.Bits.SaveIA32_EFER = 1;
GuestInterruptibilityState.Uint32 = 0;
GuestInterruptibilityState.Bits.BlockingBySmi = 1;

2
Stm/StmPkg/Core/Runtime/SmmMsrHandler.c
View File

@ -59,7 +59,7 @@ SmmReadMsrHandler (
switch (MsrIndex) {
case IA32_EFER_MSR_INDEX:
Data64 = mGuestContextCommonSmm.GuestContextPerCpu[Index].Efer;
Data64 = VmRead64 (VMCS_64_GUEST_IA32_EFER_INDEX);
break;
case IA32_SYSENTER_CS_MSR_INDEX: