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52 Commits

Author SHA1 Message Date
Eugene Myers 0a8d698e7b FIx a loop in the register dump 
The register dump would often go into an infinite loop.  This patch fixes that.
 2019-03-26 18:39:11 -04:00
Eugene Myers dcd4d97a0e Merge branch 'stmpe' of https://github.com/NationalSecurityAgency/STM-PE into stmpe 2018-12-17 15:17:34 -05:00
Eugene Myers 853f07f483 Initial distro 2018-12-17 15:16:59 -05:00
Eugene Myers 47770754f0 admin stuff removed 2018-12-17 14:55:00 -05:00
Eugene Myers 218141cbd0 vb stuff removed 2018-12-17 14:51:47 -05:00
Eugene Myers 774e187de1 Conf removed 2018-12-17 14:48:40 -05:00
Eugene Myers 8aa5602ff9 Update .gitignore 2018-12-17 14:39:04 -05:00
Eugene Myers 59c925dc7d minor edits 2018-12-17 14:37:45 -05:00
Eugene Myers 043734acef Update Readme.STMPE and fix stacktrace output 2018-12-14 11:40:12 -05:00
Eugene Myers c5bc79c3a7 add triple fault handler 2018-12-13 16:57:40 -05:00
Eugene Myers 9197b01ed8 Use virtual addressed for stack trace 
clean up some binary files as well
 2018-12-13 15:50:23 -05:00
Eugene Myers 6b0dbe55e1 Initial internal interrupt injection - page fault 
got page faults to work - still need to verify with actual guest IDT
 2018-12-13 14:15:30 -05:00
Eugene Myers 2cdfe88c33 First cut at stack trace 2018-12-07 11:34:59 -05:00
Eugene Myers 69eb78f6c8 fix .gitignore 2018-12-03 15:48:24 -05:00
Eugene Myers bb8f957c9f Added Readme.STMPE 
also removed a bunch of build files
 2018-12-03 14:29:33 -05:00
Eugene Myers 82bdf4ffa1 Add Legal Stuff 
legal stuff and minor editing
 2018-11-14 18:00:31 -05:00
Eugene Myers 3feb15e43e Fix some concurrency problems with SMI handling while a VM/PE is being launched 2018-11-08 11:41:57 -05:00
Eugene Myers a1346f9c73 Add CR handling and fix TR access bits 2018-11-07 15:38:25 -05:00
Eugene Myers 4483dfd90d Fix a loop in SMI processing with a PE VM is being loaded 2018-11-05 16:33:13 -05:00
Eugene Myers 2068f5d2da Fix VM/PE wrmsr/rdmsr parameter passing 2018-09-06 14:35:05 -04:00
Eugene Myers 73a3d2aca6 Intial Commit 2018-07-20 16:02:31 -04:00
Jiewen Yao 2696e3dc80 Update binary according to latest code. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 12:02:53 +08:00
Jiewen Yao 5fb1d10d98 Make SmMonitorService optional 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 12:02:15 +08:00
Jiewen Yao fed93f2347 Sync SimpleSyncLib to EDKII. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 12:01:35 +08:00
Jiewen Yao 7ca2869b02 Enhance debug message in test FRM. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:54:18 +08:00
Jiewen Yao f67a8a2ea1 Enhance debug message. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:54:06 +08:00
Jiewen Yao 3b0160622c enable 1G paging for test FRM. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:53:37 +08:00
Jiewen Yao ca0afe832d Enable 1G paging. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:52:46 +08:00
Jiewen Yao 6ddc89f7e7 Fix guest XD enabling issue in test FRM. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:51:43 +08:00
Jiewen Yao 957328a129 Fix guest XD enabling issue. (more) 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-12-14 10:50:39 +08:00
Jiewen Yao f1bb90b5d4 Fix guest XD enabling issue. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-11-24 09:54:05 +08:00
Jiewen Yao 94a1a06e2b Add NOTE on how to enlarge STM heap. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 22:04:21 +08:00
Jiewen Yao 359e96d2c1 Add NOTE for AP handling, 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 22:02:10 +08:00
Jiewen Yao 763a620874 Make SmmMonitorService optional. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:45:13 +08:00
Jiewen Yao 25c4e6b9a5 Add DisableAp/EnableAp. 
to notify CPU driver on convert MONITOR wakeup to HLT wakeup.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:42:02 +08:00
Jiewen Yao acbdef4d55 Support not SmMonitorServiceProtocol. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:38:10 +08:00
Jiewen Yao 5829c88ac5 Skip MSR 0x400000xx access. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:37:10 +08:00
Jiewen Yao 06960576d1 Support non-paging IA32 guest. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:36:37 +08:00
Jiewen Yao 58c6e9fa74 Fix AsmVmRead IA32. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:36:03 +08:00
Jiewen Yao 8ff8546ef5 Fix AsmVmRead IA32. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:35:51 +08:00
Jiewen Yao 62f54952a2 Fix display version. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:35:10 +08:00
Jiewen Yao 29f2ef94ef Fix display version. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-28 21:34:42 +08:00
Jiewen Yao aeee693e26 Add >4G memory map. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-08 12:59:17 +08:00
Jiewen Yao 2b5345f479 Add Microcode update handling. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-10-08 12:58:25 +08:00
Jiewen Yao a0a6a1c031 Fix CPU number calculation in EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-09-22 15:00:05 +08:00
Jiewen Yao 2d49504a94 Add standalone STM hash record in PCR 0. 
So that STM hash can be known in non-TXT launch path.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-08-17 16:16:39 +08:00
Jiewen Yao ac2a67c8b9 Sync latest data structure from MLE writer's guide. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-08-17 16:15:00 +08:00
Jiewen Yao 8e4c1267e2 Correct event log type. 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-08-02 11:50:13 +08:00
Jiewen Yao 04074850f6 Add TXT launch support in FRM. 
Known limitation:
The FRM does not support S3, and FRM TXT support does not have a complete trusted boot chain.
The purpose of FrmPkg is to validate STM with or without TXT support.
Please do not include it in the production without full validation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-08-01 20:39:21 +08:00
Jiewen Yao bce4120374 Add StmPlatformLib for special MSR access. 
A platform BIOS may need override StmPlatformLib to handle some special MSR access,
which must happen in VMX Root Mode if STM is enabled.
If so, this platform owner need override the StmPlatformLib in StmPkg.dsc.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
 2016-08-01 16:52:50 +08:00