mirror of https://review.coreboot.org/STM.git
Initial build for a new STM build using cmake and gnu
This commit is contained in:
parent
757a1c7aa7
commit
5b1df1b92b
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@ -0,0 +1,32 @@
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This is the initial release of the linux based build system for the STM.
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Any issues or suggestions please contact me via github.
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Steps for building:
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(1) Create a build directory in the Stm directory.
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(2) Inside the build directory issue "cmake .. " then make
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--> For coreboot do "cmake .. -DBIOS=coreboot" then make
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(3) The StmPkg/Core directory will contain the results of the build
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--> for coreboot move stm.bin to 3rdparty/blobs/cpu/intel/stm
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then configure the stm in the coreboot config menus
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rebuild by doing "make clean && make"
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Other files in the StmPkg directory:
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(1) Stm - an elf based load module, this is passed through
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objdump to produce stm.bin
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(2) stm.map - loader map
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Current issues:
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(1) When the coreboot smi handler is handling an SMI, the STM traps an
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attempted illegal access for address 0x177 when the smm_stub.S executes
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the fxsave instruction. This will be resolved in a future release.
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(2) The STM data areas need to be reorganized to better support D-RTM (or TXT)
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and STM teardown. This will be fixed in a future release.
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(3) Since this is an initial build of the STM via a different the user is cautioned
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about using this on a production system
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@ -3,7 +3,12 @@ cmake_minimum_required(VERSION 3.5)
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project(stm C ASM)
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project(stm C ASM)
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Os -Xlinker -Map=stm.map -s -pie --entry _ModuleEntryPoint -u _ModuleEntryPoint -nostdlib -n -z common-page-size=0x40 -fno-asynchronous-unwind-tables -fno-jump-tables -fPIC -fno-stack-protector -fno-stack-check -include PcdData.h -T ${PROJECT_SOURCE_DIR}/StmPkg/Core/Stm.lds")
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if("${BIOS}" STREQUAL "coreboot")
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add_definitions( -DCOREBOOT32 )
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message("Building for Coreboot")
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endif()
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Xlinker -Map=stm.map -Os -falign-functions -ffreestanding -s -pie --entry _ModuleEntryPoint -u _ModuleEntryPoint -nostdlib -n -z common-page-size=0x40 -fno-asynchronous-unwind-tables -fno-jump-tables -fPIC -fno-stack-protector -fno-stack-check -include PcdData.h -T ${PROJECT_SOURCE_DIR}/StmPkg/Core/Stm.lds")
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set(CMAKE_ASM_FLAGS "-include BaseAsm.h -fPIC")
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set(CMAKE_ASM_FLAGS "-include BaseAsm.h -fPIC")
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set(CMAKE_ASM_CREATE_SHARED_LIBRARY "gcc ${CFLAGS} -o *.o")
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set(CMAKE_ASM_CREATE_SHARED_LIBRARY "gcc ${CFLAGS} -o *.o")
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@ -14,7 +14,7 @@ add_custom_command(
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OUTPUT stm.tmp
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OUTPUT stm.tmp
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DEPENDS Stm
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DEPENDS Stm
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# POST_BUILD
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# POST_BUILD
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COMMAND ${CMAKE_OBJCOPY} Stm stm.tmp -O binary -S
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COMMAND ${CMAKE_OBJCOPY} Stm stm.tmp -O binary --strip-unneeded
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COMMAND ${CMAKE_COMMAND} -E copy stm.tmp stm.bin
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COMMAND ${CMAKE_COMMAND} -E copy stm.tmp stm.bin
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COMMENT "objcopy Stm to stm.bin"
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COMMENT "objcopy Stm to stm.bin"
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)
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)
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@ -15,7 +15,7 @@
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#include "StmInit.h"
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#include "StmInit.h"
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#include "PeStm.h"
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#include "PeStm.h"
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void HeapList(void);
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void HeapList(int id);
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//#define HEAPCHECK
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//#define HEAPCHECK
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/**
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/**
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@ -83,7 +83,7 @@ AllocatePages (
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DEBUG((EFI_D_ERROR, "AllocatePages(0x%x) fail - no freeblock of the correct size\n", Pages));
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DEBUG((EFI_D_ERROR, "AllocatePages(0x%x) fail - no freeblock of the correct size\n", Pages));
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#ifdef HEAPCHECK
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#ifdef HEAPCHECK
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// ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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// ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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HeapList();
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HeapList(1);
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#endif
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#endif
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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return NULL;
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return NULL;
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@ -130,10 +130,9 @@ AllocatePages (
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//Address = mHostContextCommon.HeapTop - STM_PAGES_TO_SIZE(Pages);
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//Address = mHostContextCommon.HeapTop - STM_PAGES_TO_SIZE(Pages);
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//mHostContextCommon.HeapTop = Address;
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//mHostContextCommon.HeapTop = Address;
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#ifdef HEAPCHECK
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#ifdef HEAPCHECK
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HeapList();
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HeapList(2);
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#endif
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#endif
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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ZeroMem ((VOID *)(UINTN)Address, STM_PAGES_TO_SIZE (Pages));
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ZeroMem ((VOID *)(UINTN)Address, STM_PAGES_TO_SIZE (Pages));
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#ifdef HEAPCHECK
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#ifdef HEAPCHECK
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DEBUG((EFI_D_ERROR, "****Allocating 0x%x pages at 0x%016llx - %d Cleared\n", Pages, Address, STM_PAGES_TO_SIZE (Pages)));
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DEBUG((EFI_D_ERROR, "****Allocating 0x%x pages at 0x%016llx - %d Cleared\n", Pages, Address, STM_PAGES_TO_SIZE (Pages)));
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@ -251,17 +250,17 @@ FreePages (
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// mHostContextCommon.HeapTop += STM_PAGES_TO_SIZE(Pages);
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// mHostContextCommon.HeapTop += STM_PAGES_TO_SIZE(Pages);
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// }
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// }
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#ifdef HEAPCHECK
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#ifdef HEAPCHECK
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HeapList();
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HeapList(3);
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#endif
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#endif
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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ReleaseSpinLock (&mHostContextCommon.MemoryLock);
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return ;
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return ;
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}
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}
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void HeapList(void)
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void HeapList(int id)
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{
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{
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HEAP_HEADER * CurrentBlock = (HEAP_HEADER *)(UINTN) mHostContextCommon.HeapFree;
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HEAP_HEADER * CurrentBlock = (HEAP_HEADER *)(UINTN) mHostContextCommon.HeapFree;
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DEBUG((EFI_D_ERROR, " ***HeapList Start***\n"));
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DEBUG((EFI_D_ERROR, " ***HeapList %d Start***\n", id));
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while(CurrentBlock != 0L)
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while(CurrentBlock != 0L)
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{
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{
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CurrentBlock = CurrentBlock->NextBlock;
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CurrentBlock = CurrentBlock->NextBlock;
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}
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}
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DEBUG((EFI_D_ERROR, " ***HeapList Done***\n"));
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DEBUG((EFI_D_ERROR, " ***HeapList %d Done***\n", id));
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}
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}
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@ -15,6 +15,8 @@
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#include "StmInit.h"
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#include "StmInit.h"
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#include <IndustryStandard/PeImage.h>
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#include <IndustryStandard/PeImage.h>
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#include <elf.h>
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/**
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/**
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This function relocate image at ImageBase.
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This function relocate image at ImageBase.
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@ -188,6 +190,53 @@ PeCoffRelocateImageOnTheSpot (
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}
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}
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}
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}
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// elf_process_reloc_table - a very simple relocation processor
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//
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// it does only X64 relative relocations -- others are flagged
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//
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// Parameters:
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// UINT64 BaseLocation - location of module im memory, in this case start of MSEG
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// UINT64 RelativeLocation - for setup - location of module in memory
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// for teardown - 0 - to reset values to make sinit happy
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//
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extern UINT64 _ElfRelocTablesEnd, _ElfRelocTablesStart;
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static int elf_process_reloc_table(UINT64 BaseLocation, UINT64 RelativeLocation ) {
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int size;
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int idx;
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Elf64_Rela * reloc_table = (Elf64_Rela *) ((UINT64)&_ElfRelocTablesStart + BaseLocation);
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DEBUG((EFI_D_INFO, "ELF Relocation in progress\n"));
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size = (UINT64)((UINT64)&_ElfRelocTablesEnd - (UINT64)&_ElfRelocTablesStart)/ sizeof(Elf64_Rela);
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DEBUG((EFI_D_INFO, "%d locations to be relocated\n", size));
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for(idx = 0; idx < size; idx++)
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{
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if(ELF64_R_TYPE(reloc_table->r_info) != R_X86_64_RELATIVE)
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{
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DEBUG((EFI_D_INFO, "WARNING only X86_64 relative relocations done\n"));
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}
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else
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{
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UINT64 * OFFSET = (UINT64*) (reloc_table[idx].r_offset + BaseLocation);
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*OFFSET = reloc_table[idx].r_addend + RelativeLocation;
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#ifdef PRINTRELOC
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DEBUG((EFI_D_INFO, "Relocation r_offset %x r_addend %x OFFSET %x *OFFSET %x\n",
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reloc_table[idx].r_offset,
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reloc_table[idx].r_addend,
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OFFSET,
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*OFFSET));
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#endif
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}
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}
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DEBUG((EFI_D_INFO, "ELF Relocation done\n"));
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return 0;
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}
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/**
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/**
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This function relocate this STM image.
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This function relocate this STM image.
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//
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//
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// Not a valid PE image so Exit
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// Not a valid PE image so Exit
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//
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//
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elf_process_reloc_table(StmImage, StmImage );
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return ;
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return ;
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}
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}
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@ -318,4 +368,4 @@ RelocateStmImage (
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}
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}
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return ;
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return ;
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}
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}
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@ -472,9 +472,13 @@ GetMinMsegSize (
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{
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{
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UINTN MinMsegSize;
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UINTN MinMsegSize;
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MinMsegSize = (STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
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//MinMsegSize = (STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
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/* we use the page table offset in this calculation because the static memory size does
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not account for the data and bss locations which come before the page tables and
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are cleared by sinit */
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MinMsegSize = StmHeader->HwStmHdr.Cr3Offset +
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StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
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StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
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(StmHeader->SwStmHdr.PerProcDynamicMemorySize + GetVmcsSize () * 2) * mHostContextCommon.CpuNum);
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((StmHeader->SwStmHdr.PerProcDynamicMemorySize + GetVmcsSize () * 2) * mHostContextCommon.CpuNum);
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return MinMsegSize;
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return MinMsegSize;
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}
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}
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@ -594,6 +598,10 @@ InitHeap (
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CpuDeadLoop ();
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CpuDeadLoop ();
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}
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}
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DEBUG ((EFI_D_INFO, "Cr30Offset - %08x\n", StmHeader->HwStmHdr.Cr3Offset));
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DEBUG ((EFI_D_INFO, "Page Table Start - %08x\n", MsegBase + StmHeader->HwStmHdr.Cr3Offset));
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// make sure that the tseg size was set correctly
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// make sure that the tseg size was set correctly
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// right now we will assume a max size of 3mb for mseg, bug, bug
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// right now we will assume a max size of 3mb for mseg, bug, bug
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@ -601,12 +609,9 @@ InitHeap (
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StmHeader->HwStmHdr.Cr3Offset +
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StmHeader->HwStmHdr.Cr3Offset +
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STM_PAGES_TO_SIZE(6)); // reserve 6 page for page table
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STM_PAGES_TO_SIZE(6)); // reserve 6 page for page table
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mHostContextCommon.HeapTop = MsegBase + MsegLength;
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#ifdef SizeFromLoad
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mHostContextCommon.HeapTop = (UINT64)((UINTN)StmHeader +
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mHostContextCommon.HeapTop = (UINT64)((UINTN)StmHeader +
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STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
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STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
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StmHeader->SwStmHdr.AdditionalDynamicMemorySize);
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StmHeader->SwStmHdr.AdditionalDynamicMemorySize);
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#endif
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mHostContextCommon.HeapFree = mHostContextCommon.HeapBottom;
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mHostContextCommon.HeapFree = mHostContextCommon.HeapBottom;
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HeaderPointer = (HEAP_HEADER *)((UINTN) mHostContextCommon.HeapFree);
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HeaderPointer = (HEAP_HEADER *)((UINTN) mHostContextCommon.HeapFree);
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@ -631,6 +636,8 @@ InitBasicContext (
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mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu = AllocatePages (STM_SIZE_TO_PAGES(sizeof(STM_GUEST_CONTEXT_PER_CPU)) * mHostContextCommon.CpuNum);
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mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu = AllocatePages (STM_SIZE_TO_PAGES(sizeof(STM_GUEST_CONTEXT_PER_CPU)) * mHostContextCommon.CpuNum);
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}
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}
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extern void GetMtrr(); // found in eptinit.c...
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/**
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/**
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This function initialize BSP.
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This function initialize BSP.
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@ -653,20 +660,26 @@ BspInit (
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UINTN XStateSize;
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UINTN XStateSize;
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UINT32 RegEax;
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UINT32 RegEax;
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IA32_VMX_MISC_MSR VmxMisc;
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IA32_VMX_MISC_MSR VmxMisc;
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UINT32 BiosStmVer = 100; // initially assume that the BIOS supports v1.0 of the Intel ref
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UINT32 BiosStmVer = 100; // initially assume that the BIOS supports v1.0 of the Intel ref
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IA32_DESCRIPTOR IdtrLoad;
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IA32_DESCRIPTOR IdtrLoad;
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GetMtrr(); //Needed in various inits
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AsmWbinvd(); // make sure it gets out
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StmHeader = (STM_HEADER *)(UINTN)((UINT32)AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX) & 0xFFFFF000);
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StmHeader = (STM_HEADER *)(UINTN)((UINT32)AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX) & 0xFFFFF000);
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// on a platform that does not start with TXT, cannot assume the data space has been set to zero
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// on a platform that does not start with TXT, cannot assume the data space has been set to zero
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ZeroMem(&mHostContextCommon, sizeof(STM_HOST_CONTEXT_COMMON));
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ZeroMem(&mHostContextCommon, sizeof(STM_HOST_CONTEXT_COMMON));
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ZeroMem(&mGuestContextCommonSmi, sizeof(STM_HOST_CONTEXT_COMMON));
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ZeroMem(&mGuestContextCommonSmm, sizeof(STM_HOST_CONTEXT_COMMON) * NUM_PE_TYPE);
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InitHeap (StmHeader);
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InitHeap (StmHeader);
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// after that we can use mHostContextCommon
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// after that we can use mHostContextCommon
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InitializeSpinLock (&mHostContextCommon.DebugLock);
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InitializeSpinLock (&mHostContextCommon.DebugLock);
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// after that we can use DEBUG
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// after that we can use DEBUG
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DEBUG ((EFI_D_ERROR, " ********************** STM/PE *********************\n"));
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DEBUG ((EFI_D_INFO, " ********************** STM/PE *********************\n"));
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DEBUG ((EFI_D_INFO, "!!!STM build time - %a %a!!!\n", (CHAR8 *)__DATE__, (CHAR8 *)__TIME__));
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DEBUG ((EFI_D_INFO, "!!!STM build time - %a %a!!!\n", (CHAR8 *)__DATE__, (CHAR8 *)__TIME__));
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DEBUG ((EFI_D_INFO, "!!!STM Relocation DONE!!!\n"));
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DEBUG ((EFI_D_INFO, "!!!STM Relocation DONE!!!\n"));
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DEBUG ((EFI_D_INFO, "!!!Enter StmInit (BSP)!!! - %d (%x)\n", (UINTN)0, (UINTN)ReadUnaligned32 ((UINT32 *)&Register->Rax)));
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DEBUG ((EFI_D_INFO, "!!!Enter StmInit (BSP)!!! - %d (%x)\n", (UINTN)0, (UINTN)ReadUnaligned32 ((UINT32 *)&Register->Rax)));
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@ -736,7 +749,7 @@ BspInit (
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EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
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EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
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EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
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EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
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mHostContextCommon.AcpiRsdp = TxtProcessorSmmDescriptor->AcpiRsdp;
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mHostContextCommon.AcpiRsdp = TxtProcessorSmmDescriptor->AcpiRsdp;
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Rsdp = FindAcpiRsdPtr ();
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Rsdp = FindAcpiRsdPtr ();
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DEBUG ((EFI_D_INFO, "Rsdp - %08x\n", Rsdp));
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DEBUG ((EFI_D_INFO, "Rsdp - %08x\n", Rsdp));
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if (Rsdp == NULL) {
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if (Rsdp == NULL) {
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@ -781,7 +794,7 @@ BspInit (
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DEBUG ((EFI_D_INFO, "TXT Descriptor Signature ERROR - %016lx!\n", TxtProcessorSmmDescriptor->Signature));
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DEBUG ((EFI_D_INFO, "TXT Descriptor Signature ERROR - %016lx!\n", TxtProcessorSmmDescriptor->Signature));
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CpuDeadLoop ();
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CpuDeadLoop ();
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}
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}
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if(TxtProcessorSmmDescriptor->Size != sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) + 9) // are we dealing with a .99 Bios
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if(TxtProcessorSmmDescriptor->Size == sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) - 9) // are we dealing with a .99 Bios
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{
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{
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BiosStmVer = 99; // version .99 has nine less bytes, etc
|
BiosStmVer = 99; // version .99 has nine less bytes, etc
|
||||||
DEBUG((EFI_D_INFO, "Version .99 Bios detected Found Size: %08x SizeOf %08x\n", TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR)));
|
DEBUG((EFI_D_INFO, "Version .99 Bios detected Found Size: %08x SizeOf %08x\n", TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR)));
|
||||||
|
@ -830,7 +843,22 @@ BspInit (
|
||||||
// Check MSEG BASE/SIZE in TXT region
|
// Check MSEG BASE/SIZE in TXT region
|
||||||
//
|
//
|
||||||
mHostContextCommon.StmSize = GetMinMsegSize (StmHeader);
|
mHostContextCommon.StmSize = GetMinMsegSize (StmHeader);
|
||||||
DEBUG ((EFI_D_INFO, "MinMsegSize - %08x!\n", (UINTN)mHostContextCommon.StmSize));
|
{
|
||||||
|
UINT64 MsegBase, MsegLength;
|
||||||
|
INT32 AvailMseg;
|
||||||
|
|
||||||
|
if (IsSentryEnabled()) {
|
||||||
|
GetMsegInfoFromTxt (&MsegBase, &MsegLength);
|
||||||
|
} else {
|
||||||
|
GetMsegInfoFromMsr (&MsegBase, &MsegLength);
|
||||||
|
}
|
||||||
|
AvailMseg = MsegLength - mHostContextCommon.StmSize;
|
||||||
|
|
||||||
|
DEBUG ((EFI_D_INFO, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n",
|
||||||
|
(UINTN)mHostContextCommon.StmSize,
|
||||||
|
MsegLength,
|
||||||
|
AvailMseg));
|
||||||
|
}
|
||||||
|
|
||||||
if(BiosStmVer == 99)
|
if(BiosStmVer == 99)
|
||||||
{
|
{
|
||||||
|
@ -974,6 +1002,7 @@ BspInit (
|
||||||
//
|
//
|
||||||
// Initialization done
|
// Initialization done
|
||||||
//
|
//
|
||||||
|
|
||||||
mIsBspInitialized = TRUE;
|
mIsBspInitialized = TRUE;
|
||||||
AsmWbinvd (); // let everyone else know
|
AsmWbinvd (); // let everyone else know
|
||||||
return ;
|
return ;
|
||||||
|
@ -995,6 +1024,7 @@ ApInit (
|
||||||
{
|
{
|
||||||
X86_REGISTER *Reg;
|
X86_REGISTER *Reg;
|
||||||
IA32_DESCRIPTOR IdtrLoad;
|
IA32_DESCRIPTOR IdtrLoad;
|
||||||
|
|
||||||
while (!mIsBspInitialized) {
|
while (!mIsBspInitialized) {
|
||||||
//
|
//
|
||||||
// Wait here
|
// Wait here
|
||||||
|
@ -1095,15 +1125,17 @@ VmcsInit (
|
||||||
IN UINT32 Index
|
IN UINT32 Index
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
UINT64 CurrentVmcs;
|
UINT64 CurrentVmcs;
|
||||||
UINTN VmcsBase;
|
UINTN VmcsBase;
|
||||||
UINT32 VmcsSize;
|
UINT32 VmcsSize;
|
||||||
STM_HEADER *StmHeader;
|
STM_HEADER *StmHeader;
|
||||||
UINTN Rflags;
|
UINTN Rflags;
|
||||||
|
|
||||||
StmHeader = mHostContextCommon.StmHeader;
|
StmHeader = mHostContextCommon.StmHeader;
|
||||||
|
/* have to use Cr3Offset because StaticImageSize ignores BSS and Data sections */
|
||||||
VmcsBase = (UINTN)StmHeader +
|
VmcsBase = (UINTN)StmHeader +
|
||||||
STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
|
//STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
|
||||||
|
StmHeader->HwStmHdr.Cr3Offset +
|
||||||
StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
|
StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
|
||||||
StmHeader->SwStmHdr.PerProcDynamicMemorySize * mHostContextCommon.CpuNum;
|
StmHeader->SwStmHdr.PerProcDynamicMemorySize * mHostContextCommon.CpuNum;
|
||||||
VmcsSize = GetVmcsSize();
|
VmcsSize = GetVmcsSize();
|
||||||
|
@ -1115,10 +1147,11 @@ VmcsInit (
|
||||||
DEBUG ((EFI_D_INFO, "%d SmmVmcsPtr - %016lx\n", (UINTN)Index, mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Vmcs));
|
DEBUG ((EFI_D_INFO, "%d SmmVmcsPtr - %016lx\n", (UINTN)Index, mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Vmcs));
|
||||||
|
|
||||||
AsmVmPtrStore (&CurrentVmcs);
|
AsmVmPtrStore (&CurrentVmcs);
|
||||||
DEBUG ((EFI_D_INFO, "%d CurrentVmcs - %016lx\n", (UINTN)Index, CurrentVmcs));
|
DEBUG ((EFI_D_INFO, "%d CurrentVmcs - %016lx VmcsSize %x\n", (UINTN)Index, CurrentVmcs, VmcsSize));
|
||||||
if (IsOverlap (CurrentVmcs, VmcsSize, mHostContextCommon.TsegBase, mHostContextCommon.TsegLength)) {
|
if (IsOverlap (CurrentVmcs, VmcsSize, mHostContextCommon.TsegBase, mHostContextCommon.TsegLength)) {
|
||||||
// Overlap TSEG
|
// Overlap TSEG
|
||||||
DEBUG ((EFI_D_ERROR, "%d CurrentVmcs violation - %016lx\n", (UINTN)Index, CurrentVmcs));
|
DEBUG ((EFI_D_ERROR, "%d CurrentVmcs violation - %016lx\n", (UINTN)Index, CurrentVmcs));
|
||||||
|
DumpVmcsAllField();
|
||||||
CpuDeadLoop() ;
|
CpuDeadLoop() ;
|
||||||
}
|
}
|
||||||
Rflags = AsmVmClear (&CurrentVmcs);
|
Rflags = AsmVmClear (&CurrentVmcs);
|
||||||
|
@ -1236,7 +1269,6 @@ LaunchBack (
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
extern void GetMtrr(); // found in eptinit.c...
|
|
||||||
extern void PrintSmiEnRegister(UINT32 Index); // found in PcPciHandler.c
|
extern void PrintSmiEnRegister(UINT32 Index); // found in PcPciHandler.c
|
||||||
VOID
|
VOID
|
||||||
InitializeSmmMonitor (
|
InitializeSmmMonitor (
|
||||||
|
@ -1245,28 +1277,25 @@ InitializeSmmMonitor (
|
||||||
{
|
{
|
||||||
UINT32 Index;
|
UINT32 Index;
|
||||||
|
|
||||||
GetMtrr(); //Needed in various inits
|
|
||||||
AsmWbinvd(); // make sure it gets out
|
|
||||||
|
|
||||||
Index = GetIndexFromStack (Register);
|
Index = GetIndexFromStack (Register);
|
||||||
if (Index == 0) {
|
if (Index == 0) {
|
||||||
// The build process should make sure "virtual address" is same as "file pointer to raw data",
|
// The build process should make sure "virtual address" is same as "file pointer to raw data",
|
||||||
// in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
|
// in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
|
||||||
// If no, GenStm tool will "load image". So here, we just need "relocate image"
|
// If no, GenStm tool will "load image". So here, we just need "relocate image"
|
||||||
RelocateStmImage (FALSE);
|
RelocateStmImage (FALSE);
|
||||||
|
|
||||||
BspInit (Register);
|
BspInit (Register);
|
||||||
} else {
|
} else {
|
||||||
Index = GetIndexFromStack (Register);
|
Index = GetIndexFromStack (Register);
|
||||||
ApInit (Index, Register);
|
ApInit (Index, Register);
|
||||||
}
|
}
|
||||||
//PrintSmiEnRegister(Index); /* debug*/
|
//PrintSmiEnRegister(Index); /* debug*/
|
||||||
|
|
||||||
CommonInit (Index);
|
CommonInit (Index);
|
||||||
|
|
||||||
VmcsInit (Index);
|
VmcsInit (Index);
|
||||||
//
|
//
|
||||||
PrintSmiEnRegister(Index); /* DEBUG*/
|
PrintSmiEnRegister(Index); /* DEBUG*/
|
||||||
AsmWbinvd(); // flush caches
|
AsmWbinvd(); // flush caches
|
||||||
LaunchBack (Index);
|
LaunchBack (Index);
|
||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
|
|
|
@ -189,7 +189,8 @@ InitializeSmmVmcs (
|
||||||
Data64 = AsmReadMsr64 (IA32_VMX_ENTRY_CTLS_MSR_INDEX);
|
Data64 = AsmReadMsr64 (IA32_VMX_ENTRY_CTLS_MSR_INDEX);
|
||||||
VmEntryCtrls.Uint32 = (UINT32)Data64 & (UINT32)RShiftU64 (Data64, 32);
|
VmEntryCtrls.Uint32 = (UINT32)Data64 & (UINT32)RShiftU64 (Data64, 32);
|
||||||
VmEntryCtrls.Bits.Ia32eGuest = mHostContextCommon.HostContextPerCpu[Index].TxtProcessorSmmDescriptor->SmmEntryState.Intel64Mode;
|
VmEntryCtrls.Bits.Ia32eGuest = mHostContextCommon.HostContextPerCpu[Index].TxtProcessorSmmDescriptor->SmmEntryState.Intel64Mode;
|
||||||
#ifdef COREBOOT32
|
#if defined(COREBOOT32)
|
||||||
|
DEBUG((EFI_D_INFO, "Setting up SMI Handler for 32 bit mode\n"));
|
||||||
mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Efer = 0;//mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Efer & (~((1 << 9) & (1 << 10))); // turn off IA32 bits // need to find the proper defines
|
mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Efer = 0;//mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Efer & (~((1 << 9) & (1 << 10))); // turn off IA32 bits // need to find the proper defines
|
||||||
#endif
|
#endif
|
||||||
VmEntryCtrls.Bits.EntryToSmm = 1;
|
VmEntryCtrls.Bits.EntryToSmm = 1;
|
||||||
|
@ -295,7 +296,7 @@ InitializeSmmVmcs (
|
||||||
VmWriteN (VMCS_N_GUEST_CR4_INDEX, VmReadN(VMCS_N_GUEST_CR4_INDEX) | CR4_PSE);
|
VmWriteN (VMCS_N_GUEST_CR4_INDEX, VmReadN(VMCS_N_GUEST_CR4_INDEX) | CR4_PSE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#ifdef COREBOOT32 // coreboot support
|
#if defined(COREBOOT32) // coreboot support
|
||||||
#define CR0_CLEAR_FLAGS CR0_CD|CR0_NW|CR0_PG|CR0_WP|CR0_NE|CR0_TS
|
#define CR0_CLEAR_FLAGS CR0_CD|CR0_NW|CR0_PG|CR0_WP|CR0_NE|CR0_TS
|
||||||
VmWriteN (VMCS_N_GUEST_CR0_INDEX, ((VmReadN(VMCS_N_GUEST_CR0_INDEX) & ~(CR0_PG)) | CR0_PE ));
|
VmWriteN (VMCS_N_GUEST_CR0_INDEX, ((VmReadN(VMCS_N_GUEST_CR0_INDEX) & ~(CR0_PG)) | CR0_PE ));
|
||||||
VmWriteN (VMCS_N_GUEST_CR4_INDEX, (VmReadN(VMCS_N_GUEST_CR4_INDEX) | CR4_PAE)); // must be set because host address size vmexit control is 1
|
VmWriteN (VMCS_N_GUEST_CR4_INDEX, (VmReadN(VMCS_N_GUEST_CR4_INDEX) | CR4_PAE)); // must be set because host address size vmexit control is 1
|
||||||
|
|
|
@ -21,8 +21,9 @@ ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
|
||||||
.equ STM_API_START, 0x00010001
|
.equ STM_API_START, 0x00010001
|
||||||
.equ STM_API_INITIALIZE_PROTECTION, 0x00010007
|
.equ STM_API_INITIALIZE_PROTECTION, 0x00010007
|
||||||
|
|
||||||
.equ STM_STACK_SIZE, 0x020000
|
.equ STM_STACK_SIZE, 0x8000
|
||||||
|
|
||||||
|
.align 16
|
||||||
#------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------
|
||||||
# VOID
|
# VOID
|
||||||
# AsmInitializeSmmMonitor (
|
# AsmInitializeSmmMonitor (
|
||||||
|
@ -40,12 +41,16 @@ GoBsp:
|
||||||
# ESP is pointer to stack bottom, NOT top
|
# ESP is pointer to stack bottom, NOT top
|
||||||
movl $STM_STACK_SIZE, %eax # eax = STM_STACK_SIZE,
|
movl $STM_STACK_SIZE, %eax # eax = STM_STACK_SIZE,
|
||||||
lock xaddl %eax, (%esp) # eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
lock xaddl %eax, (%esp) # eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
||||||
|
|
||||||
addl $STM_STACK_SIZE, %eax # eax = ThisOffset + STM_STACK_SIZE
|
addl $STM_STACK_SIZE, %eax # eax = ThisOffset + STM_STACK_SIZE
|
||||||
addl %eax, %esp # esp += ThisOffset + STM_STACK_SIZE
|
addl %eax, %esp # esp += ThisOffset + STM_STACK_SIZE
|
||||||
|
|
||||||
#
|
#
|
||||||
# Jump to C code
|
# Jump to C code
|
||||||
#
|
#
|
||||||
|
subq $512, %rsp
|
||||||
|
fxsave (%rsp)
|
||||||
|
|
||||||
push %r15
|
push %r15
|
||||||
push %r14
|
push %r14
|
||||||
push %r13
|
push %r13
|
||||||
|
@ -63,10 +68,11 @@ GoBsp:
|
||||||
push %rcx
|
push %rcx
|
||||||
movl $STM_API_INITIALIZE_PROTECTION, %eax
|
movl $STM_API_INITIALIZE_PROTECTION, %eax
|
||||||
push %rax
|
push %rax
|
||||||
movq %rsp, %rcx # parameter
|
movq %rsp, %rcx # parameter 1 for MS
|
||||||
subq $0x20, %rsp
|
movq %rsp, %rdi # parameter 1 for GNU
|
||||||
|
subq $0x30, %rsp
|
||||||
call ASM_PFX(InitializeSmmMonitor)
|
call ASM_PFX(InitializeSmmMonitor)
|
||||||
addq $0x20, %rsp
|
addq $0x30, %rsp
|
||||||
# should never get here
|
# should never get here
|
||||||
jmp DeadLoop
|
jmp DeadLoop
|
||||||
|
|
||||||
|
@ -87,12 +93,17 @@ GoAp:
|
||||||
# ESP is pointer to stack bottom, NOT top
|
# ESP is pointer to stack bottom, NOT top
|
||||||
movl $STM_STACK_SIZE, %eax # eax = STM_STACK_SIZE,
|
movl $STM_STACK_SIZE, %eax # eax = STM_STACK_SIZE,
|
||||||
lock xaddl %eax, (%esp) # eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
lock xaddl %eax, (%esp) # eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
||||||
|
|
||||||
addl $STM_STACK_SIZE, %eax # eax = ThisOffset + STM_STACK_SIZE
|
addl $STM_STACK_SIZE, %eax # eax = ThisOffset + STM_STACK_SIZE
|
||||||
addl %eax, %esp # esp += ThisOffset + STM_STACK_SIZE
|
addl %eax, %esp # esp += ThisOffset + STM_STACK_SIZE
|
||||||
|
|
||||||
#
|
#
|
||||||
# Jump to C code
|
# Jump to C code
|
||||||
#
|
#
|
||||||
|
|
||||||
|
subq $512, %rsp
|
||||||
|
fxsave (%rsp)
|
||||||
|
|
||||||
push %r15
|
push %r15
|
||||||
push %r14
|
push %r14
|
||||||
push %r13
|
push %r13
|
||||||
|
@ -110,10 +121,11 @@ GoAp:
|
||||||
push %rcx
|
push %rcx
|
||||||
movl $STM_API_START, %eax
|
movl $STM_API_START, %eax
|
||||||
push %rax
|
push %rax
|
||||||
movq %rsp, %rcx # parameter
|
movq %rsp, %rcx # parameter #1 for MS
|
||||||
subq $0x20, %rsp
|
movq %rsp, %rdi # parameter #1 for GNU
|
||||||
|
subq $0x30, %rsp
|
||||||
call ASM_PFX(InitializeSmmMonitor)
|
call ASM_PFX(InitializeSmmMonitor)
|
||||||
addq $0x20, %rsp
|
addq $0x30, %rsp
|
||||||
# should never get here
|
# should never get here
|
||||||
DeadLoop:
|
DeadLoop:
|
||||||
jmp .
|
jmp .
|
||||||
|
|
|
@ -42,6 +42,7 @@ GoBsp:
|
||||||
; ESP is pointer to stack bottom, NOT top
|
; ESP is pointer to stack bottom, NOT top
|
||||||
mov eax, STM_STACK_SIZE ; eax = STM_STACK_SIZE,
|
mov eax, STM_STACK_SIZE ; eax = STM_STACK_SIZE,
|
||||||
lock xadd [esp], eax ; eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
lock xadd [esp], eax ; eax = ThisOffset, ThisOffset += STM_STACK_SIZE (LOCK instruction)
|
||||||
|
|
||||||
add eax, STM_STACK_SIZE ; eax = ThisOffset + STM_STACK_SIZE
|
add eax, STM_STACK_SIZE ; eax = ThisOffset + STM_STACK_SIZE
|
||||||
add esp, eax ; esp += ThisOffset + STM_STACK_SIZE
|
add esp, eax ; esp += ThisOffset + STM_STACK_SIZE
|
||||||
|
|
||||||
|
|
|
@ -21,7 +21,7 @@ ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
|
||||||
.equ STM_API_START, 0x00010001
|
.equ STM_API_START, 0x00010001
|
||||||
.equ STM_API_INITIALIZE_PROTECTION, 0x00010007
|
.equ STM_API_INITIALIZE_PROTECTION, 0x00010007
|
||||||
|
|
||||||
.equ STM_STACK_SIZE, 0x020000
|
.equ STM_STACK_SIZE, 0x8000
|
||||||
|
|
||||||
#------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------
|
||||||
# VOID
|
# VOID
|
||||||
|
|
|
@ -123,23 +123,26 @@ VOID
|
||||||
Register->Rsp = VmReadN (VMCS_N_GUEST_RSP_INDEX);
|
Register->Rsp = VmReadN (VMCS_N_GUEST_RSP_INDEX);
|
||||||
CopyMem (Reg, Register, sizeof(X86_REGISTER));
|
CopyMem (Reg, Register, sizeof(X86_REGISTER));
|
||||||
#if 0
|
#if 0
|
||||||
DEBUG ((EFI_D_INFO, "%ld - !!!StmHandlerSmi\n", (UINTN)Index));
|
DEBUG ((EFI_D_INFO, "%ld - !!!StmHandlerSmi InfoBasic %x reason %x \n",
|
||||||
|
(UINTN)Index,
|
||||||
|
InfoBasic.Uint32,
|
||||||
|
InfoBasic.Bits.Reason));
|
||||||
#endif
|
#endif
|
||||||
//
|
//
|
||||||
// Dispatch
|
// Dispatch
|
||||||
//
|
//
|
||||||
if (InfoBasic.Bits.Reason >= VmExitReasonMax) {
|
if (InfoBasic.Bits.Reason >= VmExitReasonMax) {
|
||||||
DEBUG ((EFI_D_ERROR, "!!!UnknownReason!!!\n"));
|
DEBUG ((EFI_D_ERROR, "%ld !!!UnknownReason: %d!!!\n", Index, InfoBasic.Bits.Reason));
|
||||||
DumpVmcsAllField ();
|
DumpVmcsAllField ();
|
||||||
|
|
||||||
CpuDeadLoop ();
|
CpuDeadLoop ();
|
||||||
}
|
}
|
||||||
|
|
||||||
mGuestContextCommonSmi.GuestContextPerCpu[Index].InfoBasic.Uint32 = InfoBasic.Uint32;
|
mGuestContextCommonSmi.GuestContextPerCpu[Index].InfoBasic.Uint32 = InfoBasic.Uint32;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Call dispatch handler
|
// Call dispatch handler
|
||||||
//
|
//
|
||||||
|
|
||||||
mStmHandlerSmi[InfoBasic.Bits.Reason] (Index);
|
mStmHandlerSmi[InfoBasic.Bits.Reason] (Index);
|
||||||
|
|
||||||
VmWriteN (VMCS_N_GUEST_RSP_INDEX, Reg->Rsp); // sync RSP
|
VmWriteN (VMCS_N_GUEST_RSP_INDEX, Reg->Rsp); // sync RSP
|
||||||
|
|
|
@ -285,7 +285,6 @@ SmiVmcallGetBiosResourcesHandler (
|
||||||
UINTN BiosResourceSize;
|
UINTN BiosResourceSize;
|
||||||
UINT32 PageNum;
|
UINT32 PageNum;
|
||||||
X86_REGISTER *Reg;
|
X86_REGISTER *Reg;
|
||||||
|
|
||||||
Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
|
Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
|
||||||
|
|
||||||
// ECX:EBX - STM_RESOURCE_LIST
|
// ECX:EBX - STM_RESOURCE_LIST
|
||||||
|
@ -939,10 +938,10 @@ STM_VMCALL_HANDLER_STRUCT mSmiVmcallHandler[] = {
|
||||||
{STM_API_MANAGE_VMCS_DATABASE, SmiVmcallManageVmcsDatabaseHandler},
|
{STM_API_MANAGE_VMCS_DATABASE, SmiVmcallManageVmcsDatabaseHandler},
|
||||||
{STM_API_INITIALIZE_PROTECTION, SmiVmcallInitializeProtectionHandler},
|
{STM_API_INITIALIZE_PROTECTION, SmiVmcallInitializeProtectionHandler},
|
||||||
{STM_API_MANAGE_EVENT_LOG, SmiVmcallManageEventLogHandler},
|
{STM_API_MANAGE_EVENT_LOG, SmiVmcallManageEventLogHandler},
|
||||||
{STM_API_ADD_TEMP_PE_VM, SmiVmcallAddTempPeVmHandler},
|
{STM_API_ADD_TEMP_PE_VM, SmiVmcallAddTempPeVmHandler},
|
||||||
{STM_API_ADD_PERM_PE_VM, SmiVmcallAddPermPeVmHandler},
|
{STM_API_ADD_PERM_PE_VM, SmiVmcallAddPermPeVmHandler},
|
||||||
{STM_API_ADD_PERM_PE_VM_NORUN, SmiVmcallAddPermPeVmNoRunHandler},
|
{STM_API_ADD_PERM_PE_VM_NORUN, SmiVmcallAddPermPeVmNoRunHandler},
|
||||||
{STM_API_RUN_PE_VM, SmiVmcallRunPeVmHandler},
|
{STM_API_RUN_PE_VM, SmiVmcallRunPeVmHandler},
|
||||||
{STM_API_END_ADD_PERM_PE_VM, SmiVmcallEndPermVmHandler}
|
{STM_API_END_ADD_PERM_PE_VM, SmiVmcallEndPermVmHandler}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -985,9 +984,9 @@ SmiVmcallHandler (
|
||||||
STM_STATUS Status;
|
STM_STATUS Status;
|
||||||
STM_VMCALL_HANDLER StmVmcallHandler;
|
STM_VMCALL_HANDLER StmVmcallHandler;
|
||||||
UINT64 AddressParameter;
|
UINT64 AddressParameter;
|
||||||
|
//DEBUG((EFI_D_ERROR, "%ld SmiVmcallHandler - entereda\n", Index));
|
||||||
|
|
||||||
Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
|
Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
|
||||||
//DEBUG((EFI_D_ERROR, "%ld SmiVmcallHandler - entered\n", Index));
|
|
||||||
StmVmcallHandler = GetSmiVmcallHandlerByIndex (ReadUnaligned32 ((UINT32 *)&Reg->Rax));
|
StmVmcallHandler = GetSmiVmcallHandlerByIndex (ReadUnaligned32 ((UINT32 *)&Reg->Rax));
|
||||||
if (StmVmcallHandler == NULL) {
|
if (StmVmcallHandler == NULL) {
|
||||||
DEBUG ((EFI_D_INFO, "%ld SmiVmcallHandler - GetSmiVmcallHandlerByIndex- Invalid API entry - %x!\n", Index, (UINTN)ReadUnaligned32 ((UINT32 *)&Reg->Rax)));
|
DEBUG ((EFI_D_INFO, "%ld SmiVmcallHandler - GetSmiVmcallHandlerByIndex- Invalid API entry - %x!\n", Index, (UINTN)ReadUnaligned32 ((UINT32 *)&Reg->Rax)));
|
||||||
|
@ -999,8 +998,8 @@ SmiVmcallHandler (
|
||||||
Status = ERROR_INVALID_API;
|
Status = ERROR_INVALID_API;
|
||||||
} else {
|
} else {
|
||||||
AddressParameter = ReadUnaligned32 ((UINT32 *)&Reg->Rbx) + LShiftU64 (ReadUnaligned32 ((UINT32 *)&Reg->Rcx), 32);
|
AddressParameter = ReadUnaligned32 ((UINT32 *)&Reg->Rbx) + LShiftU64 (ReadUnaligned32 ((UINT32 *)&Reg->Rcx), 32);
|
||||||
|
|
||||||
Status = StmVmcallHandler (Index, AddressParameter);
|
Status = StmVmcallHandler (Index, AddressParameter);
|
||||||
DEBUG((EFI_D_ERROR, "%ld SmiVmcallHandler done, Status: %x\n", Index, Status));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Status == STM_SUCCESS) {
|
if (Status == STM_SUCCESS) {
|
||||||
|
|
|
@ -316,6 +316,7 @@ L1:
|
||||||
|
|
||||||
## call into exception handler
|
## call into exception handler
|
||||||
movq 8(%rbp), %rcx
|
movq 8(%rbp), %rcx
|
||||||
|
movq 8(%rbp), %rdi ##for GCC
|
||||||
movq ASM_PFX(mExternalVectorTablePtr)(%rip), %rax
|
movq ASM_PFX(mExternalVectorTablePtr)(%rip), %rax
|
||||||
movq (%rax, %rcx, 8), %rax
|
movq (%rax, %rcx, 8), %rax
|
||||||
orq %rax, %rax
|
orq %rax, %rax
|
||||||
|
@ -324,6 +325,7 @@ L1:
|
||||||
|
|
||||||
## Prepare parameter and call
|
## Prepare parameter and call
|
||||||
movq %rsp, %rdx
|
movq %rsp, %rdx
|
||||||
|
movq %rsp, %rsi # second parameter for GCC
|
||||||
#
|
#
|
||||||
# Per X64 calling convention, allocate maximum parameter stack space
|
# Per X64 calling convention, allocate maximum parameter stack space
|
||||||
# and make sure RSP is 16-byte aligned
|
# and make sure RSP is 16-byte aligned
|
||||||
|
|
|
@ -37,9 +37,10 @@ ASM_PFX(AsmHostEntrypointSmmPe):
|
||||||
push %rdx
|
push %rdx
|
||||||
push %rcx
|
push %rcx
|
||||||
push %rax
|
push %rax
|
||||||
movq %rsp, %rcx # parameter
|
movq %rsp, %rcx # parameter for MS
|
||||||
subq $0x20, %rsp
|
movq %rdi, %rdi # parameter for GCC
|
||||||
|
subq $0x30, %rsp
|
||||||
call ASM_PFX(PeStmHandlerSmm)
|
call ASM_PFX(PeStmHandlerSmm)
|
||||||
addq $0x20, %rsp
|
addq $0x30, %rsp
|
||||||
jmp .
|
jmp .
|
||||||
|
|
||||||
|
|
|
@ -21,6 +21,10 @@ ASM_GLOBAL ASM_PFX(AsmHostEntrypointSmi)
|
||||||
ASM_GLOBAL ASM_PFX(AsmHostEntrypointSmm)
|
ASM_GLOBAL ASM_PFX(AsmHostEntrypointSmm)
|
||||||
|
|
||||||
ASM_PFX(AsmHostEntrypointSmi):
|
ASM_PFX(AsmHostEntrypointSmi):
|
||||||
|
|
||||||
|
subq $512, %rsp
|
||||||
|
fxsave (%rsp)
|
||||||
|
|
||||||
push %r15
|
push %r15
|
||||||
push %r14
|
push %r14
|
||||||
push %r13
|
push %r13
|
||||||
|
@ -37,13 +41,17 @@ ASM_PFX(AsmHostEntrypointSmi):
|
||||||
push %rdx
|
push %rdx
|
||||||
push %rcx
|
push %rcx
|
||||||
push %rax
|
push %rax
|
||||||
movq %rsp, %rcx # parameter
|
movq %rsp, %rcx # parameter for MS
|
||||||
subq $0x20, %rsp
|
movq %rsp, %rdi # parameter for GCC
|
||||||
|
subq $0x30, %rsp
|
||||||
call ASM_PFX(StmHandlerSmi)
|
call ASM_PFX(StmHandlerSmi)
|
||||||
addq $0x20, %rsp
|
addq $0x30, %rsp
|
||||||
jmp .
|
jmp .
|
||||||
|
|
||||||
ASM_PFX(AsmHostEntrypointSmm):
|
ASM_PFX(AsmHostEntrypointSmm):
|
||||||
|
subq $512, %rsp
|
||||||
|
fxsave (%rsp)
|
||||||
|
|
||||||
push %r15
|
push %r15
|
||||||
push %r14
|
push %r14
|
||||||
push %r13
|
push %r13
|
||||||
|
@ -60,9 +68,10 @@ ASM_PFX(AsmHostEntrypointSmm):
|
||||||
push %rdx
|
push %rdx
|
||||||
push %rcx
|
push %rcx
|
||||||
push %rax
|
push %rax
|
||||||
movq %rsp, %rcx # parameter
|
movq %rsp, %rcx # parameter for MS
|
||||||
subq $0x20, %rsp
|
movq %rsp, %rdi # parameter for GCC
|
||||||
|
subq $0x30, %rsp
|
||||||
call ASM_PFX(StmHandlerSmm)
|
call ASM_PFX(StmHandlerSmm)
|
||||||
addq $0x20, %rsp
|
addq $0x30, %rsp
|
||||||
jmp .
|
jmp .
|
||||||
|
|
||||||
|
|
|
@ -5,7 +5,7 @@
|
||||||
in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
|
in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
|
||||||
|
|
||||||
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
http://opensource.org/licenses/bsd-license.php
|
http://opensource.org/licenses/bsd-license.php
|
||||||
|
@ -15,6 +15,11 @@
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
|
SizeOfPerProcessorStack = 0x8000;
|
||||||
|
HeapSize = 0x246000;
|
||||||
|
PageTableSize = 0x6000;
|
||||||
|
STM_SMM_REV_ID = 0x80010100;
|
||||||
|
|
||||||
SECTIONS
|
SECTIONS
|
||||||
{
|
{
|
||||||
/* HARDWARE_STM_HEADER */
|
/* HARDWARE_STM_HEADER */
|
||||||
|
@ -22,26 +27,27 @@ SECTIONS
|
||||||
.StmHeaderRevision : {LONG(0)}
|
.StmHeaderRevision : {LONG(0)}
|
||||||
.MonitorFeatures : {LONG(1)}
|
.MonitorFeatures : {LONG(1)}
|
||||||
.GdtrLimit : {LONG(0x47)}
|
.GdtrLimit : {LONG(0x47)}
|
||||||
.GdtrBaseOffset : {LONG(0x1000)}
|
.GdtrBaseOffset : {LONG(_StmGdtr)}
|
||||||
.CsSelector : {LONG(0x38)}
|
.CsSelector : {LONG(0x38)}
|
||||||
.EipOffset : {LONG(_ModuleEntryPoint)}
|
.EipOffset : {LONG(_ModuleEntryPoint)}
|
||||||
.EspOffset : {LONG(0)}
|
.EspOffset : {LONG(_StmPageTables + HeapSize + PageTableSize)}
|
||||||
.Cr3Offset : {LONG(0)}
|
.Cr3Offset : {LONG(_StmPageTables)}
|
||||||
|
.fill1 : { FILL(0x0); . = ALIGN(2048); }
|
||||||
/* SOFTWARE_STM_HEADER */
|
/* SOFTWARE_STM_HEADER */
|
||||||
|
|
||||||
.StmSpecVerMajor ALIGN(2048) : {BYTE(1)}
|
.StmSpecVerMajor ALIGN(2048) : {BYTE(1)}
|
||||||
.StmSpecVerMinor : {BYTE(0)}
|
.StmSpecVerMinor : {BYTE(0)}
|
||||||
.Reserved : {SHORT(0)}
|
.Reserved : {SHORT(0)}
|
||||||
.StaticImageSize : {LONG(0)}
|
/* page tables are at the end of the static section and the data section */
|
||||||
.PerProcDynamicMemorySize : {LONG(0x8000)}
|
.StaticImageSize : {LONG(_StmImageEnd)}
|
||||||
.AdditionalDynamicMemorySize : {LONG(0x246000)}
|
.PerProcDynamicMemorySize : {LONG(SizeOfPerProcessorStack)}
|
||||||
|
.AdditionalDynamicMemorySize : {LONG(HeapSize + PageTableSize)}
|
||||||
|
|
||||||
.StmFeatures : {LONG(0)}
|
.StmFeatures : {LONG(0x3)} /* EPT support and Intel mode 64 support */
|
||||||
.NumberOfRevIDs : {LONG(0)}
|
.NumberOfRevIDs : {LONG(1)}
|
||||||
.StmSmmRevIDs0 : {LONG(0)}
|
.StmSmmRevIDs0 : {LONG(STM_SMM_REV_ID)}
|
||||||
. = ALIGN(0x1000);
|
.fill2 : { FILL(0x0); . = ALIGN(0x1000);}
|
||||||
|
_StmGdtr = .;
|
||||||
/* GDT Entriess */
|
/* GDT Entriess */
|
||||||
.LimitLow0 : {SHORT(0)}
|
.LimitLow0 : {SHORT(0)}
|
||||||
.BaseLow0 : {SHORT(0)}
|
.BaseLow0 : {SHORT(0)}
|
||||||
|
@ -107,29 +113,46 @@ SECTIONS
|
||||||
.BaseHi8 : {BYTE(0)}
|
.BaseHi8 : {BYTE(0)}
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(0x1000);
|
.fill3 : { FILL(0x0); . = ALIGN(0x1000);}
|
||||||
.text : {
|
|
||||||
*(.text)
|
.text : {
|
||||||
}
|
*(.text.*)
|
||||||
. = ALIGN(0x20);
|
}
|
||||||
.data : {
|
|
||||||
*(.data)
|
. = ALIGN(0x20);
|
||||||
}
|
.rodata : {
|
||||||
. = ALIGN(0x20);
|
*(.rodata.*)
|
||||||
.rdata : {
|
} =0x0
|
||||||
*(.rdata)
|
_StmImageEnd = .;
|
||||||
}
|
|
||||||
. = ALIGN(0x20);
|
. = ALIGN(0X1000);
|
||||||
.bss : {
|
.data : {
|
||||||
*(.bss)
|
*(.data.*)
|
||||||
*(COMMON)
|
}
|
||||||
/* dummy */
|
|
||||||
/* LONG (0x12345678) */
|
. = ALIGN(0x20);
|
||||||
}
|
.rdata : {
|
||||||
. = ALIGN(0x20);
|
*(.rdata.*)
|
||||||
.edata : {
|
}
|
||||||
}
|
. = ALIGN(0x20);
|
||||||
. = ALIGN(0x20);
|
.bss : {
|
||||||
.reloc : {
|
*(.bss.*)
|
||||||
}
|
*(COMMON)
|
||||||
|
/* dummy */
|
||||||
|
/* LONG (0x12345678) */
|
||||||
|
}
|
||||||
|
. = ALIGN(0x20);
|
||||||
|
.edata : {
|
||||||
|
}
|
||||||
|
. = ALIGN(0x20);
|
||||||
|
|
||||||
|
_ElfRelocTablesStart = .;
|
||||||
|
.reloc : {
|
||||||
|
*(.rela.*)
|
||||||
|
}
|
||||||
|
_ElfRelocTablesEnd = .;
|
||||||
|
|
||||||
|
. = ALIGN(0x1000);
|
||||||
|
_StmPageTables = .;
|
||||||
|
. = . + 24K; /* 6 pages for STM page tables, filled by BIOS and/or SINIT */
|
||||||
}
|
}
|
||||||
|
|
|
@ -78,6 +78,12 @@ VERIFY_SIZE_OF (CHAR16, 2);
|
||||||
#define GLOBAL_REMOVE_IF_UNREFERENCED
|
#define GLOBAL_REMOVE_IF_UNREFERENCED
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
#define MSABI __attribute__((ms_abi))
|
||||||
|
#else
|
||||||
|
#define MSABI
|
||||||
|
#endif
|
||||||
|
|
||||||
//
|
//
|
||||||
// For symbol name in GNU assembly code, an extra "_" is necessary
|
// For symbol name in GNU assembly code, an extra "_" is necessary
|
||||||
//
|
//
|
||||||
|
|
|
@ -17,6 +17,14 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
#ifndef __BASE_LIB__
|
#ifndef __BASE_LIB__
|
||||||
#define __BASE_LIB__
|
#define __BASE_LIB__
|
||||||
|
|
||||||
|
// GCC
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
#define MSABI __attribute__((ms_abi))
|
||||||
|
#else
|
||||||
|
#define MSABI
|
||||||
|
#endif
|
||||||
|
|
||||||
//
|
//
|
||||||
// Definitions for architecture-specific types
|
// Definitions for architecture-specific types
|
||||||
//
|
//
|
||||||
|
@ -3455,7 +3463,7 @@ EFIAPI
|
||||||
AsmFlushCacheRange (
|
AsmFlushCacheRange (
|
||||||
IN VOID *Address,
|
IN VOID *Address,
|
||||||
IN UINTN Length
|
IN UINTN Length
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3473,7 +3481,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmFc (
|
AsmFc (
|
||||||
IN UINT64 Address
|
IN UINT64 Address
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3491,7 +3499,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmFci (
|
AsmFci (
|
||||||
IN UINT64 Address
|
IN UINT64 Address
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3514,7 +3522,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCpuid (
|
AsmReadCpuid (
|
||||||
IN UINT8 Index
|
IN UINT8 Index
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3528,7 +3536,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadPsr (
|
AsmReadPsr (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3548,7 +3556,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWritePsr (
|
AsmWritePsr (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3564,7 +3572,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr0 (
|
AsmReadKr0 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3580,7 +3588,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr1 (
|
AsmReadKr1 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3596,7 +3604,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr2 (
|
AsmReadKr2 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3612,7 +3620,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr3 (
|
AsmReadKr3 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3628,7 +3636,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr4 (
|
AsmReadKr4 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3644,7 +3652,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr5 (
|
AsmReadKr5 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3660,7 +3668,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr6 (
|
AsmReadKr6 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3676,7 +3684,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadKr7 (
|
AsmReadKr7 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3694,7 +3702,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr0 (
|
AsmWriteKr0 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3712,7 +3720,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr1 (
|
AsmWriteKr1 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3730,7 +3738,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr2 (
|
AsmWriteKr2 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3748,7 +3756,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr3 (
|
AsmWriteKr3 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3766,7 +3774,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr4 (
|
AsmWriteKr4 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3784,7 +3792,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr5 (
|
AsmWriteKr5 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3802,7 +3810,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr6 (
|
AsmWriteKr6 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -3820,7 +3828,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteKr7 (
|
AsmWriteKr7 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5105,7 +5113,7 @@ AsmCpuid (
|
||||||
OUT UINT32 *Ebx, OPTIONAL
|
OUT UINT32 *Ebx, OPTIONAL
|
||||||
OUT UINT32 *Ecx, OPTIONAL
|
OUT UINT32 *Ecx, OPTIONAL
|
||||||
OUT UINT32 *Edx OPTIONAL
|
OUT UINT32 *Edx OPTIONAL
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5149,7 +5157,7 @@ AsmCpuidEx (
|
||||||
OUT UINT32 *Ebx, OPTIONAL
|
OUT UINT32 *Ebx, OPTIONAL
|
||||||
OUT UINT32 *Ecx, OPTIONAL
|
OUT UINT32 *Ecx, OPTIONAL
|
||||||
OUT UINT32 *Edx OPTIONAL
|
OUT UINT32 *Edx OPTIONAL
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5163,7 +5171,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmDisableCache (
|
AsmDisableCache (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5177,7 +5185,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmEnableCache (
|
AsmEnableCache (
|
||||||
VOID
|
VOID
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5198,7 +5206,7 @@ UINT32
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMsr32 (
|
AsmReadMsr32 (
|
||||||
IN UINT32 Index
|
IN UINT32 Index
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5223,7 +5231,7 @@ EFIAPI
|
||||||
AsmWriteMsr32 (
|
AsmWriteMsr32 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT32 Value
|
IN UINT32 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5250,7 +5258,7 @@ EFIAPI
|
||||||
AsmMsrOr32 (
|
AsmMsrOr32 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT32 OrData
|
IN UINT32 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5277,7 +5285,7 @@ EFIAPI
|
||||||
AsmMsrAnd32 (
|
AsmMsrAnd32 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT32 AndData
|
IN UINT32 AndData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5308,7 +5316,7 @@ AsmMsrAndThenOr32 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT32 AndData,
|
IN UINT32 AndData,
|
||||||
IN UINT32 OrData
|
IN UINT32 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5339,7 +5347,7 @@ AsmMsrBitFieldRead32 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit
|
IN UINTN EndBit
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5373,7 +5381,7 @@ AsmMsrBitFieldWrite32 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT32 Value
|
IN UINT32 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5409,7 +5417,7 @@ AsmMsrBitFieldOr32 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT32 OrData
|
IN UINT32 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5445,7 +5453,7 @@ AsmMsrBitFieldAnd32 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT32 AndData
|
IN UINT32 AndData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5485,7 +5493,7 @@ AsmMsrBitFieldAndThenOr32 (
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT32 AndData,
|
IN UINT32 AndData,
|
||||||
IN UINT32 OrData
|
IN UINT32 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5506,7 +5514,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMsr64 (
|
AsmReadMsr64 (
|
||||||
IN UINT32 Index
|
IN UINT32 Index
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5531,7 +5539,7 @@ EFIAPI
|
||||||
AsmWriteMsr64 (
|
AsmWriteMsr64 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5557,7 +5565,7 @@ EFIAPI
|
||||||
AsmMsrOr64 (
|
AsmMsrOr64 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT64 OrData
|
IN UINT64 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5583,7 +5591,7 @@ EFIAPI
|
||||||
AsmMsrAnd64 (
|
AsmMsrAnd64 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT64 AndData
|
IN UINT64 AndData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5613,7 +5621,7 @@ AsmMsrAndThenOr64 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINT64 AndData,
|
IN UINT64 AndData,
|
||||||
IN UINT64 OrData
|
IN UINT64 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5644,7 +5652,7 @@ AsmMsrBitFieldRead64 (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit
|
IN UINTN EndBit
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5677,7 +5685,7 @@ AsmMsrBitFieldWrite64 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5713,7 +5721,7 @@ AsmMsrBitFieldOr64 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT64 OrData
|
IN UINT64 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5749,7 +5757,7 @@ AsmMsrBitFieldAnd64 (
|
||||||
IN UINTN StartBit,
|
IN UINTN StartBit,
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT64 AndData
|
IN UINT64 AndData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5788,7 +5796,7 @@ AsmMsrBitFieldAndThenOr64 (
|
||||||
IN UINTN EndBit,
|
IN UINTN EndBit,
|
||||||
IN UINT64 AndData,
|
IN UINT64 AndData,
|
||||||
IN UINT64 OrData
|
IN UINT64 OrData
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5805,7 +5813,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadEflags (
|
AsmReadEflags (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5822,7 +5830,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCr0 (
|
AsmReadCr0 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5839,7 +5847,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCr2 (
|
AsmReadCr2 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5856,7 +5864,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCr3 (
|
AsmReadCr3 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5873,7 +5881,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCr4 (
|
AsmReadCr4 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5891,7 +5899,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteCr0 (
|
AsmWriteCr0 (
|
||||||
UINTN Cr0
|
UINTN Cr0
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5909,7 +5917,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteCr2 (
|
AsmWriteCr2 (
|
||||||
UINTN Cr2
|
UINTN Cr2
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5927,7 +5935,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteCr3 (
|
AsmWriteCr3 (
|
||||||
UINTN Cr3
|
UINTN Cr3
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5945,7 +5953,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteCr4 (
|
AsmWriteCr4 (
|
||||||
UINTN Cr4
|
UINTN Cr4
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5962,7 +5970,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr0 (
|
AsmReadDr0 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5979,7 +5987,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr1 (
|
AsmReadDr1 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -5996,7 +6004,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr2 (
|
AsmReadDr2 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6013,7 +6021,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr3 (
|
AsmReadDr3 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6030,7 +6038,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr4 (
|
AsmReadDr4 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6047,7 +6055,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr5 (
|
AsmReadDr5 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6064,7 +6072,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr6 (
|
AsmReadDr6 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6081,7 +6089,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDr7 (
|
AsmReadDr7 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6099,7 +6107,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr0 (
|
AsmWriteDr0 (
|
||||||
UINTN Dr0
|
UINTN Dr0
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6117,7 +6125,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr1 (
|
AsmWriteDr1 (
|
||||||
UINTN Dr1
|
UINTN Dr1
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6135,7 +6143,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr2 (
|
AsmWriteDr2 (
|
||||||
UINTN Dr2
|
UINTN Dr2
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6153,7 +6161,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr3 (
|
AsmWriteDr3 (
|
||||||
UINTN Dr3
|
UINTN Dr3
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6171,7 +6179,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr4 (
|
AsmWriteDr4 (
|
||||||
UINTN Dr4
|
UINTN Dr4
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6189,7 +6197,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr5 (
|
AsmWriteDr5 (
|
||||||
UINTN Dr5
|
UINTN Dr5
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6207,7 +6215,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr6 (
|
AsmWriteDr6 (
|
||||||
UINTN Dr6
|
UINTN Dr6
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6225,7 +6233,7 @@ UINTN
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteDr7 (
|
AsmWriteDr7 (
|
||||||
UINTN Dr7
|
UINTN Dr7
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6241,7 +6249,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadCs (
|
AsmReadCs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6257,7 +6265,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadDs (
|
AsmReadDs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6273,7 +6281,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadEs (
|
AsmReadEs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6289,7 +6297,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadFs (
|
AsmReadFs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6305,7 +6313,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadGs (
|
AsmReadGs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6321,7 +6329,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadSs (
|
AsmReadSs (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6337,7 +6345,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadTr (
|
AsmReadTr (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6355,7 +6363,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadGdtr (
|
AsmReadGdtr (
|
||||||
OUT IA32_DESCRIPTOR *Gdtr
|
OUT IA32_DESCRIPTOR *Gdtr
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6373,7 +6381,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteGdtr (
|
AsmWriteGdtr (
|
||||||
IN CONST IA32_DESCRIPTOR *Gdtr
|
IN CONST IA32_DESCRIPTOR *Gdtr
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6391,7 +6399,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadIdtr (
|
AsmReadIdtr (
|
||||||
OUT IA32_DESCRIPTOR *Idtr
|
OUT IA32_DESCRIPTOR *Idtr
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6425,7 +6433,7 @@ UINT16
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadLdtr (
|
AsmReadLdtr (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6441,7 +6449,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteLdtr (
|
AsmWriteLdtr (
|
||||||
IN UINT16 Ldtr
|
IN UINT16 Ldtr
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6461,7 +6469,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmFxSave (
|
AsmFxSave (
|
||||||
OUT IA32_FX_BUFFER *Buffer
|
OUT IA32_FX_BUFFER *Buffer
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6482,7 +6490,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmFxRestore (
|
AsmFxRestore (
|
||||||
IN CONST IA32_FX_BUFFER *Buffer
|
IN CONST IA32_FX_BUFFER *Buffer
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6498,7 +6506,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm0 (
|
AsmReadMm0 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6514,7 +6522,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm1 (
|
AsmReadMm1 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6530,8 +6538,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm2 (
|
AsmReadMm2 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Reads the current value of 64-bit MMX Register #3 (MM3).
|
Reads the current value of 64-bit MMX Register #3 (MM3).
|
||||||
|
@ -6546,7 +6553,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm3 (
|
AsmReadMm3 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6562,7 +6569,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm4 (
|
AsmReadMm4 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6578,7 +6585,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm5 (
|
AsmReadMm5 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6594,7 +6601,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm6 (
|
AsmReadMm6 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6610,7 +6617,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadMm7 (
|
AsmReadMm7 (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6626,7 +6633,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm0 (
|
AsmWriteMm0 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6642,7 +6649,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm1 (
|
AsmWriteMm1 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6658,7 +6665,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm2 (
|
AsmWriteMm2 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6674,7 +6681,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm3 (
|
AsmWriteMm3 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6690,7 +6697,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm4 (
|
AsmWriteMm4 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6706,7 +6713,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm5 (
|
AsmWriteMm5 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6722,7 +6729,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm6 (
|
AsmWriteMm6 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6738,7 +6745,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWriteMm7 (
|
AsmWriteMm7 (
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6754,7 +6761,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadTsc (
|
AsmReadTsc (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6772,7 +6779,7 @@ UINT64
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmReadPmc (
|
AsmReadPmc (
|
||||||
IN UINT32 Index
|
IN UINT32 Index
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6797,7 +6804,7 @@ AsmMonitor (
|
||||||
IN UINTN Eax,
|
IN UINTN Eax,
|
||||||
IN UINTN Ecx,
|
IN UINTN Ecx,
|
||||||
IN UINTN Edx
|
IN UINTN Edx
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6819,7 +6826,7 @@ EFIAPI
|
||||||
AsmMwait (
|
AsmMwait (
|
||||||
IN UINTN Eax,
|
IN UINTN Eax,
|
||||||
IN UINTN Ecx
|
IN UINTN Ecx
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6833,7 +6840,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmWbinvd (
|
AsmWbinvd (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6847,7 +6854,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmInvd (
|
AsmInvd (
|
||||||
VOID
|
VOID
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6869,7 +6876,7 @@ VOID *
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmFlushCacheLine (
|
AsmFlushCacheLine (
|
||||||
IN VOID *LinearAddress
|
IN VOID *LinearAddress
|
||||||
);
|
) ;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6916,7 +6923,7 @@ AsmEnablePaging32 (
|
||||||
IN VOID *Context1, OPTIONAL
|
IN VOID *Context1, OPTIONAL
|
||||||
IN VOID *Context2, OPTIONAL
|
IN VOID *Context2, OPTIONAL
|
||||||
IN VOID *NewStack
|
IN VOID *NewStack
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -6960,7 +6967,7 @@ AsmDisablePaging32 (
|
||||||
IN VOID *Context1, OPTIONAL
|
IN VOID *Context1, OPTIONAL
|
||||||
IN VOID *Context2, OPTIONAL
|
IN VOID *Context2, OPTIONAL
|
||||||
IN VOID *NewStack
|
IN VOID *NewStack
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -7003,7 +7010,7 @@ AsmEnablePaging64 (
|
||||||
IN UINT64 Context1, OPTIONAL
|
IN UINT64 Context1, OPTIONAL
|
||||||
IN UINT64 Context2, OPTIONAL
|
IN UINT64 Context2, OPTIONAL
|
||||||
IN UINT64 NewStack
|
IN UINT64 NewStack
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -7044,7 +7051,7 @@ AsmDisablePaging64 (
|
||||||
IN UINT32 Context1, OPTIONAL
|
IN UINT32 Context1, OPTIONAL
|
||||||
IN UINT32 Context2, OPTIONAL
|
IN UINT32 Context2, OPTIONAL
|
||||||
IN UINT32 NewStack
|
IN UINT32 NewStack
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -7077,7 +7084,7 @@ EFIAPI
|
||||||
AsmGetThunk16Properties (
|
AsmGetThunk16Properties (
|
||||||
OUT UINT32 *RealModeBufferSize,
|
OUT UINT32 *RealModeBufferSize,
|
||||||
OUT UINT32 *ExtraStackSize
|
OUT UINT32 *ExtraStackSize
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -7098,7 +7105,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmPrepareThunk16 (
|
AsmPrepareThunk16 (
|
||||||
OUT THUNK_CONTEXT *ThunkContext
|
OUT THUNK_CONTEXT *ThunkContext
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -7158,7 +7165,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmThunk16 (
|
AsmThunk16 (
|
||||||
IN OUT THUNK_CONTEXT *ThunkContext
|
IN OUT THUNK_CONTEXT *ThunkContext
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -7185,7 +7192,7 @@ VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmPrepareAndThunk16 (
|
AsmPrepareAndThunk16 (
|
||||||
IN OUT THUNK_CONTEXT *ThunkContext
|
IN OUT THUNK_CONTEXT *ThunkContext
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -14,6 +14,7 @@
|
||||||
|
|
||||||
#include <Base.h>
|
#include <Base.h>
|
||||||
#include <Library/BaseLib.h>
|
#include <Library/BaseLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Executes an infinite loop.
|
Executes an infinite loop.
|
||||||
|
@ -31,5 +32,6 @@ CpuDeadLoop (
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile UINTN Index;
|
volatile UINTN Index;
|
||||||
|
DEBUG((EFI_D_INFO, "In CpuDeadLoop\n"));
|
||||||
for (Index = 0; Index == 0;);
|
for (Index = 0; Index == 0;);
|
||||||
}
|
}
|
||||||
|
|
|
@ -15,6 +15,12 @@
|
||||||
#ifndef _VMX_H_
|
#ifndef _VMX_H_
|
||||||
#define _VMX_H_
|
#define _VMX_H_
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
#define MSABI __attribute__((ms_abi))
|
||||||
|
#else
|
||||||
|
#define MSABI
|
||||||
|
#endif
|
||||||
|
|
||||||
#include "CpuArchSpecific.h"
|
#include "CpuArchSpecific.h"
|
||||||
|
|
||||||
#define IA32_SMM_MONITOR_CTL_MSR_INDEX 0x9B
|
#define IA32_SMM_MONITOR_CTL_MSR_INDEX 0x9B
|
||||||
|
@ -842,7 +848,7 @@ AsmVmxOff (
|
||||||
UINTN
|
UINTN
|
||||||
AsmVmClear (
|
AsmVmClear (
|
||||||
IN UINT64 *Vmcs
|
IN UINT64 *Vmcs
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -856,7 +862,7 @@ AsmVmClear (
|
||||||
UINTN
|
UINTN
|
||||||
AsmVmPtrStore (
|
AsmVmPtrStore (
|
||||||
IN UINT64 *Vmcs
|
IN UINT64 *Vmcs
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -870,7 +876,7 @@ AsmVmPtrStore (
|
||||||
UINTN
|
UINTN
|
||||||
AsmVmPtrLoad (
|
AsmVmPtrLoad (
|
||||||
IN UINT64 *Vmcs
|
IN UINT64 *Vmcs
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -884,7 +890,7 @@ AsmVmPtrLoad (
|
||||||
UINTN
|
UINTN
|
||||||
AsmVmLaunch (
|
AsmVmLaunch (
|
||||||
IN X86_REGISTER *Register
|
IN X86_REGISTER *Register
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -898,7 +904,7 @@ AsmVmLaunch (
|
||||||
UINTN
|
UINTN
|
||||||
AsmVmResume (
|
AsmVmResume (
|
||||||
IN X86_REGISTER *Register
|
IN X86_REGISTER *Register
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -914,7 +920,7 @@ UINTN
|
||||||
AsmVmRead (
|
AsmVmRead (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
OUT UINTN *Data
|
OUT UINTN *Data
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -930,7 +936,7 @@ UINTN
|
||||||
AsmVmWrite (
|
AsmVmWrite (
|
||||||
IN UINT32 Index,
|
IN UINT32 Index,
|
||||||
IN UINTN Data
|
IN UINTN Data
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
UINT64 Lo;
|
UINT64 Lo;
|
||||||
|
@ -954,7 +960,7 @@ UINTN
|
||||||
AsmInvEpt (
|
AsmInvEpt (
|
||||||
IN UINTN Type,
|
IN UINTN Type,
|
||||||
IN UINT_128 *Addr
|
IN UINT_128 *Addr
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
#define INVVPID_TYPE_INDIVIDUAL_ADDRESS_INVALIDATION 1
|
#define INVVPID_TYPE_INDIVIDUAL_ADDRESS_INVALIDATION 1
|
||||||
#define INVVPID_TYPE_SINGLE_CONTEXT_INVALIDATION 2
|
#define INVVPID_TYPE_SINGLE_CONTEXT_INVALIDATION 2
|
||||||
|
@ -975,7 +981,7 @@ UINTN
|
||||||
AsmInvVpid (
|
AsmInvVpid (
|
||||||
IN UINTN Type,
|
IN UINTN Type,
|
||||||
IN UINT_128 *Addr
|
IN UINT_128 *Addr
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
||||||
|
@ -995,6 +1001,6 @@ AsmVmCall (
|
||||||
IN UINT32 Ebx,
|
IN UINT32 Ebx,
|
||||||
IN UINT32 Ecx,
|
IN UINT32 Ecx,
|
||||||
IN UINT32 Edx
|
IN UINT32 Edx
|
||||||
);
|
) MSABI;
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in New Issue