mirror of https://review.coreboot.org/STM.git
159 lines
4.8 KiB
Plaintext
159 lines
4.8 KiB
Plaintext
/** @file
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STM GCC linker scriptor
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NOTE: We need to make sure "virtual address" is same as "file pointer to raw data"
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in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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SizeOfPerProcessorStack = 0x8000;
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HeapSize = 0x246000;
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PageTableSize = 0x6000;
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STM_SMM_REV_ID = 0x80010100;
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SECTIONS
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{
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/* HARDWARE_STM_HEADER */
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. = 0x0;
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.StmHeaderRevision : {LONG(0)}
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.MonitorFeatures : {LONG(1)}
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.GdtrLimit : {LONG(0x47)}
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.GdtrBaseOffset : {LONG(_StmGdtr)}
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.CsSelector : {LONG(0x38)}
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.EipOffset : {LONG(_ModuleEntryPoint)}
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.EspOffset : {LONG(_StmPageTables + HeapSize + PageTableSize)}
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.Cr3Offset : {LONG(_StmPageTables)}
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.fill1 : { FILL(0x0); . = ALIGN(2048); }
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/* SOFTWARE_STM_HEADER */
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.StmSpecVerMajor ALIGN(2048) : {BYTE(1)}
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.StmSpecVerMinor : {BYTE(0)}
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.Reserved : {SHORT(0)}
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/* page tables are at the end of the static section and the data section */
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.StaticImageSize : {LONG(_StmImageEnd)}
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.PerProcDynamicMemorySize : {LONG(SizeOfPerProcessorStack)}
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.AdditionalDynamicMemorySize : {LONG(HeapSize + PageTableSize)}
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.StmFeatures : {LONG(0x3)} /* EPT support and Intel mode 64 support */
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.NumberOfRevIDs : {LONG(1)}
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.StmSmmRevIDs0 : {LONG(STM_SMM_REV_ID)}
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.fill2 : { FILL(0x0); . = ALIGN(0x1000);}
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_StmGdtr = .;
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/* GDT Entriess */
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.LimitLow0 : {SHORT(0)}
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.BaseLow0 : {SHORT(0)}
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.BaseMid0 : {BYTE(0)}
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.Attribute0 : {BYTE(0)}
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.LimitHi0 : {BYTE(0)}
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.BaseHi0 : {BYTE(0)}
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.LimitLo1 : {SHORT(0)}
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.BaseLow1 : {SHORT(0)}
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.BaseMid1 : {BYTE(0)}
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.Attribute1 : {BYTE(0)}
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.LimitHi1 : {BYTE(0)}
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.BaseHi1 : {BYTE(0)}
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.LimitLow2 : {SHORT(0xFFFF)}
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.BaseLow2 : {SHORT(0)}
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.BaseMid2 : {BYTE(0)}
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.Attribute2 : {BYTE(0x9B)}
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.LimitHi2 : {BYTE(0xCF)}
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.BaseHi2 : {BYTE(0)}
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.LimitLow3 : {SHORT(0xFFFF)}
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.BaseLow3 : {SHORT(0)}
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.BaseMid3 : {BYTE(0)}
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.Attribute3 : {BYTE(0x93)}
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.LimitHi3 : {BYTE(0xCF)}
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.BaseHi3 : {BYTE(0)}
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.LimitLow4 : {SHORT(0)}
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.BaseLow4 : {SHORT(0)}
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.BaseMid4 : {BYTE(0)}
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.Attribute4 : {BYTE(0)}
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.LimitHi4 : {BYTE(0)}
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.BaseHi4 : {BYTE(0)}
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.LimitLow5 : {SHORT(104)}
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.BaseLow5 : {SHORT(0)}
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.BaseMid5 : {BYTE(0)}
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.Attribute5 : {BYTE(0x89)}
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.LimitHi5 : {BYTE(0x80)}
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.BaseHi5 : {BYTE(0)}
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.LimitLowr6 : {SHORT(0)}
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.BaseLow6 : {SHORT(0)}
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.BaseMid6 : {BYTE(0)}
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.Attribute6 : {BYTE(0)}
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.LimitHi6 : {BYTE(0)}
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.BaseHi6 : {BYTE(0)}
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.LimitLow7 : {SHORT(0xFFFF)}
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.BaseLow7 : {SHORT(0)}
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.BaseMid7 : {BYTE(0)}
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.Attribute7 : {BYTE(0x9B)}
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.LimitHi7 : {BYTE(0xAF)}
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.BaseHi7 : {BYTE(0)}
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.LimitLow8 : {SHORT(0xFFFF)}
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.BaseLow8 : {SHORT(0)}
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.BaseMid8 : {BYTE(0)}
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.Attribute8 : {BYTE(0x93)}
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.LimitHi8 : {BYTE(0xCF)}
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.BaseHi8 : {BYTE(0)}
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.fill3 : { FILL(0x0); . = ALIGN(0x1000);}
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.text : {
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*(.text.*)
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}
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. = ALIGN(0x20);
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.rodata : {
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*(.rodata.*)
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} =0x0
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_StmImageEnd = .;
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. = ALIGN(0X1000);
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.data : {
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*(.data.*)
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}
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. = ALIGN(0x20);
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.rdata : {
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*(.rdata.*)
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}
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. = ALIGN(0x20);
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.bss : {
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*(.bss.*)
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*(COMMON)
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/* dummy */
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/* LONG (0x12345678) */
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}
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. = ALIGN(0x20);
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.edata : {
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}
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. = ALIGN(0x20);
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_ElfRelocTablesStart = .;
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.reloc : {
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*(.rela.*)
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}
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_ElfRelocTablesEnd = .;
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. = ALIGN(0x1000);
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_StmPageTables = .;
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. = . + 24K; /* 6 pages for STM page tables, filled by BIOS and/or SINIT */
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}
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