Commit Graph

35 Commits

Author SHA1 Message Date
Mahesh Mahadevan 4663a409f3 pinctrl: Add support for MCXN947
ADd support for MCXN947

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-03-13 11:31:28 -05:00
Declan Snyder 259bc153dd Add support for RW61X in MCUX-SDK
Enable support for the highly integrated NXP triradio solution "RW612",
designed for a broad array of applications, including, but not limited to:
connected smart home devices, gaming controllers,
enterprise and industrial automation, smart accessories,
and "smart energy".

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-11 16:30:10 -05:00
Manuel Argüelles 4289b64f6a dts: s32: add pinmux definitions for S32K1xx
S32K1xx uses the same pin control driver as the Kinetis family.
The SoC pinmux headers were generated using gen_soc_headers.py
and NXP Real-Time Drivers for S32K1xx package. The script was
slightly modified locally in order to work with RTD, as follows:

- proc_root = pathlib.Path(temp_dir.name) / 'processors'
- search_pattern = "*/ksdk2_0/*/signal_configuration.xml"
+ proc_root = pathlib.Path(temp_dir.name)
+             / 'tools' / 's32ct' / 'processors'
+ search_pattern = "*/*/*/signal_configuration.xml"

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-11-29 17:59:04 -06:00
Sumit Batra 2f9433a48f hal_nxp: s32k: Pinmux config to connect Trgmux to eMIOS
Add pinmux config to connect source signals
TRGMUX_INT_OUT37 to eMIOS0_CH6_G
TRGMUX_INT_OUT38 to eMIOS0_CH7_G

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2023-11-28 16:31:34 -06:00
Chekhov Ma 78d1912dbc imx93: add mimx93xxcvxxk-pinctrl.dtsi
Generated *pinctrl.dtsi file for i.MX93 using offline data downloaded
from mcuxpresso.nxp.com. Add copyright notice.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2023-11-09 12:20:52 -06:00
Daniel DeGrasse d3770a0434 dts: nxp: add copyright to MK22FX pin control files
Copyright was not included when script was initially run to generate
these files. Add a copyright to all generated files.

Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
2023-09-29 11:16:38 -05:00
Mahesh Mahadevan ad142f5612 Revert "imx93: add mimx93xxcvxxk-pinctrl.dtsi"
This reverts commit b9c80495e0.
2023-09-29 07:22:59 -05:00
Daniel DeGrasse e6cd1b3f1c dts: added devicetree pinctrl files for MK22F12 line of SOCs
Added devictree pinctrl files for legacy MK22F12 line of NXP SOCs.

Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
2023-09-28 10:27:32 -05:00
Chekhov Ma b9c80495e0 imx93: add mimx93xxcvxxk-pinctrl.dtsi
Generated *pinctrl.dtsi file for i.MX93 using offline data downloaded
from mcuxpresso.nxp.com. Add copyright notice.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2023-09-28 10:05:11 -05:00
Daniel DeGrasse b027448102 dts: nxp: nxp_imx: update RT1170 and RT1160 header options
Update RT1170 and RT1160 header options to have correct pin type
information.

Note that due to changes in source data, the following changes have also
been made to the headers:
- the names of SNVS pins have been updated to align with the RM
- XBAR_INOUT mux options now set the associated GPR bit to select the
  XBAR pin as an output, while XBAR_IN options leave the GPR bit clear.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-08-28 12:26:11 -05:00
Benjamin Lemouzy 1f383ebe5f dts: add devicetree pin control definitions for RT1051 SOC
Add devicetree pin control definitions for RT1051 SOC.

Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
2023-08-28 12:23:26 -05:00
Daniel DeGrasse 5c272eee38 dts: add pin control SOC headers for RT1062xxxxB SOC
Add pin control SOC headers for RT1062 rev B silicon

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-07-31 14:56:14 -05:00
Manuel Argüelles 30d2f4785d dts: s32: add pinmux for S32K344
These are the S32K344 pinmux headers for packages 172MQFP
and 257BGA, based on IOMUX sheet of S32K RM Rev. 4.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-03 09:35:51 -05:00
Daniel DeGrasse a45b6bcee7 dts: add devicetree pin control definitions for RT1042 SOC
Add devicetree pin control definitions for RT1042 SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-05-08 12:58:50 -05:00
Manuel Arguelles cf0a0c77b7 dts: nxp_s32: rename S32 to NXP S32
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2023-01-04 08:13:24 -06:00
Jiafei Pan e31187c004 dts: add pinctrl dts file for imx93
Added a temporary dts file created by maunal as MCUXpresso Config
Tools still can't support imx93, will be replaced when the formal
one is available.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-12-20 16:47:40 +01:00
Manuel Arguelles 3e36485268 dts: s32: add pinmux definitions for S32Z27
Pinmux was autogenerated based on S32Z27 RM Rev1 DraftAJ.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-07 11:41:50 -05:00
Jiafei Pan 310da9c8e9 dts: add pin control file for mimx8mn
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-08-31 21:47:36 -05:00
Navin Sankar Velliangiri 054460d672 dts: add pinctrl dts header files for LPC51U68
add pin control dts header files with pinmux options
for LPC51U68

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-08-01 13:32:00 -05:00
Daniel DeGrasse 81e7f2a0a6 dts: lpc55s36: regenerate LPC55s36 pin control headers
regenerate lpc55s36 pin control headers, to properly capture the analog
pins present on the SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-07-19 16:59:37 -05:00
Neil Chen 86c65c77cf dts: add pinctrl dts header files for LPC55S36
add pin control dts header files with pinmux options for LPC55S36

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2022-07-13 07:34:18 -05:00
Daniel DeGrasse 637f463f81 dts: add pin control files for iMX application cores
Add pin control files for iMX application cores. These files were
generated from the signal_configuration.xml file for iMX8 cores, and
created using internal generation tools for the imx7 and imx6 based
SOCs.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-03 13:37:43 -05:00
Daniel DeGrasse c412e594ce dts: add pinctrl dts header files for LPC parts
add pin control dts header files with pinmux options for all in tree LPC
SOCs

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-22 15:50:24 -05:00
Daniel DeGrasse 5de81ed469 dts: nxp: rt: fix up daisy register values for RT1064 and RT1060
RT1060 and RT1064 have missing DAISY register definitions for some
pinmux selections. Fix these values using fsl_iomuxc.h as a ground
truth.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-22 14:13:33 -05:00
Daniel DeGrasse 46be8173d2 dts: lpc: update lpc pin control headers to use offsets instead of ports
use offsets for pin control headers instead of port/pin combo to enable
more flexibility for parts with non contiguous register layouts.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-15 13:56:45 -05:00
Daniel DeGrasse c631d4941b dts: add pin control header files required for RT600/RT500 pinctrl
add pin control header files defining pinmux options for RT600/RT500
pins

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-08 10:25:27 -05:00
Daniel DeGrasse a3d46260cc dts: update iMX RT pinctrl nodes with /omit-if-no-ref/ property
Update iMX RT pinctrl nodes with /omit-if-no-ref/ to reduce size of
generated devicetree header.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-29 15:55:13 -05:00
Daniel DeGrasse d7a110f6e0 dts: add lpc55s69 pinctrl headers
Add pinctrl header defintions for lpc55s69

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-25 13:47:47 -05:00
Daniel DeGrasse dcfcee4242 dts: add imx.rt pinctrl files
Add pinctrl file definitions for imxrt parts

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-24 13:32:31 -05:00
Daniel DeGrasse da6c141049 dts: add include file required by iMX.RT pinctrl implementation
Add SOC level include file for RT1062 pinctrl implementation, which
defines all pin mux options

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-03 13:33:39 -06:00
Daniel DeGrasse 072bf81d2f dts: convert pinctrl dtsi files to header files
pinctrl dtsi files must be converted to header files for use with pin
groups. Replace all pinctrl dtsi files with header files containing
equivalent definitions.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-01 17:39:36 -06:00
Tom Burdick da833a42e5 Adds MK66FN2 part device tree description
The LQFP144 package variant of MK66

Signed-off-by: Tom Burdick <tom.burdick@electromatic.us>
2021-09-09 09:18:45 -05:00
Kumar Gala 4560b0a010 dts: nxp: kinetis: populate MKW40Z pinctrl dtsi
Add the pin configuations we need specifically for the Hexiwear KW40Z
as its the only board utilizing this SoC.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-13 17:26:18 -05:00
Kumar Gala cc139194fa dts: nxp: kinetis: Add dummy pinctrl dtsi file for MKW40Z
The MKW40Z160VHT4 doesn't have signal_configuration.xml data
available for it so we will have to hand code the file based on what is
needed for the Hexiwear KW40Z board port.

For now add a dummy placeholder file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-08 09:02:17 -05:00
Kumar Gala 440a34536b dts: nxp: kinetis: Add pinctrl dtsi files
Add generated pinctrl.dtsi files for the Kinetis SoCs we have intree.
These dtsi files are generated by data from signal_configuration.xml
that comes from the Offline Data for the MCUXpresso Config tool.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-08 09:02:17 -05:00