dts: convert pinctrl dtsi files to header files

pinctrl dtsi files must be converted to header files for use with pin
groups. Replace all pinctrl dtsi files with header files containing
equivalent definitions.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-02-28 16:14:34 -06:00 committed by Mahesh Mahadevan
parent 3795084ddd
commit 072bf81d2f
63 changed files with 15650 additions and 24195 deletions

View File

@ -0,0 +1,294 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512CAP12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512CAP12_
#define _ZEPHYR_DTS_BINDING_MK22FN512CAP12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART0_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART0_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART0_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART0_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART0_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART0_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VDC12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512VDC12_
#define _ZEPHYR_DTS_BINDING_MK22FN512VDC12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define LPUART0_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART0_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART0_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART0_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART0_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART0_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART0_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LPUART0_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define LPUART0_RX_PTD8 KINETIS_MUX('D',8,5) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define LPUART0_TX_PTD9 KINETIS_MUX('D',9,5) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define LPUART0_RTS_b_PTD10 KINETIS_MUX('D',10,5) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LPUART0_CTS_b_PTD11 KINETIS_MUX('D',11,5) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART0_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART0_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART0_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define CLKOUT32K_PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VFX12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512VFX12_
#define _ZEPHYR_DTS_BINDING_MK22FN512VFX12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define LPUART0_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART0_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART0_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART0_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART0_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART0_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART0_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LPUART0_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART0_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART0_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART0_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#endif

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@ -1,651 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VLH12/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
UART0_CTS_b_PTA0: uart0_cts_b_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM0_CH5_PTA0: ftm0_ch5_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
JTAG_TCLK_PTA0: jtag_tclk_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
UART0_RX_PTA1: uart0_rx_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM0_CH6_PTA1: ftm0_ch6_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
JTAG_TDI_PTA1: jtag_tdi_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
UART0_TX_PTA2: uart0_tx_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
FTM0_CH7_PTA2: ftm0_ch7_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
JTAG_TDO_PTA2: TRACE_SWO_PTA2: jtag_tdo_pta2 {
nxp,kinetis-port-pins = < 2 7 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
UART0_RTS_b_PTA3: uart0_rts_b_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
FTM0_CH0_PTA3: ftm0_ch0_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
JTAG_TMS_PTA3: jtag_tms_pta3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTA4: GPIOA_PTA4: LLWU_P3_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH1_PTA4: ftm0_ch1_pta4 {
nxp,kinetis-port-pins = < 4 3 >;
};
NMI_b_PTA4: nmi_b_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
USB_CLKIN_PTA5: usb_clkin_pta5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM0_CH2_PTA5: ftm0_ch2_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
I2S0_TX_BCLK_PTA5: i2s0_tx_bclk_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH0_PTA12: ftm1_ch0_pta12 {
nxp,kinetis-port-pins = < 12 3 >;
};
I2S0_TXD0_PTA12: i2s0_txd0_pta12 {
nxp,kinetis-port-pins = < 12 6 >;
};
FTM1_QD_PHA_PTA12: ftm1_qd_pha_pta12 {
nxp,kinetis-port-pins = < 12 7 >;
};
PTA13: GPIOA_PTA13: LLWU_P4_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH1_PTA13: ftm1_ch1_pta13 {
nxp,kinetis-port-pins = < 13 3 >;
};
I2S0_TX_FS_PTA13: i2s0_tx_fs_pta13 {
nxp,kinetis-port-pins = < 13 6 >;
};
FTM1_QD_PHB_PTA13: ftm1_qd_phb_pta13 {
nxp,kinetis-port-pins = < 13 7 >;
};
EXTAL0_PTA18: extal0_pta18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTA18: GPIOA_PTA18: gpioa_pta18 {
nxp,kinetis-port-pins = < 18 1 >;
};
FTM0_FLT2_PTA18: ftm0_flt2_pta18 {
nxp,kinetis-port-pins = < 18 3 >;
};
FTM_CLKIN0_PTA18: ftm_clkin0_pta18 {
nxp,kinetis-port-pins = < 18 4 >;
};
XTAL0_PTA19: xtal0_pta19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTA19: GPIOA_PTA19: gpioa_pta19 {
nxp,kinetis-port-pins = < 19 1 >;
};
FTM1_FLT0_PTA19: ftm1_flt0_pta19 {
nxp,kinetis-port-pins = < 19 3 >;
};
FTM_CLKIN1_PTA19: ftm_clkin1_pta19 {
nxp,kinetis-port-pins = < 19 4 >;
};
LPTMR0_ALT1_PTA19: lptmr0_alt1_pta19 {
nxp,kinetis-port-pins = < 19 6 >;
};
};
&portb {
ADC0_SE8_PTB0: ADC1_SE8_PTB0: adc0_se8_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: LLWU_P5_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
I2C0_SCL_PTB0: i2c0_scl_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH0_PTB0: ftm1_ch0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM1_QD_PHA_PTB0: ftm1_qd_pha_ptb0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTB1: ADC1_SE9_PTB1: adc0_se9_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
I2C0_SDA_PTB1: i2c0_sda_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH1_PTB1: ftm1_ch1_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM1_QD_PHB_PTB1: ftm1_qd_phb_ptb1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE12_PTB2: adc0_se12_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
I2C0_SCL_PTB2: i2c0_scl_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART0_RTS_b_PTB2: uart0_rts_b_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM0_FLT3_PTB2: ftm0_flt3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE13_PTB3: adc0_se13_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
I2C0_SDA_PTB3: i2c0_sda_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART0_CTS_b_PTB3: uart0_cts_b_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM0_FLT0_PTB3: ftm0_flt0_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTB16: GPIOB_PTB16: gpiob_ptb16 {
nxp,kinetis-port-pins = < 16 1 >;
};
SPI1_SOUT_PTB16: spi1_sout_ptb16 {
nxp,kinetis-port-pins = < 16 2 >;
};
UART0_RX_PTB16: uart0_rx_ptb16 {
nxp,kinetis-port-pins = < 16 3 >;
};
FTM_CLKIN0_PTB16: ftm_clkin0_ptb16 {
nxp,kinetis-port-pins = < 16 4 >;
};
EWM_IN_PTB16: ewm_in_ptb16 {
nxp,kinetis-port-pins = < 16 6 >;
};
PTB17: GPIOB_PTB17: gpiob_ptb17 {
nxp,kinetis-port-pins = < 17 1 >;
};
SPI1_SIN_PTB17: spi1_sin_ptb17 {
nxp,kinetis-port-pins = < 17 2 >;
};
UART0_TX_PTB17: uart0_tx_ptb17 {
nxp,kinetis-port-pins = < 17 3 >;
};
FTM_CLKIN1_PTB17: ftm_clkin1_ptb17 {
nxp,kinetis-port-pins = < 17 4 >;
};
EWM_OUT_b_PTB17: ewm_out_b_ptb17 {
nxp,kinetis-port-pins = < 17 6 >;
};
PTB18: GPIOB_PTB18: gpiob_ptb18 {
nxp,kinetis-port-pins = < 18 1 >;
};
FTM2_CH0_PTB18: ftm2_ch0_ptb18 {
nxp,kinetis-port-pins = < 18 3 >;
};
I2S0_TX_BCLK_PTB18: i2s0_tx_bclk_ptb18 {
nxp,kinetis-port-pins = < 18 4 >;
};
FTM2_QD_PHA_PTB18: ftm2_qd_pha_ptb18 {
nxp,kinetis-port-pins = < 18 6 >;
};
PTB19: GPIOB_PTB19: gpiob_ptb19 {
nxp,kinetis-port-pins = < 19 1 >;
};
FTM2_CH1_PTB19: ftm2_ch1_ptb19 {
nxp,kinetis-port-pins = < 19 3 >;
};
I2S0_TX_FS_PTB19: i2s0_tx_fs_ptb19 {
nxp,kinetis-port-pins = < 19 4 >;
};
FTM2_QD_PHB_PTB19: ftm2_qd_phb_ptb19 {
nxp,kinetis-port-pins = < 19 6 >;
};
};
&portc {
ADC0_SE14_PTC0: adc0_se14_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI0_PCS4_PTC0: spi0_pcs4_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
PDB0_EXTRG_PTC0: pdb0_extrg_ptc0 {
nxp,kinetis-port-pins = < 0 3 >;
};
USB_SOF_OUT_PTC0: usb_sof_out_ptc0 {
nxp,kinetis-port-pins = < 0 4 >;
};
ADC0_SE15_PTC1: adc0_se15_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: LLWU_P6_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI0_PCS3_PTC1: spi0_pcs3_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART1_RTS_b_PTC1: uart1_rts_b_ptc1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM0_CH0_PTC1: ftm0_ch0_ptc1 {
nxp,kinetis-port-pins = < 1 4 >;
};
I2S0_TXD0_PTC1: i2s0_txd0_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
LPUART0_RTS_b_PTC1: lpuart0_rts_b_ptc1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC0_SE4b_PTC2: CMP1_IN0_PTC2: adc0_se4b_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI0_PCS2_PTC2: spi0_pcs2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART1_CTS_b_PTC2: uart1_cts_b_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM0_CH1_PTC2: ftm0_ch1_ptc2 {
nxp,kinetis-port-pins = < 2 4 >;
};
I2S0_TX_FS_PTC2: i2s0_tx_fs_ptc2 {
nxp,kinetis-port-pins = < 2 6 >;
};
LPUART0_CTS_b_PTC2: lpuart0_cts_b_ptc2 {
nxp,kinetis-port-pins = < 2 7 >;
};
CMP1_IN1_PTC3: cmp1_in1_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: LLWU_P7_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI0_PCS1_PTC3: spi0_pcs1_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART1_RX_PTC3: uart1_rx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM0_CH2_PTC3: ftm0_ch2_ptc3 {
nxp,kinetis-port-pins = < 3 4 >;
};
CLKOUT_PTC3: clkout_ptc3 {
nxp,kinetis-port-pins = < 3 5 >;
};
I2S0_TX_BCLK_PTC3: i2s0_tx_bclk_ptc3 {
nxp,kinetis-port-pins = < 3 6 >;
};
LPUART0_RX_PTC3: lpuart0_rx_ptc3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTC4: GPIOC_PTC4: LLWU_P8_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI0_PCS0_PTC4: spi0_pcs0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART1_TX_PTC4: uart1_tx_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM0_CH3_PTC4: ftm0_ch3_ptc4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CMP1_OUT_PTC4: cmp1_out_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
LPUART0_TX_PTC4: lpuart0_tx_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: LLWU_P9_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI0_SCK_PTC5: spi0_sck_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTC5: lptmr0_alt2_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
I2S0_RXD0_PTC5: i2s0_rxd0_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CMP0_OUT_PTC5: cmp0_out_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
FTM0_CH2_PTC5: ftm0_ch2_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
CMP0_IN0_PTC6: cmp0_in0_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: LLWU_P10_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI0_SOUT_PTC6: spi0_sout_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
PDB0_EXTRG_PTC6: pdb0_extrg_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
I2S0_RX_BCLK_PTC6: i2s0_rx_bclk_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
I2S0_MCLK_PTC6: i2s0_mclk_ptc6 {
nxp,kinetis-port-pins = < 6 6 >;
};
CMP0_IN1_PTC7: cmp0_in1_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
SPI0_SIN_PTC7: spi0_sin_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
USB_SOF_OUT_PTC7: usb_sof_out_ptc7 {
nxp,kinetis-port-pins = < 7 3 >;
};
I2S0_RX_FS_PTC7: i2s0_rx_fs_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC1_SE4b_PTC8: CMP0_IN2_PTC8: adc1_se4b_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM3_CH4_PTC8: ftm3_ch4_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
I2S0_MCLK_PTC8: i2s0_mclk_ptc8 {
nxp,kinetis-port-pins = < 8 4 >;
};
ADC1_SE5b_PTC9: CMP0_IN3_PTC9: adc1_se5b_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM3_CH5_PTC9: ftm3_ch5_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
I2S0_RX_BCLK_PTC9: i2s0_rx_bclk_ptc9 {
nxp,kinetis-port-pins = < 9 4 >;
};
FTM2_FLT0_PTC9: ftm2_flt0_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC1_SE6b_PTC10: adc1_se6b_ptc10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTC10: GPIOC_PTC10: gpioc_ptc10 {
nxp,kinetis-port-pins = < 10 1 >;
};
I2C1_SCL_PTC10: i2c1_scl_ptc10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM3_CH6_PTC10: ftm3_ch6_ptc10 {
nxp,kinetis-port-pins = < 10 3 >;
};
I2S0_RX_FS_PTC10: i2s0_rx_fs_ptc10 {
nxp,kinetis-port-pins = < 10 4 >;
};
ADC1_SE7b_PTC11: adc1_se7b_ptc11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTC11: GPIOC_PTC11: LLWU_P11_PTC11: gpioc_ptc11 {
nxp,kinetis-port-pins = < 11 1 >;
};
I2C1_SDA_PTC11: i2c1_sda_ptc11 {
nxp,kinetis-port-pins = < 11 2 >;
};
FTM3_CH7_PTC11: ftm3_ch7_ptc11 {
nxp,kinetis-port-pins = < 11 3 >;
};
};
&portd {
PTD0: GPIOD_PTD0: LLWU_P12_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI0_PCS0_PTD0: spi0_pcs0_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
UART2_RTS_b_PTD0: uart2_rts_b_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM3_CH0_PTD0: ftm3_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
LPUART0_RTS_b_PTD0: lpuart0_rts_b_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE5b_PTD1: adc0_se5b_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI0_SCK_PTD1: spi0_sck_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART2_CTS_b_PTD1: uart2_cts_b_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM3_CH1_PTD1: ftm3_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
LPUART0_CTS_b_PTD1: lpuart0_cts_b_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
PTD2: GPIOD_PTD2: LLWU_P13_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI0_SOUT_PTD2: spi0_sout_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART2_RX_PTD2: uart2_rx_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH2_PTD2: ftm3_ch2_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTD2: lpuart0_rx_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
I2C0_SCL_PTD2: i2c0_scl_ptd2 {
nxp,kinetis-port-pins = < 2 7 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI0_SIN_PTD3: spi0_sin_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART2_TX_PTD3: uart2_tx_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM3_CH3_PTD3: ftm3_ch3_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTD3: lpuart0_tx_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
I2C0_SDA_PTD3: i2c0_sda_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTD4: GPIOD_PTD4: LLWU_P14_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI0_PCS1_PTD4: spi0_pcs1_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART0_RTS_b_PTD4: uart0_rts_b_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM0_CH4_PTD4: ftm0_ch4_ptd4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_IN_PTD4: ewm_in_ptd4 {
nxp,kinetis-port-pins = < 4 6 >;
};
SPI1_PCS0_PTD4: spi1_pcs0_ptd4 {
nxp,kinetis-port-pins = < 4 7 >;
};
ADC0_SE6b_PTD5: adc0_se6b_ptd5 {
nxp,kinetis-port-pins = < 5 0 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI0_PCS2_PTD5: spi0_pcs2_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
UART0_CTS_b_PTD5: uart0_cts_b_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM0_CH5_PTD5: ftm0_ch5_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
EWM_OUT_b_PTD5: ewm_out_b_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
SPI1_SCK_PTD5: spi1_sck_ptd5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE7b_PTD6: adc0_se7b_ptd6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTD6: GPIOD_PTD6: LLWU_P15_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI0_PCS3_PTD6: spi0_pcs3_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
UART0_RX_PTD6: uart0_rx_ptd6 {
nxp,kinetis-port-pins = < 6 3 >;
};
FTM0_CH6_PTD6: ftm0_ch6_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
FTM0_FLT0_PTD6: ftm0_flt0_ptd6 {
nxp,kinetis-port-pins = < 6 6 >;
};
SPI1_SOUT_PTD6: spi1_sout_ptd6 {
nxp,kinetis-port-pins = < 6 7 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
UART0_TX_PTD7: uart0_tx_ptd7 {
nxp,kinetis-port-pins = < 7 3 >;
};
FTM0_CH7_PTD7: ftm0_ch7_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
FTM0_FLT1_PTD7: ftm0_flt1_ptd7 {
nxp,kinetis-port-pins = < 7 6 >;
};
SPI1_SIN_PTD7: spi1_sin_ptd7 {
nxp,kinetis-port-pins = < 7 7 >;
};
};
&porte {
ADC1_SE4a_PTE0: adc1_se4a_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: CLKOUT32K_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI1_PCS1_PTE0: spi1_pcs1_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
UART1_TX_PTE0: uart1_tx_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
I2C1_SDA_PTE0: i2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
RTC_CLKOUT_PTE0: rtc_clkout_pte0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC1_SE5a_PTE1: adc1_se5a_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: LLWU_P0_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI1_SOUT_PTE1: spi1_sout_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART1_RX_PTE1: uart1_rx_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
I2C1_SCL_PTE1: i2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
SPI1_SIN_PTE1: spi1_sin_pte1 {
nxp,kinetis-port-pins = < 1 7 >;
};
};

View File

@ -0,0 +1,245 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VLH12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512VLH12_
#define _ZEPHYR_DTS_BINDING_MK22FN512VLH12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VLL12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512VLL12_
#define _ZEPHYR_DTS_BINDING_MK22FN512VLL12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART0_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART0_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART0_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART0_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART0_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART0_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART0_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART0_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART0_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define CLKOUT32K_PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK22FN512VMP12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK22FN512VMP12_
#define _ZEPHYR_DTS_BINDING_MK22FN512VMP12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#endif

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@ -0,0 +1,501 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0CAJ12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0CAJ12_
#define _ZEPHYR_DTS_BINDING_MK64FN1M0CAJ12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define MII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define RMII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define RMII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define MII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,4) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,4) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,4) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,4) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,4) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE10_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC1_SE11_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define UART5_TX_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define UART5_RX_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define UART5_CTS_b_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define UART5_RTS_b_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,3) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VDC12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0VDC12_
#define _ZEPHYR_DTS_BINDING_MK64FN1M0VDC12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define UART3_RTS_b_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM1_CH0_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define FTM0_CH4_PTB12 KINETIS_MUX('B',12,4) /* PTB12 */
#define FTM1_QD_PHA_PTB12 KINETIS_MUX('B',12,6) /* PTB12 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define UART3_CTS_b_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM1_CH1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define FTM0_CH5_PTB13 KINETIS_MUX('B',13,4) /* PTB13 */
#define FTM1_QD_PHB_PTB13 KINETIS_MUX('B',13,6) /* PTB13 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VLL12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0VLL12_
#define _ZEPHYR_DTS_BINDING_MK64FN1M0VLL12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VLQ12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0VLQ12_
#define _ZEPHYR_DTS_BINDING_MK64FN1M0VLQ12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,4) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,4) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,4) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,4) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,4) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE10_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC1_SE11_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define UART5_TX_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define UART5_RX_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define UART5_CTS_b_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define UART5_RTS_b_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,3) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VMD12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0VMD12_
#define _ZEPHYR_DTS_BINDING_MK64FN1M0VMD12_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,4) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,4) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,4) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,4) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,4) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE10_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC1_SE11_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define UART5_TX_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define UART5_RX_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define UART5_CTS_b_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define UART5_RTS_b_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,3) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK66FN2M0VLQ18/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK66FN2M0VLQ18_
#define _ZEPHYR_DTS_BINDING_MK66FN2M0VLQ18_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define RMII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define MII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define RMII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define MII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define TPM1_CH0_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define TPM1_CH1_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define TPM2_CH0_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define TPM2_CH1_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define CMP3_IN1_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define CMP3_IN2_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define CMP3_IN4_PTA24 KINETIS_MUX('A',24,0) /* PTA24 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,4) /* PTA24 */
#define CMP3_IN5_PTA25 KINETIS_MUX('A',25,0) /* PTA25 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,4) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,4) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,4) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,4) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE10_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define SDRAM_CS1_b_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC1_SE11_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define SDRAM_D23_PTB6 KINETIS_MUX('B',6,5) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define SDRAM_D22_PTB7 KINETIS_MUX('B',7,5) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define SDRAM_D21_PTB8 KINETIS_MUX('B',8,5) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define CMP3_OUT_PTB23 KINETIS_MUX('B',23,6) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define CAN1_RX_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define SDRAM_DQM2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define CAN1_TX_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define SDRAM_DQM1_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define SDRAM_DQM0_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define LPUART0_RX_PTD8 KINETIS_MUX('D',8,5) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define LPUART0_TX_PTD9 KINETIS_MUX('D',9,5) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define LPUART0_RTS_b_PTD10 KINETIS_MUX('D',10,5) /* PTD10 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define LPUART0_CTS_b_PTD11 KINETIS_MUX('D',11,5) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB0_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define LPUART0_TX_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define LPUART0_RX_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define LPUART0_CTS_b_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define USB1_ID_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define LPUART0_RTS_b_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define CAN1_TX_PTE24 KINETIS_MUX('E',24,2) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define LLWU_P21_PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define CAN1_RX_PTE25 KINETIS_MUX('E',25,2) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB0_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,3) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK66FN2M0VMD18/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK66FN2M0VMD18_
#define _ZEPHYR_DTS_BINDING_MK66FN2M0VMD18_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define RMII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define MII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define RMII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define MII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define TPM1_CH0_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define TPM1_CH1_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define TPM2_CH0_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define I2C2_SDA_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define TPM2_CH1_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define CMP3_IN1_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define CMP3_IN2_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define CMP3_IN4_PTA24 KINETIS_MUX('A',24,0) /* PTA24 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,4) /* PTA24 */
#define CMP3_IN5_PTA25 KINETIS_MUX('A',25,0) /* PTA25 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,4) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,4) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,4) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,4) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,4) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC1_SE10_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define SDRAM_CS1_b_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC1_SE11_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ADC1_SE12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define SDRAM_D23_PTB6 KINETIS_MUX('B',6,5) /* PTB6 */
#define ADC1_SE13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define SDRAM_D22_PTB7 KINETIS_MUX('B',7,5) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define SDRAM_D21_PTB8 KINETIS_MUX('B',8,5) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define CMP3_OUT_PTB23 KINETIS_MUX('B',23,6) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define CAN1_RX_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define SDRAM_DQM2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define CAN1_TX_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define SDRAM_DQM1_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define SDRAM_DQM0_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define LPUART0_RX_PTD8 KINETIS_MUX('D',8,5) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define LPUART0_TX_PTD9 KINETIS_MUX('D',9,5) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define LPUART0_RTS_b_PTD10 KINETIS_MUX('D',10,5) /* PTD10 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define SDHC0_CLKIN_PTD11 KINETIS_MUX('D',11,4) /* PTD11 */
#define LPUART0_CTS_b_PTD11 KINETIS_MUX('D',11,5) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define SDHC0_D4_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define SDHC0_D5_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define SDHC0_D6_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define SDHC0_D7_PTD15 KINETIS_MUX('D',15,4) /* PTD15 */
#define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define USB0_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define LPUART0_TX_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define LPUART0_RX_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define LPUART0_CTS_b_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define USB1_ID_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define LPUART0_RTS_b_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define CAN1_TX_PTE24 KINETIS_MUX('E',24,2) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define LLWU_P21_PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define CAN1_RX_PTE25 KINETIS_MUX('E',25,2) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */
#define USB0_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,3) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK82FN256CAx15/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK82FN256CAX15_
#define _ZEPHYR_DTS_BINDING_MK82FN256CAX15_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO0_D10_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define EMVSIM0_CLK_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FXIO0_D11_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define EMVSIM0_IO_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FXIO0_D12_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define EMVSIM0_PD_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define FXIO0_D13_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define EMVSIM0_RST_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define FXIO0_D14_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define EMVSIM0_VCCEN_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define FXIO0_D15_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define I2C2_SDA_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define EMVSIM1_VCCEN_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FXIO0_D16_PTA10 KINETIS_MUX('A',10,5) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TPM2_CH0_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define I2C2_SCL_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO0_D17_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define TPM2_CH1_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define TRACE_CLKOUT_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define FXIO0_D18_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define TRACE_D3_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define FXIO0_D19_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define LPUART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define TRACE_D2_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FXIO0_D20_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPUART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define TRACE_D1_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define FXIO0_D21_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPUART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define TRACE_D0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define FXIO0_D22_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define LPUART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define FXIO0_D23_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define LPTMR1_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define I2C0_SCL_PTA20 KINETIS_MUX('A',20,2) /* PTA20 */
#define LPUART4_TX_PTA20 KINETIS_MUX('A',20,3) /* PTA20 */
#define FTM_CLKIN1_PTA20 KINETIS_MUX('A',20,4) /* PTA20 */
#define FXIO0_D8_PTA20 KINETIS_MUX('A',20,5) /* PTA20 */
#define EWM_OUT_b_PTA20 KINETIS_MUX('A',20,6) /* PTA20 */
#define TPM_CLKIN1_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define LLWU_P21_PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define I2C0_SDA_PTA21 KINETIS_MUX('A',21,2) /* PTA21 */
#define LPUART4_RX_PTA21 KINETIS_MUX('A',21,3) /* PTA21 */
#define FXIO0_D9_PTA21 KINETIS_MUX('A',21,5) /* PTA21 */
#define EWM_IN_PTA21 KINETIS_MUX('A',21,6) /* PTA21 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FXIO0_D0_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define FXIO0_D1_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPUART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define FXIO0_D2_PTB2 KINETIS_MUX('B',2,7) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPUART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define FXIO0_D3_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define EMVSIM1_IO_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define SDRAM_CS1_b_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define EMVSIM1_CLK_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define EMVSIM1_VCCEN_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define SDRAM_D23_PTB6 KINETIS_MUX('B',6,5) /* PTB6 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define EMVSIM1_PD_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define SDRAM_D22_PTB7 KINETIS_MUX('B',7,5) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define EMVSIM1_RST_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define LPUART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define SDRAM_D21_PTB8 KINETIS_MUX('B',8,5) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define I2C2_SCL_PTB10 KINETIS_MUX('B',10,4) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define FXIO0_D4_PTB10 KINETIS_MUX('B',10,7) /* PTB10 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define I2C2_SDA_PTB11 KINETIS_MUX('B',11,4) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define FXIO0_D5_PTB11 KINETIS_MUX('B',11,7) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPUART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPUART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FXIO0_D6_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FXIO0_D7_PTB19 KINETIS_MUX('B',19,7) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define FXIO0_D8_PTB20 KINETIS_MUX('B',20,7) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define FXIO0_D9_PTB21 KINETIS_MUX('B',21,7) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define FXIO0_D10_PTB22 KINETIS_MUX('B',22,7) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define FXIO0_D11_PTB23 KINETIS_MUX('B',23,7) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define FXIO0_D12_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define LPUART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define FXIO0_D13_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define LPUART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define LPUART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define LPUART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR1_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define FXIO0_D14_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define FXIO0_D15_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define FXIO0_D16_PTC8 KINETIS_MUX('C',8,7) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define FXIO0_D17_PTC9 KINETIS_MUX('C',9,7) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define FXIO0_D18_PTC10 KINETIS_MUX('C',10,7) /* PTC10 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define FXIO0_D19_PTC11 KINETIS_MUX('C',11,7) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define LPUART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define LPUART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define LPUART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define FXIO0_D20_PTC14 KINETIS_MUX('C',14,7) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define LPUART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define FXIO0_D21_PTC15 KINETIS_MUX('C',15,7) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define SDRAM_DQM2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define SDRAM_DQM1_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LPUART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define SDRAM_DQM0_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPUART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO0_D22_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPUART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO0_D23_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPUART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPUART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define LPUART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPUART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define LPUART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define LPUART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FXIO0_D24_PTD8 KINETIS_MUX('D',8,7) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FXIO0_D25_PTD9 KINETIS_MUX('D',9,7) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FXIO0_D26_PTD10 KINETIS_MUX('D',10,7) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FXIO0_D27_PTD11 KINETIS_MUX('D',11,7) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define FXIO0_D28_PTD12 KINETIS_MUX('D',12,7) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define FXIO0_D29_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define FXIO0_D30_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define FXIO0_D31_PTD15 KINETIS_MUX('D',15,7) /* PTD15 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define LPUART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define QSPI0A_DATA3_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SCK_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPUART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define QSPI0A_SCLK_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPUART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define QSPI0A_DATA0_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,7) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_PCS2_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define QSPI0A_DATA2_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_SIN_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define QSPI0A_DATA1_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS0_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define QSPI0A_SS0_B_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define USB0_SOF_OUT_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define QSPI0B_DATA3_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define SDHC0_D4_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define SPI2_SCK_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define LPUART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define QSPI0B_SCLK_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define QSPI0A_SS1_B_PTE7 KINETIS_MUX('E',7,7) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define SPI2_SOUT_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define QSPI0B_DATA0_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define SDHC0_D5_PTE8 KINETIS_MUX('E',8,7) /* PTE8 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define SPI2_PCS1_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define QSPI0B_DATA2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define SDHC0_D6_PTE9 KINETIS_MUX('E',9,7) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define SPI2_SIN_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define QSPI0B_DATA1_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define SDHC0_D7_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define SPI2_PCS0_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define QSPI0B_SS0_B_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define QSPI0A_DQS_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK82FN256VDC15/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK82FN256VDC15_
#define _ZEPHYR_DTS_BINDING_MK82FN256VDC15_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO0_D10_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define EMVSIM0_CLK_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FXIO0_D11_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define EMVSIM0_IO_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FXIO0_D12_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define EMVSIM0_PD_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define FXIO0_D13_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define EMVSIM0_RST_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define FXIO0_D14_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define EMVSIM0_VCCEN_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define FXIO0_D15_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define I2C2_SDA_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define EMVSIM1_VCCEN_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FXIO0_D16_PTA10 KINETIS_MUX('A',10,5) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TPM2_CH0_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define I2C2_SCL_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO0_D17_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define TPM2_CH1_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define TRACE_CLKOUT_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define FXIO0_D18_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define TRACE_D3_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define FXIO0_D19_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define LPUART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define TRACE_D2_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FXIO0_D20_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPUART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define TRACE_D1_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define FXIO0_D21_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPUART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define TRACE_D0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define FXIO0_D22_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define LPUART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define FXIO0_D23_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define LPTMR1_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define I2C0_SCL_PTA20 KINETIS_MUX('A',20,2) /* PTA20 */
#define LPUART4_TX_PTA20 KINETIS_MUX('A',20,3) /* PTA20 */
#define FTM_CLKIN1_PTA20 KINETIS_MUX('A',20,4) /* PTA20 */
#define FXIO0_D8_PTA20 KINETIS_MUX('A',20,5) /* PTA20 */
#define EWM_OUT_b_PTA20 KINETIS_MUX('A',20,6) /* PTA20 */
#define TPM_CLKIN1_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define LLWU_P21_PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define I2C0_SDA_PTA21 KINETIS_MUX('A',21,2) /* PTA21 */
#define LPUART4_RX_PTA21 KINETIS_MUX('A',21,3) /* PTA21 */
#define FXIO0_D9_PTA21 KINETIS_MUX('A',21,5) /* PTA21 */
#define EWM_IN_PTA21 KINETIS_MUX('A',21,6) /* PTA21 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FXIO0_D0_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define FXIO0_D1_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPUART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define FXIO0_D2_PTB2 KINETIS_MUX('B',2,7) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPUART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define FXIO0_D3_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define EMVSIM1_IO_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define SDRAM_CS1_b_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define EMVSIM1_CLK_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define EMVSIM1_VCCEN_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define SDRAM_D23_PTB6 KINETIS_MUX('B',6,5) /* PTB6 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define EMVSIM1_PD_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define SDRAM_D22_PTB7 KINETIS_MUX('B',7,5) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define EMVSIM1_RST_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define LPUART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define SDRAM_D21_PTB8 KINETIS_MUX('B',8,5) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define I2C2_SCL_PTB10 KINETIS_MUX('B',10,4) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define FXIO0_D4_PTB10 KINETIS_MUX('B',10,7) /* PTB10 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define I2C2_SDA_PTB11 KINETIS_MUX('B',11,4) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define FXIO0_D5_PTB11 KINETIS_MUX('B',11,7) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPUART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPUART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FXIO0_D6_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FXIO0_D7_PTB19 KINETIS_MUX('B',19,7) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define FXIO0_D8_PTB20 KINETIS_MUX('B',20,7) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define FXIO0_D9_PTB21 KINETIS_MUX('B',21,7) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define FXIO0_D10_PTB22 KINETIS_MUX('B',22,7) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define FXIO0_D11_PTB23 KINETIS_MUX('B',23,7) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define FXIO0_D12_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define LPUART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define FXIO0_D13_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define LPUART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define LPUART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define LPUART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR1_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define FXIO0_D14_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define FXIO0_D15_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define FXIO0_D16_PTC8 KINETIS_MUX('C',8,7) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define FXIO0_D17_PTC9 KINETIS_MUX('C',9,7) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define FXIO0_D18_PTC10 KINETIS_MUX('C',10,7) /* PTC10 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define FXIO0_D19_PTC11 KINETIS_MUX('C',11,7) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define LPUART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define LPUART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define LPUART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define FXIO0_D20_PTC14 KINETIS_MUX('C',14,7) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define LPUART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define FXIO0_D21_PTC15 KINETIS_MUX('C',15,7) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define SDRAM_DQM2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define SDRAM_DQM1_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LPUART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define SDRAM_DQM0_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPUART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO0_D22_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPUART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO0_D23_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPUART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPUART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define LPUART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPUART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define LPUART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define LPUART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FXIO0_D24_PTD8 KINETIS_MUX('D',8,7) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FXIO0_D25_PTD9 KINETIS_MUX('D',9,7) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FXIO0_D26_PTD10 KINETIS_MUX('D',10,7) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FXIO0_D27_PTD11 KINETIS_MUX('D',11,7) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define FXIO0_D28_PTD12 KINETIS_MUX('D',12,7) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define FXIO0_D29_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define FXIO0_D30_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define FXIO0_D31_PTD15 KINETIS_MUX('D',15,7) /* PTD15 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define LPUART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define QSPI0A_DATA3_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SCK_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPUART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define QSPI0A_SCLK_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPUART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define QSPI0A_DATA0_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,7) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_PCS2_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define QSPI0A_DATA2_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_SIN_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define QSPI0A_DATA1_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS0_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define QSPI0A_SS0_B_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define USB0_SOF_OUT_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define QSPI0B_DATA3_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define SDHC0_D4_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define SPI2_SCK_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define LPUART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define QSPI0B_SCLK_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define QSPI0A_SS1_B_PTE7 KINETIS_MUX('E',7,7) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define SPI2_SOUT_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define QSPI0B_DATA0_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define SDHC0_D5_PTE8 KINETIS_MUX('E',8,7) /* PTE8 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define SPI2_PCS1_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define QSPI0B_DATA2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define SDHC0_D6_PTE9 KINETIS_MUX('E',9,7) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define SPI2_SIN_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define QSPI0B_DATA1_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define SDHC0_D7_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define SPI2_PCS0_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define QSPI0B_SS0_B_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define QSPI0A_DQS_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK82FN256VLL15/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK82FN256VLL15_
#define _ZEPHYR_DTS_BINDING_MK82FN256VLL15_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO0_D10_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define EMVSIM0_CLK_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FXIO0_D11_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define EMVSIM0_IO_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FXIO0_D12_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define EMVSIM0_PD_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define FXIO0_D13_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define EMVSIM0_RST_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define FXIO0_D14_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define EMVSIM0_VCCEN_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define FXIO0_D15_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define TRACE_CLKOUT_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define FXIO0_D18_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define TRACE_D3_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define FXIO0_D19_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define LPUART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define TRACE_D2_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FXIO0_D20_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPUART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define TRACE_D1_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define FXIO0_D21_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPUART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define TRACE_D0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define FXIO0_D22_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define LPUART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define FXIO0_D23_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define LPTMR1_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FXIO0_D0_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define FXIO0_D1_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPUART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define FXIO0_D2_PTB2 KINETIS_MUX('B',2,7) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPUART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define FXIO0_D3_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define I2C2_SCL_PTB10 KINETIS_MUX('B',10,4) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define FXIO0_D4_PTB10 KINETIS_MUX('B',10,7) /* PTB10 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define I2C2_SDA_PTB11 KINETIS_MUX('B',11,4) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define FXIO0_D5_PTB11 KINETIS_MUX('B',11,7) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPUART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPUART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FXIO0_D6_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FXIO0_D7_PTB19 KINETIS_MUX('B',19,7) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define FXIO0_D8_PTB20 KINETIS_MUX('B',20,7) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define FXIO0_D9_PTB21 KINETIS_MUX('B',21,7) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define FXIO0_D10_PTB22 KINETIS_MUX('B',22,7) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define FXIO0_D11_PTB23 KINETIS_MUX('B',23,7) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define FXIO0_D12_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define LPUART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define FXIO0_D13_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define LPUART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define LPUART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define LPUART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR1_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define FXIO0_D14_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define FXIO0_D15_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define FXIO0_D16_PTC8 KINETIS_MUX('C',8,7) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define FXIO0_D17_PTC9 KINETIS_MUX('C',9,7) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define FXIO0_D18_PTC10 KINETIS_MUX('C',10,7) /* PTC10 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define FXIO0_D19_PTC11 KINETIS_MUX('C',11,7) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define LPUART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define LPUART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define LPUART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define FXIO0_D20_PTC14 KINETIS_MUX('C',14,7) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define LPUART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define FXIO0_D21_PTC15 KINETIS_MUX('C',15,7) /* PTC15 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPUART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO0_D22_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPUART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO0_D23_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPUART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPUART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define LPUART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPUART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define LPUART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define LPUART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define LPUART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define QSPI0A_DATA3_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SCK_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPUART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define QSPI0A_SCLK_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPUART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define QSPI0A_DATA0_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,7) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_PCS2_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define QSPI0A_DATA2_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_SIN_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define QSPI0A_DATA1_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS0_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define QSPI0A_SS0_B_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define USB0_SOF_OUT_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define QSPI0B_DATA3_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define SDHC0_D4_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define SPI2_SCK_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define LPUART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define QSPI0B_SCLK_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define QSPI0A_SS1_B_PTE7 KINETIS_MUX('E',7,7) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define SPI2_SOUT_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define QSPI0B_DATA0_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define SDHC0_D5_PTE8 KINETIS_MUX('E',8,7) /* PTE8 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define SPI2_PCS1_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define QSPI0B_DATA2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define SDHC0_D6_PTE9 KINETIS_MUX('E',9,7) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define SPI2_SIN_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define QSPI0B_DATA1_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define SDHC0_D7_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define SPI2_PCS0_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define QSPI0B_SS0_B_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define QSPI0A_DQS_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK82FN256VLQ15/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MK82FN256VLQ15_
#define _ZEPHYR_DTS_BINDING_MK82FN256VLQ15_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO0_D10_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define EMVSIM0_CLK_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define I2C3_SDA_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FXIO0_D11_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define EMVSIM0_IO_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define I2C3_SCL_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FXIO0_D12_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define EMVSIM0_PD_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define LPUART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define FXIO0_D13_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define EMVSIM0_RST_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define FXIO0_D14_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define EMVSIM0_VCCEN_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB0_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define FXIO0_D15_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define I2C2_SCL_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define EMVSIM1_CLK_PTA6 KINETIS_MUX('A',6,4) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define ADC0_SE10_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define I2C2_SDA_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define EMVSIM1_IO_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define ADC0_SE11_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define EMVSIM1_PD_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define TPM1_CH0_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define FTM1_QD_PHA_PTA8 KINETIS_MUX('A',8,6) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define EMVSIM1_RST_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM1_QD_PHB_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TPM1_CH1_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define I2C2_SDA_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define EMVSIM1_VCCEN_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define FXIO0_D16_PTA10 KINETIS_MUX('A',10,5) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TPM2_CH0_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define I2C2_SCL_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO0_D17_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define TPM2_CH1_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define TRACE_CLKOUT_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define FXIO0_D18_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define TRACE_D3_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define FXIO0_D19_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define LPUART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define TRACE_D2_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FXIO0_D20_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPUART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define TRACE_D1_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define FXIO0_D21_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPUART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define TRACE_D0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */
#define FXIO0_D22_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */
#define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define LPUART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define FXIO0_D23_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,7) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define LPTMR1_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,7) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define I2C0_SCL_PTA20 KINETIS_MUX('A',20,2) /* PTA20 */
#define LPUART4_TX_PTA20 KINETIS_MUX('A',20,3) /* PTA20 */
#define FTM_CLKIN1_PTA20 KINETIS_MUX('A',20,4) /* PTA20 */
#define FXIO0_D8_PTA20 KINETIS_MUX('A',20,5) /* PTA20 */
#define EWM_OUT_b_PTA20 KINETIS_MUX('A',20,6) /* PTA20 */
#define TPM_CLKIN1_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define LLWU_P21_PTA21 KINETIS_MUX('A',21,1) /* PTA21 */
#define I2C0_SDA_PTA21 KINETIS_MUX('A',21,2) /* PTA21 */
#define LPUART4_RX_PTA21 KINETIS_MUX('A',21,3) /* PTA21 */
#define FXIO0_D9_PTA21 KINETIS_MUX('A',21,5) /* PTA21 */
#define EWM_IN_PTA21 KINETIS_MUX('A',21,6) /* PTA21 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define EMVSIM0_CLK_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define EMVSIM0_IO_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define EMVSIM0_PD_PTA26 KINETIS_MUX('A',26,2) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define EMVSIM0_RST_PTA27 KINETIS_MUX('A',27,2) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define EMVSIM0_VCCEN_PTA28 KINETIS_MUX('A',28,2) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define SDRAM_CAS_b_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define FXIO0_D0_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define SDRAM_RAS_b_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define FXIO0_D1_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPUART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define SDRAM_WE_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define FXIO0_D2_PTB2 KINETIS_MUX('B',2,7) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPUART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define SDRAM_CS0_b_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define FXIO0_D3_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define EMVSIM1_IO_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define SDRAM_CS1_b_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define EMVSIM1_CLK_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define EMVSIM1_VCCEN_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define SDRAM_D23_PTB6 KINETIS_MUX('B',6,5) /* PTB6 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define EMVSIM1_PD_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define SDRAM_D22_PTB7 KINETIS_MUX('B',7,5) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define EMVSIM1_RST_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define LPUART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define SDRAM_D21_PTB8 KINETIS_MUX('B',8,5) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPUART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define SDRAM_D20_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPUART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define I2C2_SCL_PTB10 KINETIS_MUX('B',10,4) /* PTB10 */
#define SDRAM_D19_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define FXIO0_D4_PTB10 KINETIS_MUX('B',10,7) /* PTB10 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPUART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define I2C2_SDA_PTB11 KINETIS_MUX('B',11,4) /* PTB11 */
#define SDRAM_D18_PTB11 KINETIS_MUX('B',11,5) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define FXIO0_D5_PTB11 KINETIS_MUX('B',11,7) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPUART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SDRAM_D17_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPUART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SDRAM_D16_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define SDRAM_A23_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define FXIO0_D6_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define FXIO0_D7_PTB19 KINETIS_MUX('B',19,7) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define SDRAM_D31_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define FXIO0_D8_PTB20 KINETIS_MUX('B',20,7) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define SDRAM_D30_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define FXIO0_D9_PTB21 KINETIS_MUX('B',21,7) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define SDRAM_D29_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define FXIO0_D10_PTB22 KINETIS_MUX('B',22,7) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define SDRAM_D28_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define FXIO0_D11_PTB23 KINETIS_MUX('B',23,7) /* PTB23 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define USB0_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define SDRAM_A22_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define FXIO0_D12_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define LPUART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define SDRAM_A21_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define FXIO0_D13_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define LPUART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define SDRAM_A20_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define LPUART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define LPUART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SDRAM_A19_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR1_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define SDRAM_A18_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define SDRAM_A17_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define FXIO0_D14_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB0_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define SDRAM_A16_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define FXIO0_D15_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define SDRAM_A15_PTC8 KINETIS_MUX('C',8,5) /* PTC8 */
#define FXIO0_D16_PTC8 KINETIS_MUX('C',8,7) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define SDRAM_A14_PTC9 KINETIS_MUX('C',9,5) /* PTC9 */
#define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define FXIO0_D17_PTC9 KINETIS_MUX('C',9,7) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define SDRAM_A13_PTC10 KINETIS_MUX('C',10,5) /* PTC10 */
#define FXIO0_D18_PTC10 KINETIS_MUX('C',10,7) /* PTC10 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define FXIO0_D19_PTC11 KINETIS_MUX('C',11,7) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define LPUART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define SDRAM_D27_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define LPUART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define SDRAM_D26_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,7) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define LPUART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define SDRAM_D25_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define FXIO0_D20_PTC14 KINETIS_MUX('C',14,7) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define LPUART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define SDRAM_D24_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define FXIO0_D21_PTC15 KINETIS_MUX('C',15,7) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define LPUART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define SDRAM_DQM2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define LPUART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define SDRAM_DQM3_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LPUART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define SDRAM_DQM1_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LPUART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define SDRAM_DQM0_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPUART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO0_D22_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPUART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO0_D23_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPUART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SDRAM_A12_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPUART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SDRAM_A11_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define LPUART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define SDRAM_A10_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPUART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define SDRAM_A9_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define LPUART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define LPUART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SDRAM_CKE_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C0_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FXIO0_D24_PTD8 KINETIS_MUX('D',8,7) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C0_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FXIO0_D25_PTD9 KINETIS_MUX('D',9,7) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FXIO0_D26_PTD10 KINETIS_MUX('D',10,7) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FXIO0_D27_PTD11 KINETIS_MUX('D',11,7) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define FXIO0_D28_PTD12 KINETIS_MUX('D',12,7) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define FXIO0_D29_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define FXIO0_D30_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define FXIO0_D31_PTD15 KINETIS_MUX('D',15,7) /* PTD15 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define LPUART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define QSPI0A_DATA3_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SCK_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPUART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define QSPI0A_SCLK_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPUART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define QSPI0A_DATA0_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,7) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_PCS2_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define QSPI0A_DATA2_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_SIN_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define LPUART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define QSPI0A_DATA1_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS0_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define LPUART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define QSPI0A_SS0_B_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define USB0_SOF_OUT_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define LPUART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define QSPI0B_DATA3_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define SDHC0_D4_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define SPI2_SCK_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define LPUART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define I2S0_RXD0_PTE7 KINETIS_MUX('E',7,4) /* PTE7 */
#define QSPI0B_SCLK_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define QSPI0A_SS1_B_PTE7 KINETIS_MUX('E',7,7) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define I2S0_RXD1_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define SPI2_SOUT_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define I2S0_RX_FS_PTE8 KINETIS_MUX('E',8,4) /* PTE8 */
#define QSPI0B_DATA0_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define SDHC0_D5_PTE8 KINETIS_MUX('E',8,7) /* PTE8 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define I2S0_TXD1_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define SPI2_PCS1_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define I2S0_RX_BCLK_PTE9 KINETIS_MUX('E',9,4) /* PTE9 */
#define QSPI0B_DATA2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define SDHC0_D6_PTE9 KINETIS_MUX('E',9,7) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define I2C3_SDA_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define SPI2_SIN_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define I2S0_TXD0_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define QSPI0B_DATA1_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define SDHC0_D7_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define I2C3_SCL_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define SPI2_PCS0_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define I2S0_TX_FS_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define QSPI0B_SS0_B_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define QSPI0A_DQS_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define I2S0_TX_BCLK_PTE12 KINETIS_MUX('E',12,4) /* PTE12 */
#define QSPI0B_DQS_PTE12 KINETIS_MUX('E',12,5) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define FXIO0_D2_PTE12 KINETIS_MUX('E',12,7) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define LPUART2_RX_PTE13 KINETIS_MUX('E',13,3) /* PTE13 */
#define QSPI0B_SS1_B_PTE13 KINETIS_MUX('E',13,5) /* PTE13 */
#define SDHC0_CLKIN_PTE13 KINETIS_MUX('E',13,6) /* PTE13 */
#define FXIO0_D3_PTE13 KINETIS_MUX('E',13,7) /* PTE13 */
#define ADC0_SE4a_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define SPI0_PCS0_PTE16 KINETIS_MUX('E',16,2) /* PTE16 */
#define LPUART2_TX_PTE16 KINETIS_MUX('E',16,3) /* PTE16 */
#define FTM_CLKIN0_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FTM0_FLT3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define FXIO0_D4_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define ADC0_SE5a_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define LLWU_P19_PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define SPI0_SCK_PTE17 KINETIS_MUX('E',17,2) /* PTE17 */
#define LPUART2_RX_PTE17 KINETIS_MUX('E',17,3) /* PTE17 */
#define FTM_CLKIN1_PTE17 KINETIS_MUX('E',17,4) /* PTE17 */
#define LPTMR1_ALT3_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define LPTMR0_ALT3_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define FXIO0_D5_PTE17 KINETIS_MUX('E',17,7) /* PTE17 */
#define ADC0_SE6a_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define LLWU_P20_PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define SPI0_SOUT_PTE18 KINETIS_MUX('E',18,2) /* PTE18 */
#define LPUART2_CTS_b_PTE18 KINETIS_MUX('E',18,3) /* PTE18 */
#define I2C0_SDA_PTE18 KINETIS_MUX('E',18,4) /* PTE18 */
#define FXIO0_D6_PTE18 KINETIS_MUX('E',18,7) /* PTE18 */
#define ADC0_SE7a_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define PTE19 KINETIS_MUX('E',19,1) /* PTE19 */
#define SPI0_SIN_PTE19 KINETIS_MUX('E',19,2) /* PTE19 */
#define LPUART2_RTS_b_PTE19 KINETIS_MUX('E',19,3) /* PTE19 */
#define I2C0_SCL_PTE19 KINETIS_MUX('E',19,4) /* PTE19 */
#define FXIO0_D7_PTE19 KINETIS_MUX('E',19,7) /* PTE19 */
#endif

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@ -1,882 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F256VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

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@ -0,0 +1,335 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F256VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE14F256VLH16_
#define _ZEPHYR_DTS_BINDING_MKE14F256VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F256VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE14F256VLL16_
#define _ZEPHYR_DTS_BINDING_MKE14F256VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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@ -1,882 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F512VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

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@ -0,0 +1,335 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F512VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE14F512VLH16_
#define _ZEPHYR_DTS_BINDING_MKE14F512VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE14F512VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE14F512VLL16_
#define _ZEPHYR_DTS_BINDING_MKE14F512VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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@ -1,894 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F256VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
CAN0_RX_PTC2: can0_rx_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
CAN0_TX_PTC3: can0_tx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CAN0_RX_PTE4: can0_rx_pte4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CAN0_TX_PTE5: can0_tx_pte5 {
nxp,kinetis-port-pins = < 5 5 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

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@ -0,0 +1,339 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F256VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE16F256VLH16_
#define _ZEPHYR_DTS_BINDING_MKE16F256VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F256VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE16F256VLL16_
#define _ZEPHYR_DTS_BINDING_MKE16F256VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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@ -1,894 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F512VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
CAN0_RX_PTC2: can0_rx_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
CAN0_TX_PTC3: can0_tx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CAN0_RX_PTE4: can0_rx_pte4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CAN0_TX_PTE5: can0_tx_pte5 {
nxp,kinetis-port-pins = < 5 5 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

View File

@ -0,0 +1,339 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F512VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE16F512VLH16_
#define _ZEPHYR_DTS_BINDING_MKE16F512VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE16F512VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE16F512VLL16_
#define _ZEPHYR_DTS_BINDING_MKE16F512VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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@ -1,906 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F256VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
CAN1_RX_PTA12: can1_rx_pta12 {
nxp,kinetis-port-pins = < 12 3 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
CAN1_TX_PTA13: can1_tx_pta13 {
nxp,kinetis-port-pins = < 13 3 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
CAN0_RX_PTC2: can0_rx_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
CAN0_TX_PTC3: can0_tx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
CAN1_RX_PTC6: can1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
CAN1_TX_PTC7: can1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 3 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CAN0_RX_PTE4: can0_rx_pte4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CAN0_TX_PTE5: can0_tx_pte5 {
nxp,kinetis-port-pins = < 5 5 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

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@ -0,0 +1,343 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F256VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE18F256VLH16_
#define _ZEPHYR_DTS_BINDING_MKE18F256VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define CAN1_RX_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define CAN1_TX_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define CAN1_RX_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define CAN1_TX_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F256VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE18F256VLL16_
#define _ZEPHYR_DTS_BINDING_MKE18F256VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define CAN1_RX_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define CAN1_TX_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define CAN1_RX_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define CAN1_TX_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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@ -1,906 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F512VLH16/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
ADC0_SE0_PTA0: ACMP0_IN0_PTA0: adc0_se0_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM2_CH1_PTA0: ftm2_ch1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPI2C0_SCLS_PTA0: lpi2c0_scls_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FXIO_D2_PTA0: fxio_d2_pta0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM2_QD_PHA_PTA0: ftm2_qd_pha_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
LPUART0_CTS_PTA0: lpuart0_cts_pta0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT3_PTA0: trgmux_out3_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTA1: ACMP0_IN1_PTA1: adc0_se1_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM1_CH1_PTA1: ftm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_SDAS_PTA1: lpi2c0_sdas_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FXIO_D3_PTA1: fxio_d3_pta1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_QD_PHA_PTA1: ftm1_qd_pha_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
LPUART0_RTS_PTA1: lpuart0_rts_pta1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT0_PTA1: trgmux_out0_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE0_PTA2: adc1_se0_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH0_PTA2: ftm3_ch0_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPI2C0_SDA_PTA2: lpi2c0_sda_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
EWM_OUT_b_PTA2: ewm_out_b_pta2 {
nxp,kinetis-port-pins = < 2 4 >;
};
LPUART0_RX_PTA2: lpuart0_rx_pta2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE1_PTA3: adc1_se1_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH1_PTA3: ftm3_ch1_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPI2C0_SCL_PTA3: lpi2c0_scl_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
EWM_IN_PTA3: ewm_in_pta3 {
nxp,kinetis-port-pins = < 3 4 >;
};
LPUART0_TX_PTA3: lpuart0_tx_pta3 {
nxp,kinetis-port-pins = < 3 6 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ACMP0_OUT_PTA4: acmp0_out_pta4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_OUT_b_PTA4: ewm_out_b_pta4 {
nxp,kinetis-port-pins = < 4 5 >;
};
JTAG_TMS_PTA4: SWD_DIO_PTA4: jtag_tms_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK1_PTA5: tclk1_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
JTAG_TRST_b_PTA5: jtag_trst_b_pta5 {
nxp,kinetis-port-pins = < 5 6 >;
};
RESET_b_PTA5: reset_b_pta5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC0_SE2_PTA6: ACMP1_IN0_PTA6: adc0_se2_pta6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTA6: GPIOA_PTA6: gpioa_pta6 {
nxp,kinetis-port-pins = < 6 1 >;
};
FTM0_FLT1_PTA6: ftm0_flt1_pta6 {
nxp,kinetis-port-pins = < 6 2 >;
};
LPSPI1_PCS1_PTA6: lpspi1_pcs1_pta6 {
nxp,kinetis-port-pins = < 6 3 >;
};
LPUART1_CTS_PTA6: lpuart1_cts_pta6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE3_PTA7: ACMP1_IN1_PTA7: adc0_se3_pta7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTA7: GPIOA_PTA7: gpioa_pta7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_FLT2_PTA7: ftm0_flt2_pta7 {
nxp,kinetis-port-pins = < 7 2 >;
};
RTC_CLKIN_PTA7: rtc_clkin_pta7 {
nxp,kinetis-port-pins = < 7 4 >;
};
LPUART1_RTS_PTA7: lpuart1_rts_pta7 {
nxp,kinetis-port-pins = < 7 6 >;
};
PTA10: GPIOA_PTA10: gpioa_pta10 {
nxp,kinetis-port-pins = < 10 1 >;
};
FTM1_CH4_PTA10: ftm1_ch4_pta10 {
nxp,kinetis-port-pins = < 10 2 >;
};
LPUART0_TX_PTA10: lpuart0_tx_pta10 {
nxp,kinetis-port-pins = < 10 3 >;
};
FXIO_D0_PTA10: fxio_d0_pta10 {
nxp,kinetis-port-pins = < 10 4 >;
};
JTAG_TDO_PTA10: noetm_Trace_SWO_PTA10: jtag_tdo_pta10 {
nxp,kinetis-port-pins = < 10 7 >;
};
PTA11: GPIOA_PTA11: gpioa_pta11 {
nxp,kinetis-port-pins = < 11 1 >;
};
FTM1_CH5_PTA11: ftm1_ch5_pta11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPUART0_RX_PTA11: lpuart0_rx_pta11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FXIO_D1_PTA11: fxio_d1_pta11 {
nxp,kinetis-port-pins = < 11 4 >;
};
ADC2_SE5_PTA12: adc2_se5_pta12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM1_CH6_PTA12: ftm1_ch6_pta12 {
nxp,kinetis-port-pins = < 12 2 >;
};
CAN1_RX_PTA12: can1_rx_pta12 {
nxp,kinetis-port-pins = < 12 3 >;
};
LPI2C1_SDAS_PTA12: lpi2c1_sdas_pta12 {
nxp,kinetis-port-pins = < 12 4 >;
};
ADC2_SE4_PTA13: adc2_se4_pta13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM1_CH7_PTA13: ftm1_ch7_pta13 {
nxp,kinetis-port-pins = < 13 2 >;
};
CAN1_TX_PTA13: can1_tx_pta13 {
nxp,kinetis-port-pins = < 13 3 >;
};
LPI2C1_SCLS_PTA13: lpi2c1_scls_pta13 {
nxp,kinetis-port-pins = < 13 4 >;
};
};
&portb {
ADC0_SE4_PTB0: ADC1_SE14_PTB0: adc0_se4_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPUART0_RX_PTB0: lpuart0_rx_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI0_PCS0_PTB0: lpspi0_pcs0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPTMR0_ALT3_PTB0: lptmr0_alt3_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
PWT_IN3_PTB0: pwt_in3_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE5_PTB1: ADC1_SE15_PTB1: adc0_se5_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPUART0_TX_PTB1: lpuart0_tx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI0_SOUT_PTB1: lpspi0_sout_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TCLK0_PTB1: tclk0_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE6_PTB2: adc0_se6_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM1_CH0_PTB2: ftm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI0_SCK_PTB2: lpspi0_sck_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM1_QD_PHB_PTB2: ftm1_qd_phb_ptb2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN3_PTB2: trgmux_in3_ptb2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC0_SE7_PTB3: adc0_se7_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM1_CH1_PTB3: ftm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI0_SIN_PTB3: lpspi0_sin_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM1_QD_PHA_PTB3: ftm1_qd_pha_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN2_PTB3: trgmux_in2_ptb3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP1_IN2_PTB4: acmp1_in2_ptb4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTB4: GPIOB_PTB4: gpiob_ptb4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH4_PTB4: ftm0_ch4_ptb4 {
nxp,kinetis-port-pins = < 4 2 >;
};
LPSPI0_SOUT_PTB4: lpspi0_sout_ptb4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TRGMUX_IN1_PTB4: trgmux_in1_ptb4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTB5: GPIOB_PTB5: gpiob_ptb5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM0_CH5_PTB5: ftm0_ch5_ptb5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPSPI0_PCS1_PTB5: lpspi0_pcs1_ptb5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TRGMUX_IN0_PTB5: trgmux_in0_ptb5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ACMP1_OUT_PTB5: acmp1_out_ptb5 {
nxp,kinetis-port-pins = < 5 7 >;
};
XTAL_PTB6: xtal_ptb6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTB6: GPIOB_PTB6: gpiob_ptb6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPI2C0_SDA_PTB6: lpi2c0_sda_ptb6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTAL_PTB7: extal_ptb7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTB7: GPIOB_PTB7: gpiob_ptb7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPI2C0_SCL_PTB7: lpi2c0_scl_ptb7 {
nxp,kinetis-port-pins = < 7 2 >;
};
ADC1_SE7_PTB12: adc1_se7_ptb12 {
nxp,kinetis-port-pins = < 12 0 >;
};
PTB12: GPIOB_PTB12: gpiob_ptb12 {
nxp,kinetis-port-pins = < 12 1 >;
};
FTM0_CH0_PTB12: ftm0_ch0_ptb12 {
nxp,kinetis-port-pins = < 12 2 >;
};
FTM3_FLT2_PTB12: ftm3_flt2_ptb12 {
nxp,kinetis-port-pins = < 12 3 >;
};
ADC1_SE8_PTB13: ADC2_SE8_PTB13: adc1_se8_ptb13 {
nxp,kinetis-port-pins = < 13 0 >;
};
PTB13: GPIOB_PTB13: gpiob_ptb13 {
nxp,kinetis-port-pins = < 13 1 >;
};
FTM0_CH1_PTB13: ftm0_ch1_ptb13 {
nxp,kinetis-port-pins = < 13 2 >;
};
FTM3_FLT1_PTB13: ftm3_flt1_ptb13 {
nxp,kinetis-port-pins = < 13 3 >;
};
};
&portc {
ADC0_SE8_PTC0: ACMP1_IN4_PTC0: adc0_se8_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH0_PTC0: ftm0_ch0_ptc0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM1_CH6_PTC0: ftm1_ch6_ptc0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC0_SE9_PTC1: ACMP1_IN3_PTC1: adc0_se9_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH1_PTC1: ftm0_ch1_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM1_CH7_PTC1: ftm1_ch7_ptc1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC0_SE10_PTC2: ACMP0_IN5_PTC2: XTAL32_PTC2: adc0_se10_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM0_CH2_PTC2: ftm0_ch2_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
CAN0_RX_PTC2: can0_rx_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
ADC0_SE11_PTC3: ACMP0_IN4_PTC3: EXTAL32_PTC3: adc0_se11_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_CH3_PTC3: ftm0_ch3_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
CAN0_TX_PTC3: can0_tx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
ACMP0_IN2_PTC4: acmp0_in2_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM1_CH0_PTC4: ftm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
RTC_CLKOUT_PTC4: rtc_clkout_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
EWM_IN_PTC4: ewm_in_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FTM1_QD_PHB_PTC4: ftm1_qd_phb_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
JTAG_TCLK_PTC4: SWD_CLK_PTC4: jtag_tclk_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTC5: GPIOC_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH0_PTC5: ftm2_ch0_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
RTC_CLKOUT_PTC5: rtc_clkout_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
LPI2C1_HREQ_PTC5: lpi2c1_hreq_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
FTM2_QD_PHB_PTC5: ftm2_qd_phb_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
JTAG_TDI_PTC5: jtag_tdi_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE4_PTC6: adc1_se4_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART1_RX_PTC6: lpuart1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
CAN1_RX_PTC6: can1_rx_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
FTM3_CH2_PTC6: ftm3_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
ADC1_SE5_PTC7: adc1_se5_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART1_TX_PTC7: lpuart1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
CAN1_TX_PTC7: can1_tx_ptc7 {
nxp,kinetis-port-pins = < 7 3 >;
};
FTM3_CH3_PTC7: ftm3_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ADC2_SE14_PTC8: adc2_se14_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
LPUART1_RX_PTC8: lpuart1_rx_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
FTM1_FLT0_PTC8: ftm1_flt0_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
LPUART0_CTS_PTC8: lpuart0_cts_ptc8 {
nxp,kinetis-port-pins = < 8 6 >;
};
ADC2_SE15_PTC9: adc2_se15_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
LPUART1_TX_PTC9: lpuart1_tx_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
FTM1_FLT1_PTC9: ftm1_flt1_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
LPUART0_RTS_PTC9: lpuart0_rts_ptc9 {
nxp,kinetis-port-pins = < 9 6 >;
};
ADC0_SE12_PTC14: ACMP2_IN5_PTC14: adc0_se12_ptc14 {
nxp,kinetis-port-pins = < 14 0 >;
};
PTC14: GPIOC_PTC14: gpioc_ptc14 {
nxp,kinetis-port-pins = < 14 1 >;
};
FTM1_CH2_PTC14: ftm1_ch2_ptc14 {
nxp,kinetis-port-pins = < 14 2 >;
};
ADC0_SE13_PTC15: ACMP2_IN4_PTC15: adc0_se13_ptc15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTC15: GPIOC_PTC15: gpioc_ptc15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM1_CH3_PTC15: ftm1_ch3_ptc15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ADC0_SE14_PTC16: adc0_se14_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM1_FLT2_PTC16: ftm1_flt2_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
LPI2C1_SDAS_PTC16: lpi2c1_sdas_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
ADC0_SE15_PTC17: adc0_se15_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
FTM1_FLT3_PTC17: ftm1_flt3_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
LPI2C1_SCLS_PTC17: lpi2c1_scls_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
};
&portd {
ADC2_SE0_PTD0: adc2_se0_ptd0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
FTM0_CH2_PTD0: ftm0_ch2_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
LPSPI1_SCK_PTD0: lpspi1_sck_ptd0 {
nxp,kinetis-port-pins = < 0 3 >;
};
FTM2_CH0_PTD0: ftm2_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FXIO_D0_PTD0: fxio_d0_ptd0 {
nxp,kinetis-port-pins = < 0 6 >;
};
TRGMUX_OUT1_PTD0: trgmux_out1_ptd0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC2_SE1_PTD1: adc2_se1_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
FTM0_CH3_PTD1: ftm0_ch3_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPSPI1_SIN_PTD1: lpspi1_sin_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
FTM2_CH1_PTD1: ftm2_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FXIO_D1_PTD1: fxio_d1_ptd1 {
nxp,kinetis-port-pins = < 1 6 >;
};
TRGMUX_OUT2_PTD1: trgmux_out2_ptd1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC1_SE2_PTD2: adc1_se2_ptd2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
FTM3_CH4_PTD2: ftm3_ch4_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPSPI1_SOUT_PTD2: lpspi1_sout_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FXIO_D4_PTD2: fxio_d4_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
TRGMUX_IN5_PTD2: trgmux_in5_ptd2 {
nxp,kinetis-port-pins = < 2 6 >;
};
ADC1_SE3_PTD3: adc1_se3_ptd3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM3_CH5_PTD3: ftm3_ch5_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPSPI1_PCS0_PTD3: lpspi1_pcs0_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FXIO_D5_PTD3: fxio_d5_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN4_PTD3: trgmux_in4_ptd3 {
nxp,kinetis-port-pins = < 3 6 >;
};
NMI_b_PTD3: nmi_b_ptd3 {
nxp,kinetis-port-pins = < 3 7 >;
};
ADC1_SE6_PTD4: ACMP1_IN6_PTD4: adc1_se6_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_FLT3_PTD4: ftm0_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM3_FLT3_PTD4: ftm3_flt3_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
FTM2_CH3_PTD5: ftm2_ch3_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTD5: lptmr0_alt2_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_FLT1_PTD5: ftm2_flt1_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
PWT_IN2_PTD5: pwt_in2_ptd5 {
nxp,kinetis-port-pins = < 5 5 >;
};
TRGMUX_IN7_PTD5: trgmux_in7_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
PTD6: GPIOD_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPUART2_RX_PTD6: lpuart2_rx_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM2_FLT2_PTD6: ftm2_flt2_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
LPUART2_TX_PTD7: lpuart2_tx_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM2_FLT3_PTD7: ftm2_flt3_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
ACMP2_IN1_PTD15: acmp2_in1_ptd15 {
nxp,kinetis-port-pins = < 15 0 >;
};
PTD15: GPIOD_PTD15: gpiod_ptd15 {
nxp,kinetis-port-pins = < 15 1 >;
};
FTM0_CH0_PTD15: ftm0_ch0_ptd15 {
nxp,kinetis-port-pins = < 15 2 >;
};
ACMP2_IN0_PTD16: acmp2_in0_ptd16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTD16: GPIOD_PTD16: gpiod_ptd16 {
nxp,kinetis-port-pins = < 16 1 >;
};
FTM0_CH1_PTD16: ftm0_ch1_ptd16 {
nxp,kinetis-port-pins = < 16 2 >;
};
};
&porte {
ADC2_SE7_PTE0: adc2_se7_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
LPSPI0_SCK_PTE0: lpspi0_sck_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TCLK1_PTE0: tclk1_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
LPI2C1_SDA_PTE0: lpi2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
FTM1_FLT2_PTE0: ftm1_flt2_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
ADC2_SE6_PTE1: adc2_se6_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
LPSPI0_SIN_PTE1: lpspi0_sin_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
LPI2C0_HREQ_PTE1: lpi2c0_hreq_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPI2C1_SCL_PTE1: lpi2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 4 >;
};
FTM1_FLT1_PTE1: ftm1_flt1_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
ADC1_SE10_PTE2: adc1_se10_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
LPSPI0_SOUT_PTE2: lpspi0_sout_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
LPTMR0_ALT3_PTE2: lptmr0_alt3_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
FTM3_CH6_PTE2: ftm3_ch6_pte2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PWT_IN3_PTE2: pwt_in3_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
LPUART1_CTS_PTE2: lpuart1_cts_pte2 {
nxp,kinetis-port-pins = < 2 6 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
FTM0_FLT0_PTE3: ftm0_flt0_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
LPUART2_RTS_PTE3: lpuart2_rts_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
FTM2_FLT0_PTE3: ftm2_flt0_pte3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TRGMUX_IN6_PTE3: trgmux_in6_pte3 {
nxp,kinetis-port-pins = < 3 6 >;
};
ACMP2_OUT_PTE3: acmp2_out_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
BUSOUT_PTE4: busout_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
FTM2_QD_PHB_PTE4: ftm2_qd_phb_pte4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM2_CH2_PTE4: ftm2_ch2_pte4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CAN0_RX_PTE4: can0_rx_pte4 {
nxp,kinetis-port-pins = < 4 5 >;
};
FXIO_D6_PTE4: fxio_d6_pte4 {
nxp,kinetis-port-pins = < 4 6 >;
};
EWM_OUT_b_PTE4: ewm_out_b_pte4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
TCLK2_PTE5: tclk2_pte5 {
nxp,kinetis-port-pins = < 5 2 >;
};
FTM2_QD_PHA_PTE5: ftm2_qd_pha_pte5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM2_CH3_PTE5: ftm2_ch3_pte5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CAN0_TX_PTE5: can0_tx_pte5 {
nxp,kinetis-port-pins = < 5 5 >;
};
FXIO_D7_PTE5: fxio_d7_pte5 {
nxp,kinetis-port-pins = < 5 6 >;
};
EWM_IN_PTE5: ewm_in_pte5 {
nxp,kinetis-port-pins = < 5 7 >;
};
ADC1_SE11_PTE6: ACMP0_IN6_PTE6: adc1_se11_pte6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTE6: GPIOE_PTE6: gpioe_pte6 {
nxp,kinetis-port-pins = < 6 1 >;
};
LPSPI0_PCS2_PTE6: lpspi0_pcs2_pte6 {
nxp,kinetis-port-pins = < 6 2 >;
};
FTM3_CH7_PTE6: ftm3_ch7_pte6 {
nxp,kinetis-port-pins = < 6 4 >;
};
LPUART1_RTS_PTE6: lpuart1_rts_pte6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC2_SE2_PTE7: ACMP2_IN6_PTE7: adc2_se2_pte7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTE7: GPIOE_PTE7: gpioe_pte7 {
nxp,kinetis-port-pins = < 7 1 >;
};
FTM0_CH7_PTE7: ftm0_ch7_pte7 {
nxp,kinetis-port-pins = < 7 2 >;
};
FTM3_FLT0_PTE7: ftm3_flt0_pte7 {
nxp,kinetis-port-pins = < 7 3 >;
};
ACMP0_IN3_PTE8: acmp0_in3_pte8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTE8: GPIOE_PTE8: gpioe_pte8 {
nxp,kinetis-port-pins = < 8 1 >;
};
FTM0_CH6_PTE8: ftm0_ch6_pte8 {
nxp,kinetis-port-pins = < 8 2 >;
};
ACMP2_IN2_PTE9: DAC0_OUT_PTE9: acmp2_in2_pte9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTE9: GPIOE_PTE9: gpioe_pte9 {
nxp,kinetis-port-pins = < 9 1 >;
};
FTM0_CH7_PTE9: ftm0_ch7_pte9 {
nxp,kinetis-port-pins = < 9 2 >;
};
LPUART2_CTS_PTE9: lpuart2_cts_pte9 {
nxp,kinetis-port-pins = < 9 3 >;
};
ADC2_SE12_PTE10: adc2_se12_pte10 {
nxp,kinetis-port-pins = < 10 0 >;
};
PTE10: GPIOE_PTE10: gpioe_pte10 {
nxp,kinetis-port-pins = < 10 1 >;
};
CLKOUT_PTE10: clkout_pte10 {
nxp,kinetis-port-pins = < 10 2 >;
};
FTM2_CH4_PTE10: ftm2_ch4_pte10 {
nxp,kinetis-port-pins = < 10 4 >;
};
FXIO_D4_PTE10: fxio_d4_pte10 {
nxp,kinetis-port-pins = < 10 6 >;
};
TRGMUX_OUT4_PTE10: trgmux_out4_pte10 {
nxp,kinetis-port-pins = < 10 7 >;
};
ADC2_SE13_PTE11: adc2_se13_pte11 {
nxp,kinetis-port-pins = < 11 0 >;
};
PTE11: GPIOE_PTE11: gpioe_pte11 {
nxp,kinetis-port-pins = < 11 1 >;
};
PWT_IN1_PTE11: pwt_in1_pte11 {
nxp,kinetis-port-pins = < 11 2 >;
};
LPTMR0_ALT1_PTE11: lptmr0_alt1_pte11 {
nxp,kinetis-port-pins = < 11 3 >;
};
FTM2_CH5_PTE11: ftm2_ch5_pte11 {
nxp,kinetis-port-pins = < 11 4 >;
};
FXIO_D5_PTE11: fxio_d5_pte11 {
nxp,kinetis-port-pins = < 11 6 >;
};
TRGMUX_OUT5_PTE11: trgmux_out5_pte11 {
nxp,kinetis-port-pins = < 11 7 >;
};
};

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@ -0,0 +1,343 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F512VLH16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE18F512VLH16_
#define _ZEPHYR_DTS_BINDING_MKE18F512VLH16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define CAN1_RX_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define CAN1_TX_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define CAN1_RX_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define CAN1_TX_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKE18F512VLL16/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKE18F512VLL16_
#define _ZEPHYR_DTS_BINDING_MKE18F512VLL16_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ACMP0_IN0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define ADC0_SE0_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define FTM2_CH1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define LPI2C0_SCLS_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define FXIO_D2_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define FTM2_QD_PHA_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define LPUART0_CTS_PTA0 KINETIS_MUX('A',0,6) /* PTA0 */
#define TRGMUX_OUT3_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TRGMUX_OUT3_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define ADC0_SE1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define ACMP0_IN1_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define LPI2C0_SDAS_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define FXIO_D3_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM1_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define LPUART0_RTS_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define TRGMUX_OUT0_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define TRGMUX_OUT0_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define ADC1_SE0_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define FTM3_CH0_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define LPI2C0_SDA_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define EWM_OUT_b_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define LPUART0_RX_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define ADC1_SE1_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define FTM3_CH1_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define LPI2C0_SCL_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define EWM_IN_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define LPUART0_TX_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define ACMP0_OUT_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define EWM_OUT_b_PTA4 KINETIS_MUX('A',4,5) /* PTA4 */
#define JTAG_TMS_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define SWD_DIO_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define TCLK1_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
#define RESET_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define ADC0_SE2_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define ACMP1_IN0_PTA6 KINETIS_MUX('A',6,0) /* PTA6 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_FLT1_PTA6 KINETIS_MUX('A',6,2) /* PTA6 */
#define LPSPI1_PCS1_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define LPUART1_CTS_PTA6 KINETIS_MUX('A',6,6) /* PTA6 */
#define ACMP1_IN1_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define ADC0_SE3_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_FLT2_PTA7 KINETIS_MUX('A',7,2) /* PTA7 */
#define RTC_CLKIN_PTA7 KINETIS_MUX('A',7,4) /* PTA7 */
#define LPUART1_RTS_PTA7 KINETIS_MUX('A',7,6) /* PTA7 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FXIO_D6_PTA8 KINETIS_MUX('A',8,4) /* PTA8 */
#define FTM3_FLT3_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FXIO_D7_PTA9 KINETIS_MUX('A',9,4) /* PTA9 */
#define FTM3_FLT2_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define FTM1_FLT3_PTA9 KINETIS_MUX('A',9,6) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM1_CH4_PTA10 KINETIS_MUX('A',10,2) /* PTA10 */
#define LPUART0_TX_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define FXIO_D0_PTA10 KINETIS_MUX('A',10,4) /* PTA10 */
#define noetm_Trace_SWO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define JTAG_TDO_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM1_CH5_PTA11 KINETIS_MUX('A',11,2) /* PTA11 */
#define LPUART0_RX_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define FXIO_D1_PTA11 KINETIS_MUX('A',11,4) /* PTA11 */
#define ADC2_SE5_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define FTM1_CH6_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define CAN1_RX_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define LPI2C1_SDAS_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */
#define ADC2_SE4_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define FTM1_CH7_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define CAN1_TX_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define LPI2C1_SCLS_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define FTM0_FLT0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define FTM3_FLT1_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define EWM_IN_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define FTM1_FLT0_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */
#define BUSOUT_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */
#define ADC1_SE12_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define FTM1_CH2_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define LPSPI0_PCS3_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define ADC1_SE13_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define FTM1_CH3_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define LPSPI1_PCS2_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define FTM0_CH6_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define FTM3_FLT0_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define EWM_OUT_b_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */
#define ADC1_SE14_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE4_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LPUART0_RX_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define LPSPI0_PCS0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define LPTMR0_ALT3_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define PWT_IN3_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC1_SE15_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define LPUART0_TX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define LPSPI0_SOUT_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TCLK0_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define ADC0_SE6_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define FTM1_CH0_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define LPSPI0_SCK_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM1_QD_PHB_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define TRGMUX_IN3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define ADC0_SE7_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define FTM1_CH1_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define LPSPI0_SIN_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define FTM1_QD_PHA_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TRGMUX_IN2_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ACMP1_IN2_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FTM0_CH4_PTB4 KINETIS_MUX('B',4,2) /* PTB4 */
#define LPSPI0_SOUT_PTB4 KINETIS_MUX('B',4,3) /* PTB4 */
#define TRGMUX_IN1_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FTM0_CH5_PTB5 KINETIS_MUX('B',5,2) /* PTB5 */
#define LPSPI0_PCS1_PTB5 KINETIS_MUX('B',5,3) /* PTB5 */
#define TRGMUX_IN0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define ACMP1_OUT_PTB5 KINETIS_MUX('B',5,7) /* PTB5 */
#define XTAL_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define LPI2C0_SDA_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define EXTAL_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define LPI2C0_SCL_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define ADC2_SE11_PTB8 KINETIS_MUX('B',8,0) /* PTB8 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define FTM3_CH0_PTB8 KINETIS_MUX('B',8,2) /* PTB8 */
#define ADC2_SE10_PTB9 KINETIS_MUX('B',9,0) /* PTB9 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define FTM3_CH1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define LPI2C0_SCLS_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ADC2_SE9_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define FTM3_CH2_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define LPI2C0_SDAS_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ADC2_SE8_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define FTM3_CH3_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define LPI2C0_HREQ_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define ADC1_SE7_PTB12 KINETIS_MUX('B',12,0) /* PTB12 */
#define PTB12 KINETIS_MUX('B',12,1) /* PTB12 */
#define FTM0_CH0_PTB12 KINETIS_MUX('B',12,2) /* PTB12 */
#define FTM3_FLT2_PTB12 KINETIS_MUX('B',12,3) /* PTB12 */
#define ADC1_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define ADC2_SE8_PTB13 KINETIS_MUX('B',13,0) /* PTB13 */
#define PTB13 KINETIS_MUX('B',13,1) /* PTB13 */
#define FTM0_CH1_PTB13 KINETIS_MUX('B',13,2) /* PTB13 */
#define FTM3_FLT1_PTB13 KINETIS_MUX('B',13,3) /* PTB13 */
#define ADC1_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define ADC2_SE9_PTB14 KINETIS_MUX('B',14,0) /* PTB14 */
#define PTB14 KINETIS_MUX('B',14,1) /* PTB14 */
#define FTM0_CH2_PTB14 KINETIS_MUX('B',14,2) /* PTB14 */
#define LPSPI1_SCK_PTB14 KINETIS_MUX('B',14,3) /* PTB14 */
#define ADC1_SE14_PTB15 KINETIS_MUX('B',15,0) /* PTB15 */
#define PTB15 KINETIS_MUX('B',15,1) /* PTB15 */
#define FTM0_CH3_PTB15 KINETIS_MUX('B',15,2) /* PTB15 */
#define LPSPI1_SIN_PTB15 KINETIS_MUX('B',15,3) /* PTB15 */
#define ADC1_SE15_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define FTM0_CH4_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define LPSPI1_SOUT_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define ADC2_SE3_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define FTM0_CH5_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define LPSPI1_PCS3_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define ADC0_SE8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define ACMP1_IN4_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define FTM0_CH0_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define FTM1_CH6_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define ACMP1_IN3_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define FTM0_CH1_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define FTM1_CH7_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XTAL32_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ACMP0_IN5_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define ADC0_SE10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define FTM0_CH2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define CAN0_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define ADC0_SE11_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define ACMP0_IN4_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define EXTAL32_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define FTM0_CH3_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define CAN0_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define ACMP0_IN2_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define FTM1_CH0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define RTC_CLKOUT_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define EWM_IN_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define FTM1_QD_PHB_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define SWD_CLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define JTAG_TCLK_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define FTM2_CH0_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define RTC_CLKOUT_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define LPI2C1_HREQ_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define FTM2_QD_PHB_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define JTAG_TDI_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define ADC1_SE4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LPUART1_RX_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define CAN1_RX_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define FTM3_CH2_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define ADC1_SE5_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LPUART1_TX_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define CAN1_TX_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define FTM3_CH3_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC2_SE14_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define LPUART1_RX_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define FTM1_FLT0_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define LPUART0_CTS_PTC8 KINETIS_MUX('C',8,6) /* PTC8 */
#define ADC2_SE15_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define LPUART1_TX_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define FTM1_FLT1_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define LPUART0_RTS_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define FTM3_CH4_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define FTM3_CH5_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define FTM3_CH6_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM2_CH6_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define FTM3_CH7_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM2_CH7_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */
#define ACMP2_IN5_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define ADC0_SE12_PTC14 KINETIS_MUX('C',14,0) /* PTC14 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define FTM1_CH2_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define ACMP2_IN4_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define ADC0_SE13_PTC15 KINETIS_MUX('C',15,0) /* PTC15 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define FTM1_CH3_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define ADC0_SE14_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define FTM1_FLT2_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define LPI2C1_SDAS_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define ADC0_SE15_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define FTM1_FLT3_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define LPI2C1_SCLS_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define ADC2_SE0_PTD0 KINETIS_MUX('D',0,0) /* PTD0 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define FTM0_CH2_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define LPSPI1_SCK_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM2_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FXIO_D0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define TRGMUX_OUT1_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define TRGMUX_OUT1_PTD0 KINETIS_MUX('D',0,7) /* PTD0 */
#define ADC2_SE1_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define FTM0_CH3_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define LPSPI1_SIN_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM2_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FXIO_D1_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define TRGMUX_OUT2_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define TRGMUX_OUT2_PTD1 KINETIS_MUX('D',1,7) /* PTD1 */
#define ADC1_SE2_PTD2 KINETIS_MUX('D',2,0) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define FTM3_CH4_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define LPSPI1_SOUT_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FXIO_D4_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define TRGMUX_IN5_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define TRGMUX_IN5_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define ADC1_SE3_PTD3 KINETIS_MUX('D',3,0) /* PTD3 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define FTM3_CH5_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define LPSPI1_PCS0_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FXIO_D5_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define TRGMUX_IN4_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define TRGMUX_IN4_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define NMI_b_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define ACMP1_IN6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define ADC1_SE6_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define FTM0_FLT3_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define FTM3_FLT3_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define FTM2_CH3_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define LPTMR0_ALT2_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM2_FLT1/TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define PWT_IN2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define TRGMUX_IN7_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define TRGMUX_IN7_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LPUART2_RX_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define FTM2_FLT2_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define LPUART2_TX_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define FTM2_FLT3_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define LPI2C1_SDA_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define FTM2_FLT2_PTD8 KINETIS_MUX('D',8,4) /* PTD8 */
#define FTM1_CH4_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define ACMP1_IN5_PTD9 KINETIS_MUX('D',9,0) /* PTD9 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define LPI2C1_SCL_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define FTM2_FLT3_PTD9 KINETIS_MUX('D',9,4) /* PTD9 */
#define FTM1_CH5_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define FTM2_CH0_PTD10 KINETIS_MUX('D',10,2) /* PTD10 */
#define FTM2_QD_PHB_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define FTM2_CH1_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define FTM2_QD_PHA_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define LPUART2_CTS_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define FTM2_CH2_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define LPI2C1_HREQ_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define LPUART2_RTS_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define FTM2_CH4_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define RTC_CLKOUT_PTD13 KINETIS_MUX('D',13,7) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define FTM2_CH5_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define CLKOUT_PTD14 KINETIS_MUX('D',14,7) /* PTD14 */
#define ACMP2_IN1_PTD15 KINETIS_MUX('D',15,0) /* PTD15 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define FTM0_CH0_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define ACMP2_IN0_PTD16 KINETIS_MUX('D',16,0) /* PTD16 */
#define PTD16 KINETIS_MUX('D',16,1) /* PTD16 */
#define FTM0_CH1_PTD16 KINETIS_MUX('D',16,2) /* PTD16 */
#define PTD17 KINETIS_MUX('D',17,1) /* PTD17 */
#define FTM0_FLT2_PTD17 KINETIS_MUX('D',17,2) /* PTD17 */
#define LPUART2_RX_PTD17 KINETIS_MUX('D',17,3) /* PTD17 */
#define ADC2_SE7_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define LPSPI0_SCK_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define TCLK1_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define LPI2C1_SDA_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define FTM1_FLT2_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define ADC2_SE6_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LPSPI0_SIN_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPI2C0_HREQ_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define LPI2C1_SCL_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define FTM1_FLT1_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC1_SE10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define LPSPI0_SOUT_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define LPTMR0_ALT3_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define FTM3_CH6_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */
#define PWT_IN3_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define LPUART1_CTS_PTE2 KINETIS_MUX('E',2,6) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define FTM0_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define FTM0_FLT0_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define LPUART2_RTS_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define FTM2_FLT0/TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define FTM2_FLT0_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */
#define TRGMUX_IN6_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define TRGMUX_IN6_PTE3 KINETIS_MUX('E',3,6) /* PTE3 */
#define ACMP2_OUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define BUSOUT_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define FTM2_QD_PHB_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define FTM2_CH2_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */
#define CAN0_RX_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#define FXIO_D6_PTE4 KINETIS_MUX('E',4,6) /* PTE4 */
#define EWM_OUT_b_PTE4 KINETIS_MUX('E',4,7) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define TCLK2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define FTM2_QD_PHA_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FTM2_CH3_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */
#define CAN0_TX_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FXIO_D7_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define EWM_IN_PTE5 KINETIS_MUX('E',5,7) /* PTE5 */
#define ADC1_SE11_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ACMP0_IN6_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LPSPI0_PCS2_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define FTM3_CH7_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */
#define LPUART1_RTS_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC2_SE2_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define ACMP2_IN6_PTE7 KINETIS_MUX('E',7,0) /* PTE7 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define FTM0_CH7_PTE7 KINETIS_MUX('E',7,2) /* PTE7 */
#define FTM3_FLT0_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define ACMP0_IN3_PTE8 KINETIS_MUX('E',8,0) /* PTE8 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define FTM0_CH6_PTE8 KINETIS_MUX('E',8,2) /* PTE8 */
#define ACMP2_IN2_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define DAC0_OUT_PTE9 KINETIS_MUX('E',9,0) /* PTE9 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define FTM0_CH7_PTE9 KINETIS_MUX('E',9,2) /* PTE9 */
#define LPUART2_CTS_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define ADC2_SE12_PTE10 KINETIS_MUX('E',10,0) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define CLKOUT_PTE10 KINETIS_MUX('E',10,2) /* PTE10 */
#define FTM2_CH4_PTE10 KINETIS_MUX('E',10,4) /* PTE10 */
#define FXIO_D4_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define TRGMUX_OUT4_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define TRGMUX_OUT4_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10_PTE10 KINETIS_MUX('E',10,7) /* PTE10 */
#define ADC2_SE13_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define PWT_IN1_PTE11 KINETIS_MUX('E',11,2) /* PTE11 */
#define LPTMR0_ALT1_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FTM2_CH5_PTE11 KINETIS_MUX('E',11,4) /* PTE11 */
#define FXIO_D5_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define TRGMUX_OUT5_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define TRGMUX_OUT5_PTE11 KINETIS_MUX('E',11,7) /* PTE11 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FTM0_FLT3_PTE12 KINETIS_MUX('E',12,2) /* PTE12 */
#define LPUART2_TX_PTE12 KINETIS_MUX('E',12,3) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define FTM2_FLT0_PTE13 KINETIS_MUX('E',13,4) /* PTE13 */
#define ACMP2_IN3_PTE14 KINETIS_MUX('E',14,0) /* PTE14 */
#define PTE14 KINETIS_MUX('E',14,1) /* PTE14 */
#define FTM0_FLT1_PTE14 KINETIS_MUX('E',14,2) /* PTE14 */
#define FTM2_FLT1_PTE14 KINETIS_MUX('E',14,4) /* PTE14 */
#define PTE15 KINETIS_MUX('E',15,1) /* PTE15 */
#define FTM2_CH6_PTE15 KINETIS_MUX('E',15,4) /* PTE15 */
#define FXIO_D2_PTE15 KINETIS_MUX('E',15,6) /* PTE15 */
#define TRGMUX_OUT6_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define TRGMUX_OUT6_PTE15 KINETIS_MUX('E',15,7) /* PTE15 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define FTM2_CH7_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO_D3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define TRGMUX_OUT7_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#define TRGMUX_OUT7_PTE16 KINETIS_MUX('E',16,7) /* PTE16 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKL25Z128VFM4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKL25Z128VFM4_
#define _ZEPHYR_DTS_BINDING_MKL25Z128VFM4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */
#define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define UART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define UART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUTa_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define CMP0_OUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKL25Z128VFT4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKL25Z128VFT4_
#define _ZEPHYR_DTS_BINDING_MKL25Z128VFT4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */
#define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define UART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define UART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define TPM2_CH0_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define TPM2_CH1_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_MOSI_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SPI1_MISO_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_MISO_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SPI1_MOSI_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define EXTRG_IN_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define CMP0_OUT_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUTa_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define TPM0_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define TPM0_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_MOSI_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define TPM0_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SPI0_MISO_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_MISO_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define TPM0_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SPI0_MOSI_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define ADC0_DP0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define TPM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define ADC0_SE4a_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define ADC0_DM0_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define TPM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define TPM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define TPM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define ADC0_SE4b_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define TPM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define TPM_CLKIN0_PTE29 KINETIS_MUX('E',29,4) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKL25Z128VLH4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKL25Z128VLH4_
#define _ZEPHYR_DTS_BINDING_MKL25Z128VLH4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */
#define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define TPM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define UART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define UART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define TPM2_CH0_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define TPM2_CH1_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_MOSI_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SPI1_MISO_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_MISO_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SPI1_MOSI_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define EXTRG_IN_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define CMP0_OUT_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUTa_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define I2C0_SCL_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define TPM0_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define I2C0_SDA_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define TPM0_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define TPM0_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define TPM0_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_MOSI_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define TPM0_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SPI0_MISO_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_MISO_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define TPM0_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SPI0_MOSI_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define CMP0_OUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_MOSI_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SPI1_MISO_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC0_DP0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define TPM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define ADC0_SE4a_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define ADC0_DM0_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define TPM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define ADC0_DP3_PTE22 KINETIS_MUX('E',22,0) /* PTE22 */
#define ADC0_SE3_PTE22 KINETIS_MUX('E',22,0) /* PTE22 */
#define PTE22 KINETIS_MUX('E',22,1) /* PTE22 */
#define TPM2_CH0_PTE22 KINETIS_MUX('E',22,3) /* PTE22 */
#define UART2_TX_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define ADC0_SE7a_PTE23 KINETIS_MUX('E',23,0) /* PTE23 */
#define ADC0_DM3_PTE23 KINETIS_MUX('E',23,0) /* PTE23 */
#define PTE23 KINETIS_MUX('E',23,1) /* PTE23 */
#define TPM2_CH1_PTE23 KINETIS_MUX('E',23,3) /* PTE23 */
#define UART2_RX_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define TPM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define TPM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define ADC0_SE4b_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define TPM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define TPM_CLKIN0_PTE29 KINETIS_MUX('E',29,4) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */
#define PTE31 KINETIS_MUX('E',31,1) /* PTE31 */
#define TPM0_CH4_PTE31 KINETIS_MUX('E',31,3) /* PTE31 */
#endif

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@ -1,717 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKL25Z128VLK4/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
TSI0_CH1_PTA0: tsi0_ch1_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
TPM0_CH5_PTA0: tpm0_ch5_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
SWD_CLK_PTA0: swd_clk_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
TSI0_CH2_PTA1: tsi0_ch2_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
UART0_RX_PTA1: uart0_rx_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
TPM2_CH0_PTA1: tpm2_ch0_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TSI0_CH3_PTA2: tsi0_ch3_pta2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
UART0_TX_PTA2: uart0_tx_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
TPM2_CH1_PTA2: tpm2_ch1_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
TSI0_CH4_PTA3: tsi0_ch4_pta3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
I2C1_SCL_PTA3: i2c1_scl_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
TPM0_CH0_PTA3: tpm0_ch0_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
SWD_DIO_PTA3: swd_dio_pta3 {
nxp,kinetis-port-pins = < 3 7 >;
};
TSI0_CH5_PTA4: tsi0_ch5_pta4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTA4: GPIOA_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
I2C1_SDA_PTA4: i2c1_sda_pta4 {
nxp,kinetis-port-pins = < 4 2 >;
};
TPM0_CH1_PTA4: tpm0_ch1_pta4 {
nxp,kinetis-port-pins = < 4 3 >;
};
NMI_b_PTA4: nmi_b_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
PTA5: GPIOA_PTA5: gpioa_pta5 {
nxp,kinetis-port-pins = < 5 1 >;
};
USB_CLKIN_PTA5: usb_clkin_pta5 {
nxp,kinetis-port-pins = < 5 2 >;
};
TPM0_CH2_PTA5: tpm0_ch2_pta5 {
nxp,kinetis-port-pins = < 5 3 >;
};
PTA12: GPIOA_PTA12: gpioa_pta12 {
nxp,kinetis-port-pins = < 12 1 >;
};
TPM1_CH0_PTA12: tpm1_ch0_pta12 {
nxp,kinetis-port-pins = < 12 3 >;
};
PTA13: GPIOA_PTA13: gpioa_pta13 {
nxp,kinetis-port-pins = < 13 1 >;
};
TPM1_CH1_PTA13: tpm1_ch1_pta13 {
nxp,kinetis-port-pins = < 13 3 >;
};
PTA14: GPIOA_PTA14: gpioa_pta14 {
nxp,kinetis-port-pins = < 14 1 >;
};
SPI0_PCS0_PTA14: spi0_pcs0_pta14 {
nxp,kinetis-port-pins = < 14 2 >;
};
UART0_TX_PTA14: uart0_tx_pta14 {
nxp,kinetis-port-pins = < 14 3 >;
};
PTA15: GPIOA_PTA15: gpioa_pta15 {
nxp,kinetis-port-pins = < 15 1 >;
};
SPI0_SCK_PTA15: spi0_sck_pta15 {
nxp,kinetis-port-pins = < 15 2 >;
};
UART0_RX_PTA15: uart0_rx_pta15 {
nxp,kinetis-port-pins = < 15 3 >;
};
PTA16: GPIOA_PTA16: gpioa_pta16 {
nxp,kinetis-port-pins = < 16 1 >;
};
SPI0_MOSI_PTA16: spi0_mosi_pta16 {
nxp,kinetis-port-pins = < 16 2 >;
};
SPI0_MISO_PTA16: spi0_miso_pta16 {
nxp,kinetis-port-pins = < 16 5 >;
};
PTA17: GPIOA_PTA17: gpioa_pta17 {
nxp,kinetis-port-pins = < 17 1 >;
};
SPI0_MISO_PTA17: spi0_miso_pta17 {
nxp,kinetis-port-pins = < 17 2 >;
};
SPI0_MOSI_PTA17: spi0_mosi_pta17 {
nxp,kinetis-port-pins = < 17 5 >;
};
EXTAL0_PTA18: extal0_pta18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTA18: GPIOA_PTA18: gpioa_pta18 {
nxp,kinetis-port-pins = < 18 1 >;
};
UART1_RX_PTA18: uart1_rx_pta18 {
nxp,kinetis-port-pins = < 18 3 >;
};
TPM_CLKIN0_PTA18: tpm_clkin0_pta18 {
nxp,kinetis-port-pins = < 18 4 >;
};
XTAL0_PTA19: xtal0_pta19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTA19: GPIOA_PTA19: gpioa_pta19 {
nxp,kinetis-port-pins = < 19 1 >;
};
UART1_TX_PTA19: uart1_tx_pta19 {
nxp,kinetis-port-pins = < 19 3 >;
};
TPM_CLKIN1_PTA19: tpm_clkin1_pta19 {
nxp,kinetis-port-pins = < 19 4 >;
};
LPTMR0_ALT1_PTA19: lptmr0_alt1_pta19 {
nxp,kinetis-port-pins = < 19 6 >;
};
PTA20: GPIOA_PTA20: gpioa_pta20 {
nxp,kinetis-port-pins = < 20 1 >;
};
RESET_b_PTA20: reset_b_pta20 {
nxp,kinetis-port-pins = < 20 7 >;
};
};
&portb {
ADC0_SE8_PTB0: TSI0_CH0_PTB0: adc0_se8_ptb0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTB0: GPIOB_PTB0: LLWU_P5_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
I2C0_SCL_PTB0: i2c0_scl_ptb0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TPM1_CH0_PTB0: tpm1_ch0_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
ADC0_SE9_PTB1: TSI0_CH6_PTB1: adc0_se9_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
I2C0_SDA_PTB1: i2c0_sda_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
TPM1_CH1_PTB1: tpm1_ch1_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
ADC0_SE12_PTB2: TSI0_CH7_PTB2: adc0_se12_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
I2C0_SCL_PTB2: i2c0_scl_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
TPM2_CH0_PTB2: tpm2_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
ADC0_SE13_PTB3: TSI0_CH8_PTB3: adc0_se13_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
I2C0_SDA_PTB3: i2c0_sda_ptb3 {
nxp,kinetis-port-pins = < 3 2 >;
};
TPM2_CH1_PTB3: tpm2_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 3 >;
};
PTB8: GPIOB_PTB8: gpiob_ptb8 {
nxp,kinetis-port-pins = < 8 1 >;
};
EXTRG_IN_PTB8: extrg_in_ptb8 {
nxp,kinetis-port-pins = < 8 3 >;
};
PTB9: GPIOB_PTB9: gpiob_ptb9 {
nxp,kinetis-port-pins = < 9 1 >;
};
PTB10: GPIOB_PTB10: gpiob_ptb10 {
nxp,kinetis-port-pins = < 10 1 >;
};
SPI1_PCS0_PTB10: spi1_pcs0_ptb10 {
nxp,kinetis-port-pins = < 10 2 >;
};
PTB11: GPIOB_PTB11: gpiob_ptb11 {
nxp,kinetis-port-pins = < 11 1 >;
};
SPI1_SCK_PTB11: spi1_sck_ptb11 {
nxp,kinetis-port-pins = < 11 2 >;
};
TSI0_CH9_PTB16: tsi0_ch9_ptb16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTB16: GPIOB_PTB16: gpiob_ptb16 {
nxp,kinetis-port-pins = < 16 1 >;
};
SPI1_MOSI_PTB16: spi1_mosi_ptb16 {
nxp,kinetis-port-pins = < 16 2 >;
};
UART0_RX_PTB16: uart0_rx_ptb16 {
nxp,kinetis-port-pins = < 16 3 >;
};
TPM_CLKIN0_PTB16: tpm_clkin0_ptb16 {
nxp,kinetis-port-pins = < 16 4 >;
};
SPI1_MISO_PTB16: spi1_miso_ptb16 {
nxp,kinetis-port-pins = < 16 5 >;
};
TSI0_CH10_PTB17: tsi0_ch10_ptb17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTB17: GPIOB_PTB17: gpiob_ptb17 {
nxp,kinetis-port-pins = < 17 1 >;
};
SPI1_MISO_PTB17: spi1_miso_ptb17 {
nxp,kinetis-port-pins = < 17 2 >;
};
UART0_TX_PTB17: uart0_tx_ptb17 {
nxp,kinetis-port-pins = < 17 3 >;
};
TPM_CLKIN1_PTB17: tpm_clkin1_ptb17 {
nxp,kinetis-port-pins = < 17 4 >;
};
SPI1_MOSI_PTB17: spi1_mosi_ptb17 {
nxp,kinetis-port-pins = < 17 5 >;
};
TSI0_CH11_PTB18: tsi0_ch11_ptb18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTB18: GPIOB_PTB18: gpiob_ptb18 {
nxp,kinetis-port-pins = < 18 1 >;
};
TPM2_CH0_PTB18: tpm2_ch0_ptb18 {
nxp,kinetis-port-pins = < 18 3 >;
};
TSI0_CH12_PTB19: tsi0_ch12_ptb19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTB19: GPIOB_PTB19: gpiob_ptb19 {
nxp,kinetis-port-pins = < 19 1 >;
};
TPM2_CH1_PTB19: tpm2_ch1_ptb19 {
nxp,kinetis-port-pins = < 19 3 >;
};
};
&portc {
ADC0_SE14_PTC0: TSI0_CH13_PTC0: adc0_se14_ptc0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTC0: GPIOC_PTC0: gpioc_ptc0 {
nxp,kinetis-port-pins = < 0 1 >;
};
EXTRG_IN_PTC0: extrg_in_ptc0 {
nxp,kinetis-port-pins = < 0 3 >;
};
CMP0_OUT_PTC0: cmp0_out_ptc0 {
nxp,kinetis-port-pins = < 0 5 >;
};
ADC0_SE15_PTC1: TSI0_CH14_PTC1: adc0_se15_ptc1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTC1: GPIOC_PTC1: LLWU_P6_PTC1: RTC_CLKIN_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
I2C1_SCL_PTC1: i2c1_scl_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
TPM0_CH0_PTC1: tpm0_ch0_ptc1 {
nxp,kinetis-port-pins = < 1 4 >;
};
ADC0_SE11_PTC2: TSI0_CH15_PTC2: adc0_se11_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
I2C1_SDA_PTC2: i2c1_sda_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
TPM0_CH1_PTC2: tpm0_ch1_ptc2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PTC3: GPIOC_PTC3: LLWU_P7_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
UART1_RX_PTC3: uart1_rx_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
TPM0_CH2_PTC3: tpm0_ch2_ptc3 {
nxp,kinetis-port-pins = < 3 4 >;
};
CLKOUTa_PTC3: clkouta_ptc3 {
nxp,kinetis-port-pins = < 3 5 >;
};
PTC4: GPIOC_PTC4: LLWU_P8_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI0_PCS0_PTC4: spi0_pcs0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART1_TX_PTC4: uart1_tx_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TPM0_CH3_PTC4: tpm0_ch3_ptc4 {
nxp,kinetis-port-pins = < 4 4 >;
};
PTC5: GPIOC_PTC5: LLWU_P9_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI0_SCK_PTC5: spi0_sck_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTC5: lptmr0_alt2_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
CMP0_OUT_PTC5: cmp0_out_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
CMP0_IN0_PTC6: cmp0_in0_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: LLWU_P10_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI0_MOSI_PTC6: spi0_mosi_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
EXTRG_IN_PTC6: extrg_in_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
SPI0_MISO_PTC6: spi0_miso_ptc6 {
nxp,kinetis-port-pins = < 6 5 >;
};
CMP0_IN1_PTC7: cmp0_in1_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
SPI0_MISO_PTC7: spi0_miso_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
SPI0_MOSI_PTC7: spi0_mosi_ptc7 {
nxp,kinetis-port-pins = < 7 5 >;
};
CMP0_IN2_PTC8: cmp0_in2_ptc8 {
nxp,kinetis-port-pins = < 8 0 >;
};
PTC8: GPIOC_PTC8: gpioc_ptc8 {
nxp,kinetis-port-pins = < 8 1 >;
};
I2C0_SCL_PTC8: i2c0_scl_ptc8 {
nxp,kinetis-port-pins = < 8 2 >;
};
TPM0_CH4_PTC8: tpm0_ch4_ptc8 {
nxp,kinetis-port-pins = < 8 3 >;
};
CMP0_IN3_PTC9: cmp0_in3_ptc9 {
nxp,kinetis-port-pins = < 9 0 >;
};
PTC9: GPIOC_PTC9: gpioc_ptc9 {
nxp,kinetis-port-pins = < 9 1 >;
};
I2C0_SDA_PTC9: i2c0_sda_ptc9 {
nxp,kinetis-port-pins = < 9 2 >;
};
TPM0_CH5_PTC9: tpm0_ch5_ptc9 {
nxp,kinetis-port-pins = < 9 3 >;
};
PTC10: GPIOC_PTC10: gpioc_ptc10 {
nxp,kinetis-port-pins = < 10 1 >;
};
I2C1_SCL_PTC10: i2c1_scl_ptc10 {
nxp,kinetis-port-pins = < 10 2 >;
};
PTC11: GPIOC_PTC11: gpioc_ptc11 {
nxp,kinetis-port-pins = < 11 1 >;
};
I2C1_SDA_PTC11: i2c1_sda_ptc11 {
nxp,kinetis-port-pins = < 11 2 >;
};
PTC12: GPIOC_PTC12: gpioc_ptc12 {
nxp,kinetis-port-pins = < 12 1 >;
};
TPM_CLKIN0_PTC12: tpm_clkin0_ptc12 {
nxp,kinetis-port-pins = < 12 4 >;
};
PTC13: GPIOC_PTC13: gpioc_ptc13 {
nxp,kinetis-port-pins = < 13 1 >;
};
TPM_CLKIN1_PTC13: tpm_clkin1_ptc13 {
nxp,kinetis-port-pins = < 13 4 >;
};
PTC16: GPIOC_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
PTC17: GPIOC_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
};
&portd {
PTD0: GPIOD_PTD0: gpiod_ptd0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI0_PCS0_PTD0: spi0_pcs0_ptd0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TPM0_CH0_PTD0: tpm0_ch0_ptd0 {
nxp,kinetis-port-pins = < 0 4 >;
};
ADC0_SE5b_PTD1: adc0_se5b_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI0_SCK_PTD1: spi0_sck_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
TPM0_CH1_PTD1: tpm0_ch1_ptd1 {
nxp,kinetis-port-pins = < 1 4 >;
};
PTD2: GPIOD_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI0_MOSI_PTD2: spi0_mosi_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART2_RX_PTD2: uart2_rx_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
TPM0_CH2_PTD2: tpm0_ch2_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
SPI0_MISO_PTD2: spi0_miso_ptd2 {
nxp,kinetis-port-pins = < 2 5 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI0_MISO_PTD3: spi0_miso_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART2_TX_PTD3: uart2_tx_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
TPM0_CH3_PTD3: tpm0_ch3_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
SPI0_MOSI_PTD3: spi0_mosi_ptd3 {
nxp,kinetis-port-pins = < 3 5 >;
};
PTD4: GPIOD_PTD4: LLWU_P14_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI1_PCS0_PTD4: spi1_pcs0_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART2_RX_PTD4: uart2_rx_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
TPM0_CH4_PTD4: tpm0_ch4_ptd4 {
nxp,kinetis-port-pins = < 4 4 >;
};
ADC0_SE6b_PTD5: adc0_se6b_ptd5 {
nxp,kinetis-port-pins = < 5 0 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI1_SCK_PTD5: spi1_sck_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
UART2_TX_PTD5: uart2_tx_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
TPM0_CH5_PTD5: tpm0_ch5_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
ADC0_SE7b_PTD6: adc0_se7b_ptd6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTD6: GPIOD_PTD6: LLWU_P15_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI1_MOSI_PTD6: spi1_mosi_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
UART0_RX_PTD6: uart0_rx_ptd6 {
nxp,kinetis-port-pins = < 6 3 >;
};
SPI1_MISO_PTD6: spi1_miso_ptd6 {
nxp,kinetis-port-pins = < 6 5 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
SPI1_MISO_PTD7: spi1_miso_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
UART0_TX_PTD7: uart0_tx_ptd7 {
nxp,kinetis-port-pins = < 7 3 >;
};
SPI1_MOSI_PTD7: spi1_mosi_ptd7 {
nxp,kinetis-port-pins = < 7 5 >;
};
};
&porte {
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
UART1_TX_PTE0: uart1_tx_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
RTC_CLKOUT_PTE0: rtc_clkout_pte0 {
nxp,kinetis-port-pins = < 0 4 >;
};
CMP0_OUT_PTE0: cmp0_out_pte0 {
nxp,kinetis-port-pins = < 0 5 >;
};
I2C1_SDA_PTE0: i2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
PTE1: GPIOE_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI1_MOSI_PTE1: spi1_mosi_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART1_RX_PTE1: uart1_rx_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
SPI1_MISO_PTE1: spi1_miso_pte1 {
nxp,kinetis-port-pins = < 1 5 >;
};
I2C1_SCL_PTE1: i2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
PTE2: GPIOE_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI1_SCK_PTE2: spi1_sck_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI1_MISO_PTE3: spi1_miso_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
SPI1_MOSI_PTE3: spi1_mosi_pte3 {
nxp,kinetis-port-pins = < 3 5 >;
};
PTE4: GPIOE_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI1_PCS0_PTE4: spi1_pcs0_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
PTE5: GPIOE_PTE5: gpioe_pte5 {
nxp,kinetis-port-pins = < 5 1 >;
};
ADC0_DP0_PTE20: ADC0_SE0_PTE20: adc0_dp0_pte20 {
nxp,kinetis-port-pins = < 20 0 >;
};
PTE20: GPIOE_PTE20: gpioe_pte20 {
nxp,kinetis-port-pins = < 20 1 >;
};
TPM1_CH0_PTE20: tpm1_ch0_pte20 {
nxp,kinetis-port-pins = < 20 3 >;
};
UART0_TX_PTE20: uart0_tx_pte20 {
nxp,kinetis-port-pins = < 20 4 >;
};
ADC0_DM0_PTE21: ADC0_SE4a_PTE21: adc0_dm0_pte21 {
nxp,kinetis-port-pins = < 21 0 >;
};
PTE21: GPIOE_PTE21: gpioe_pte21 {
nxp,kinetis-port-pins = < 21 1 >;
};
TPM1_CH1_PTE21: tpm1_ch1_pte21 {
nxp,kinetis-port-pins = < 21 3 >;
};
UART0_RX_PTE21: uart0_rx_pte21 {
nxp,kinetis-port-pins = < 21 4 >;
};
ADC0_DP3_PTE22: ADC0_SE3_PTE22: adc0_dp3_pte22 {
nxp,kinetis-port-pins = < 22 0 >;
};
PTE22: GPIOE_PTE22: gpioe_pte22 {
nxp,kinetis-port-pins = < 22 1 >;
};
TPM2_CH0_PTE22: tpm2_ch0_pte22 {
nxp,kinetis-port-pins = < 22 3 >;
};
UART2_TX_PTE22: uart2_tx_pte22 {
nxp,kinetis-port-pins = < 22 4 >;
};
ADC0_DM3_PTE23: ADC0_SE7a_PTE23: adc0_dm3_pte23 {
nxp,kinetis-port-pins = < 23 0 >;
};
PTE23: GPIOE_PTE23: gpioe_pte23 {
nxp,kinetis-port-pins = < 23 1 >;
};
TPM2_CH1_PTE23: tpm2_ch1_pte23 {
nxp,kinetis-port-pins = < 23 3 >;
};
UART2_RX_PTE23: uart2_rx_pte23 {
nxp,kinetis-port-pins = < 23 4 >;
};
PTE24: GPIOE_PTE24: gpioe_pte24 {
nxp,kinetis-port-pins = < 24 1 >;
};
TPM0_CH0_PTE24: tpm0_ch0_pte24 {
nxp,kinetis-port-pins = < 24 3 >;
};
I2C0_SCL_PTE24: i2c0_scl_pte24 {
nxp,kinetis-port-pins = < 24 5 >;
};
PTE25: GPIOE_PTE25: gpioe_pte25 {
nxp,kinetis-port-pins = < 25 1 >;
};
TPM0_CH1_PTE25: tpm0_ch1_pte25 {
nxp,kinetis-port-pins = < 25 3 >;
};
I2C0_SDA_PTE25: i2c0_sda_pte25 {
nxp,kinetis-port-pins = < 25 5 >;
};
CMP0_IN5_PTE29: ADC0_SE4b_PTE29: cmp0_in5_pte29 {
nxp,kinetis-port-pins = < 29 0 >;
};
PTE29: GPIOE_PTE29: gpioe_pte29 {
nxp,kinetis-port-pins = < 29 1 >;
};
TPM0_CH2_PTE29: tpm0_ch2_pte29 {
nxp,kinetis-port-pins = < 29 3 >;
};
TPM_CLKIN0_PTE29: tpm_clkin0_pte29 {
nxp,kinetis-port-pins = < 29 4 >;
};
DAC0_OUT_PTE30: ADC0_SE23_PTE30: CMP0_IN4_PTE30: dac0_out_pte30 {
nxp,kinetis-port-pins = < 30 0 >;
};
PTE30: GPIOE_PTE30: gpioe_pte30 {
nxp,kinetis-port-pins = < 30 1 >;
};
TPM0_CH3_PTE30: tpm0_ch3_pte30 {
nxp,kinetis-port-pins = < 30 3 >;
};
TPM_CLKIN1_PTE30: tpm_clkin1_pte30 {
nxp,kinetis-port-pins = < 30 4 >;
};
PTE31: GPIOE_PTE31: gpioe_pte31 {
nxp,kinetis-port-pins = < 31 1 >;
};
TPM0_CH4_PTE31: tpm0_ch4_pte31 {
nxp,kinetis-port-pins = < 31 3 >;
};
};

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@ -0,0 +1,269 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKL25Z128VLK4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKL25Z128VLK4_
#define _ZEPHYR_DTS_BINDING_MKL25Z128VLK4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */
#define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
#define TPM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define TPM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define TPM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_MOSI_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define SPI0_MISO_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_MISO_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define SPI0_MOSI_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define UART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define UART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define TSI0_CH7_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define TPM2_CH0_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define TSI0_CH8_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define TPM2_CH1_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define EXTRG_IN_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define TSI0_CH9_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_MOSI_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define TPM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define SPI1_MISO_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define TSI0_CH10_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_MISO_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define TPM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define SPI1_MOSI_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define TSI0_CH11_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define TPM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define TSI0_CH12_PTB19 KINETIS_MUX('B',19,0) /* PTB19 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define TPM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define TSI0_CH13_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define EXTRG_IN_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define CMP0_OUT_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUTa_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define I2C0_SCL_PTC8 KINETIS_MUX('C',8,2) /* PTC8 */
#define TPM0_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define I2C0_SDA_PTC9 KINETIS_MUX('C',9,2) /* PTC9 */
#define TPM0_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define TPM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define TPM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define TPM0_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define TPM0_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_MOSI_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define TPM0_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define SPI0_MISO_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_MISO_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define TPM0_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define SPI0_MOSI_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define CMP0_OUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_MOSI_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SPI1_MISO_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_MISO_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define SPI1_MOSI_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define ADC0_DP0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE0_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define TPM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define ADC0_SE4a_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define ADC0_DM0_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define TPM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define ADC0_DP3_PTE22 KINETIS_MUX('E',22,0) /* PTE22 */
#define ADC0_SE3_PTE22 KINETIS_MUX('E',22,0) /* PTE22 */
#define PTE22 KINETIS_MUX('E',22,1) /* PTE22 */
#define TPM2_CH0_PTE22 KINETIS_MUX('E',22,3) /* PTE22 */
#define UART2_TX_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define ADC0_SE7a_PTE23 KINETIS_MUX('E',23,0) /* PTE23 */
#define ADC0_DM3_PTE23 KINETIS_MUX('E',23,0) /* PTE23 */
#define PTE23 KINETIS_MUX('E',23,1) /* PTE23 */
#define TPM2_CH1_PTE23 KINETIS_MUX('E',23,3) /* PTE23 */
#define UART2_RX_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define TPM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define TPM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define ADC0_SE4b_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define TPM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define TPM_CLKIN0_PTE29 KINETIS_MUX('E',29,4) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */
#define PTE31 KINETIS_MUX('E',31,1) /* PTE31 */
#define TPM0_CH4_PTE31 KINETIS_MUX('E',31,3) /* PTE31 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKV58F1M0VLL24/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKV58F1M0VLL24_
#define _ZEPHYR_DTS_BINDING_MKV58F1M0VLL24_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define XB_IN4_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4/EWM_IN_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define CMP0_OUT_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM2_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define CMP1_OUT_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FTM2_QD_PHB_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define FTM1_CH0_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define XB_IN9_PTA3_PTA3_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define EWM_OUT_b_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define FLEXPWM0_A0_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define XB_IN10_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10/FTM0_FLT3_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define FLEXPWM0_B0_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define I2C0_SCL_PTA12 KINETIS_MUX('A',12,8) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define I2C1_SDA_PTA13 KINETIS_MUX('A',13,8) /* PTA13 */
#define CMP3_IN0_PTA14 KINETIS_MUX('A',14,0) /* PTA14 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define CAN2_TX_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2C1_SCL_PTA14 KINETIS_MUX('A',14,8) /* PTA14 */
#define CMP3_IN1_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define CAN2_RX_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define CMP3_IN2_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define HSADC0A_CH15_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define XB_IN7_PTA18_PTA18_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XB_OUT8_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */
#define FTM3_CH2_PTA18 KINETIS_MUX('A',18,6) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define XB_IN8_PTA19_PTA19_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8/FTM1_FLT0_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define XB_OUT9_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define HSADC0B_CH2_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define UART0_RX_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define HSADC0B_CH3_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM0_FLT2_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define EWM_IN_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define UART0_TX_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define CMP2_IN2_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define HSADC0A_CH14_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT1_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define CMP3_IN5_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define HSADC0B_CH15_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ENET0_1588_TMR2_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define HSADC0B_CH6_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ENET0_1588_TMR3_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define HSADC0B_CH7_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN2_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define CAN0_TX_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define EWM_IN/XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16_PTB16_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define CAN0_RX_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define FTM3_CH2_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FLEXPWM1_A1_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define FTM3_CH3_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FLEXPWM1_B1_PTB19 KINETIS_MUX('B',19,5) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define FLEXPWM0_X0_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define FLEXPWM0_X1_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define FLEXPWM0_X2_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define FLEXPWM0_X3_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define CMP3_OUT_PTB23 KINETIS_MUX('B',23,6) /* PTB23 */
#define HSADC0B_CH8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define FTM0_FLT1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define SPI0_PCS0_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define HSADC0B_CH9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define FLEXPWM0_A3_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define XB_IN11_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1_PTC1_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define HSADC1B_CH10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define FLEXPWM0_B3_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define XB_IN6_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define FTM3_FLT0_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define XB_IN2_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP2_IN4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define PDB0_EXTRG/XB_IN3_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define UART0_RX_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define XB_OUT6_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define I2C0_SCL_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP3_IN4_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define XB_IN4_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define UART0_TX_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define XB_OUT7_PTC7 KINETIS_MUX('C',7,6) /* PTC7 */
#define I2C0_SDA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define HSADC1B_CH11_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define FLEXPWM1_A2_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define HSADC1B_CH12_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define FLEXPWM1_B2_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define HSADC1B_CH13_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define FLEXPWM1_A3_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define HSADC1B_CH14_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define FLEXPWM1_B3_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define CAN2_TX_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define FLEXPWM1_A1_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define SPI2_PCS1_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,9) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define CAN2_RX_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define FLEXPWM1_B1_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,9) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define I2C1_SCL_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define I2C0_SCL_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define FLEXPWM1_A0_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,9) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define I2C1_SDA_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define I2C0_SDA_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define FLEXPWM1_B0_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,9) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define CAN1_RX_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define FLEXPWM1_A2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define CAN1_TX_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define FLEXPWM1_B2_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define FLEXPWM1_A3_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FTM0_CH0_PTD0 KINETIS_MUX('D',0,5) /* PTD0 */
#define FLEXPWM0_A0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define FLEXPWM1_A0_PTD0 KINETIS_MUX('D',0,9) /* PTD0 */
#define HSADC1A_CH11_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FTM0_CH1_PTD1 KINETIS_MUX('D',1,5) /* PTD1 */
#define FLEXPWM0_B0_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define FLEXPWM1_B0_PTD1 KINETIS_MUX('D',1,9) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define FTM0_CH2_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define FLEXPWM0_A1_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define FLEXPWM1_A1_PTD2 KINETIS_MUX('D',2,9) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define FTM0_CH3_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define FLEXPWM0_B1_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define FLEXPWM1_B1_PTD3 KINETIS_MUX('D',3,9) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define FLEXPWM0_A2_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define HSADC1A_CH8_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define FLEXPWM0_B2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define HSADC1A_CH9_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM1_CH0_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM1_CH1_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define HSADC1A_CH0_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define HSADC0B_CH16_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define XB_OUT10_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define XB_IN11_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,8) /* PTE0 */
#define HSADC0B_CH17_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define HSADC1A_CH1_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define XB_OUT11_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define XB_IN7_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,8) /* PTE1 */
#define HSADC1B_CH0_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define HSADC0B_CH10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,8) /* PTE2 */
#define HSADC1B_CH1_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define HSADC0B_CH11_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,8) /* PTE3 */
#define ADC0_DP2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define ADC0_SE2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define HSADC1A_CH4_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,8) /* PTE4 */
#define ADC0_DM2_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define HSADC1A_CH5_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define ADC0_SE10_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FLEXPWM1_A0_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define HSADC1B_CH7_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC0_SE4a_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define FLEXPWM1_B0_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define ADC0_DP1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define ADC0_SE1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define HSADC0A_CH0_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define SPI0_PCS0_PTE16 KINETIS_MUX('E',16,2) /* PTE16 */
#define UART2_TX_PTE16 KINETIS_MUX('E',16,3) /* PTE16 */
#define FTM_CLKIN0_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FTM0_FLT3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define HSADC0A_CH1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_DM1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_SE9_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define LLWU_P19_PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define SPI0_SCK_PTE17 KINETIS_MUX('E',17,2) /* PTE17 */
#define UART2_RX_PTE17 KINETIS_MUX('E',17,3) /* PTE17 */
#define FTM_CLKIN1_PTE17 KINETIS_MUX('E',17,4) /* PTE17 */
#define LPTMR0_ALT3_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define HSADC0B_CH0_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define ADC0_SE5a_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define LLWU_P20_PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define SPI0_SOUT_PTE18 KINETIS_MUX('E',18,2) /* PTE18 */
#define UART2_CTS_b_PTE18 KINETIS_MUX('E',18,3) /* PTE18 */
#define I2C0_SDA_PTE18 KINETIS_MUX('E',18,4) /* PTE18 */
#define HSADC0B_CH1_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define ADC0_SE6a_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define PTE19 KINETIS_MUX('E',19,1) /* PTE19 */
#define SPI0_SIN_PTE19 KINETIS_MUX('E',19,2) /* PTE19 */
#define UART2_RTS_b_PTE19 KINETIS_MUX('E',19,3) /* PTE19 */
#define I2C0_SCL_PTE19 KINETIS_MUX('E',19,4) /* PTE19 */
#define CMP3_OUT_PTE19 KINETIS_MUX('E',19,6) /* PTE19 */
#define HSADC0A_CH8_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE5b_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define FTM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define FTM1_QD_PHA_PTE20 KINETIS_MUX('E',20,5) /* PTE20 */
#define HSADC0A_CH9_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define HSADC1A_CH7_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define XB_IN9_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define FTM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define FTM1_QD_PHB_PTE21 KINETIS_MUX('E',21,5) /* PTE21 */
#define HSADC0B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define HSADC1B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define CAN1_TX_PTE24 KINETIS_MUX('E',24,2) /* PTE24 */
#define FTM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define XB_IN2_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define XB_OUT4_PTE24 KINETIS_MUX('E',24,7) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,8) /* PTE24 */
#define HSADC1B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define HSADC0B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define LLWU_P21_PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define CAN1_RX_PTE25 KINETIS_MUX('E',25,2) /* PTE25 */
#define FTM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define XB_IN3_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3/EWM_IN_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define XB_OUT5_PTE25 KINETIS_MUX('E',25,7) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,8) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define FTM0_CH4_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,8) /* PTE26 */
#define CMP1_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define HSADC0A_CH4_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define FTM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define FTM_CLKIN0_PTE29 KINETIS_MUX('E',29,5) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define HSADC0A_CH5_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP1_IN3_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define FTM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define FTM_CLKIN1_PTE30 KINETIS_MUX('E',30,5) /* PTE30 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKV58F1M0VLQ24/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKV58F1M0VLQ24_
#define _ZEPHYR_DTS_BINDING_MKV58F1M0VLQ24_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define XB_IN4_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4/EWM_IN_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define CMP0_OUT_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM2_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define CMP1_OUT_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FTM2_QD_PHB_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define FTM1_CH0_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define XB_IN9_PTA3_PTA3_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define EWM_OUT_b_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define FLEXPWM0_A0_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define XB_IN10_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10/FTM0_FLT3_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define FLEXPWM0_B0_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define HSADC1B_CH8_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define RMII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define MII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define HSADC1B_CH9_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define MII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define RMII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,5) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define I2C0_SDA_PTA11 KINETIS_MUX('A',11,8) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define I2C0_SCL_PTA12 KINETIS_MUX('A',12,8) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define I2C1_SDA_PTA13 KINETIS_MUX('A',13,8) /* PTA13 */
#define CMP3_IN0_PTA14 KINETIS_MUX('A',14,0) /* PTA14 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define CAN2_TX_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2C1_SCL_PTA14 KINETIS_MUX('A',14,8) /* PTA14 */
#define CMP3_IN1_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define CAN2_RX_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define CMP3_IN2_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define HSADC0A_CH15_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define XB_IN7_PTA18_PTA18_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XB_OUT8_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */
#define FTM3_CH2_PTA18 KINETIS_MUX('A',18,6) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define XB_IN8_PTA19_PTA19_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8/FTM1_FLT0_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define XB_OUT9_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define XB_IN4_PTA24_PTA24_PTA24_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define XB_IN4_PTA24_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define XB_IN4_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,5) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define XB_IN5_PTA25_PTA25_PTA25_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define XB_IN5_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define XB_IN5_PTA25_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,5) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,5) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,5) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,5) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,5) /* PTA29 */
#define HSADC0B_CH2_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define UART0_RX_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define HSADC0B_CH3_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM0_FLT2_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define EWM_IN_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define UART0_TX_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define CMP2_IN2_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define HSADC0A_CH14_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT1_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define CMP3_IN5_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define HSADC0B_CH15_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC0_SE6b_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FLEXPWM1_X0_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC0_SE7b_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FLEXPWM1_X1_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,5) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define HSADC1A_CH12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define CAN2_TX_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define FLEXPWM1_X2_PTB6 KINETIS_MUX('B',6,4) /* PTB6 */
#define HSADC1A_CH13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define CAN2_RX_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define FLEXPWM1_X3_PTB7 KINETIS_MUX('B',7,4) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ENET0_1588_TMR2_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define HSADC0B_CH6_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ENET0_1588_TMR3_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define HSADC0B_CH7_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN2_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define CAN0_TX_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define EWM_IN/XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16_PTB16_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define CAN0_RX_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define FTM3_CH2_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FLEXPWM1_A1_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define FTM3_CH3_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FLEXPWM1_B1_PTB19 KINETIS_MUX('B',19,5) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define FLEXPWM0_X0_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define FLEXPWM0_X1_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define FLEXPWM0_X2_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define FLEXPWM0_X3_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define CMP3_OUT_PTB23 KINETIS_MUX('B',23,6) /* PTB23 */
#define HSADC0B_CH8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define FTM0_FLT1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define SPI0_PCS0_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define HSADC0B_CH9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define FLEXPWM0_A3_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define XB_IN11_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1_PTC1_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define HSADC1B_CH10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define FLEXPWM0_B3_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define XB_IN6_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define FTM3_FLT0_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define XB_IN2_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP2_IN4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define PDB0_EXTRG/XB_IN3_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define UART0_RX_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define XB_OUT6_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define I2C0_SCL_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP3_IN4_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define XB_IN4_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define UART0_TX_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define XB_OUT7_PTC7 KINETIS_MUX('C',7,6) /* PTC7 */
#define I2C0_SDA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define HSADC1B_CH11_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define FLEXPWM1_A2_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define HSADC1B_CH12_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define FLEXPWM1_B2_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define HSADC1B_CH13_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define FLEXPWM1_A3_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define HSADC1B_CH14_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define FLEXPWM1_B3_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define CAN2_TX_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define FLEXPWM1_A1_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define SPI2_PCS1_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,9) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define CAN2_RX_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define FLEXPWM1_B1_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,9) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define I2C1_SCL_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define I2C0_SCL_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define FLEXPWM1_A0_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,9) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define I2C1_SDA_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define I2C0_SDA_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define FLEXPWM1_B0_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,9) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define CAN1_RX_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define FLEXPWM1_A2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define CAN1_TX_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define FLEXPWM1_B2_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define FLEXPWM1_A3_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define FLEXPWM1_B3_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FTM0_CH0_PTD0 KINETIS_MUX('D',0,5) /* PTD0 */
#define FLEXPWM0_A0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define FLEXPWM1_A0_PTD0 KINETIS_MUX('D',0,9) /* PTD0 */
#define HSADC1A_CH11_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FTM0_CH1_PTD1 KINETIS_MUX('D',1,5) /* PTD1 */
#define FLEXPWM0_B0_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define FLEXPWM1_B0_PTD1 KINETIS_MUX('D',1,9) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define FTM0_CH2_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define FLEXPWM0_A1_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define FLEXPWM1_A1_PTD2 KINETIS_MUX('D',2,9) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define FTM0_CH3_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define FLEXPWM0_B1_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define FLEXPWM1_B1_PTD3 KINETIS_MUX('D',3,9) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define FLEXPWM0_A2_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define HSADC1A_CH8_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define FLEXPWM0_B2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define HSADC1A_CH9_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM1_CH0_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM1_CH1_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C1_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define FLEXPWM0_A3_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C1_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define FLEXPWM0_B3_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define FLEXPWM0_A2_PTD10 KINETIS_MUX('D',10,6) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define FLEXPWM0_B2_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define XB_IN5_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_IN5_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define FTM3_FLT0/XB_IN5_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_IN5_PTD12_PTD12_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_OUT5_PTD12 KINETIS_MUX('D',12,5) /* PTD12 */
#define FLEXPWM0_A1_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define XB_IN7_PTD13_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_IN7_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_IN7_PTD13_PTD13_PTD13_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_OUT7_PTD13 KINETIS_MUX('D',13,5) /* PTD13 */
#define FLEXPWM0_B1_PTD13 KINETIS_MUX('D',13,6) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define XB_IN11_PTD14_PTD14_PTD14_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_IN11_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_IN11_PTD14_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_OUT11_PTD14 KINETIS_MUX('D',14,5) /* PTD14 */
#define FLEXPWM0_A0_PTD14 KINETIS_MUX('D',14,6) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define FLEXPWM0_B0_PTD15 KINETIS_MUX('D',15,6) /* PTD15 */
#define HSADC1A_CH0_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define HSADC0B_CH16_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define XB_OUT10_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define XB_IN11_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,8) /* PTE0 */
#define HSADC0B_CH17_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define HSADC1A_CH1_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define XB_OUT11_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define XB_IN7_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,8) /* PTE1 */
#define HSADC1B_CH0_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define HSADC0B_CH10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,8) /* PTE2 */
#define HSADC1B_CH1_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define HSADC0B_CH11_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,8) /* PTE3 */
#define ADC0_DP2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define ADC0_SE2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define HSADC1A_CH4_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,8) /* PTE4 */
#define ADC0_DM2_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define HSADC1A_CH5_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define ADC0_SE10_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FLEXPWM1_A0_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define HSADC1B_CH7_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC0_SE4a_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define FLEXPWM1_B0_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define FLEXPWM1_A1_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define UART5_TX_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define FLEXPWM1_B1_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define UART5_RX_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define FLEXPWM1_A2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define UART5_CTS_b_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define FLEXPWM1_B2_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define ADC0_DP3_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define ADC0_SE3_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define HSADC1A_CH6_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define UART5_RTS_b_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FLEXPWM1_A3_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define HSADC1B_CH6_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define ADC0_SE11_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define ADC0_DM3_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FLEXPWM1_B3_PTE12 KINETIS_MUX('E',12,5) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define ADC0_DP1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define ADC0_SE1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define HSADC0A_CH0_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define SPI0_PCS0_PTE16 KINETIS_MUX('E',16,2) /* PTE16 */
#define UART2_TX_PTE16 KINETIS_MUX('E',16,3) /* PTE16 */
#define FTM_CLKIN0_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FTM0_FLT3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define HSADC0A_CH1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_DM1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_SE9_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define LLWU_P19_PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define SPI0_SCK_PTE17 KINETIS_MUX('E',17,2) /* PTE17 */
#define UART2_RX_PTE17 KINETIS_MUX('E',17,3) /* PTE17 */
#define FTM_CLKIN1_PTE17 KINETIS_MUX('E',17,4) /* PTE17 */
#define LPTMR0_ALT3_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define HSADC0B_CH0_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define ADC0_SE5a_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define LLWU_P20_PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define SPI0_SOUT_PTE18 KINETIS_MUX('E',18,2) /* PTE18 */
#define UART2_CTS_b_PTE18 KINETIS_MUX('E',18,3) /* PTE18 */
#define I2C0_SDA_PTE18 KINETIS_MUX('E',18,4) /* PTE18 */
#define HSADC0B_CH1_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define ADC0_SE6a_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define PTE19 KINETIS_MUX('E',19,1) /* PTE19 */
#define SPI0_SIN_PTE19 KINETIS_MUX('E',19,2) /* PTE19 */
#define UART2_RTS_b_PTE19 KINETIS_MUX('E',19,3) /* PTE19 */
#define I2C0_SCL_PTE19 KINETIS_MUX('E',19,4) /* PTE19 */
#define CMP3_OUT_PTE19 KINETIS_MUX('E',19,6) /* PTE19 */
#define HSADC0A_CH8_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE5b_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define FTM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define FTM1_QD_PHA_PTE20 KINETIS_MUX('E',20,5) /* PTE20 */
#define HSADC0A_CH9_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define HSADC1A_CH7_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define XB_IN9_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define FTM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define FTM1_QD_PHB_PTE21 KINETIS_MUX('E',21,5) /* PTE21 */
#define PTE22 KINETIS_MUX('E',22,1) /* PTE22 */
#define FTM2_CH0_PTE22 KINETIS_MUX('E',22,3) /* PTE22 */
#define XB_IN2_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define XB_IN2_PTE22_PTE22_PTE22_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define XB_IN2_PTE22_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define FTM2_QD_PHA_PTE22 KINETIS_MUX('E',22,5) /* PTE22 */
#define PTE23 KINETIS_MUX('E',23,1) /* PTE23 */
#define FTM2_CH1_PTE23 KINETIS_MUX('E',23,3) /* PTE23 */
#define XB_IN3_PTE23_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define XB_IN3_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define XB_IN3_PTE23_PTE23_PTE23_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define FTM2_QD_PHB_PTE23 KINETIS_MUX('E',23,5) /* PTE23 */
#define HSADC0B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define HSADC1B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define CAN1_TX_PTE24 KINETIS_MUX('E',24,2) /* PTE24 */
#define FTM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define XB_IN2_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define XB_OUT4_PTE24 KINETIS_MUX('E',24,7) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,8) /* PTE24 */
#define HSADC1B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define HSADC0B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define LLWU_P21_PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define CAN1_RX_PTE25 KINETIS_MUX('E',25,2) /* PTE25 */
#define FTM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define XB_IN3_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3/EWM_IN_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define XB_OUT5_PTE25 KINETIS_MUX('E',25,7) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,8) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define FTM0_CH4_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,8) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define CAN2_TX_PTE27 KINETIS_MUX('E',27,2) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,8) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#define CAN2_RX_PTE28 KINETIS_MUX('E',28,2) /* PTE28 */
#define CMP1_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define HSADC0A_CH4_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define FTM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define FTM_CLKIN0_PTE29 KINETIS_MUX('E',29,5) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define HSADC0A_CH5_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP1_IN3_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define FTM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define FTM_CLKIN1_PTE30 KINETIS_MUX('E',30,5) /* PTE30 */
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKV58F1M0VMD24/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKV58F1M0VMD24_
#define _ZEPHYR_DTS_BINDING_MKV58F1M0VMD24_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define XB_IN4_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4/EWM_IN_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define XB_IN4_PTA0_PTA0 KINETIS_MUX('A',0,4) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define CMP0_OUT_PTA1 KINETIS_MUX('A',1,4) /* PTA1 */
#define FTM2_QD_PHA_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define FTM1_CH1_PTA1 KINETIS_MUX('A',1,6) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define CMP1_OUT_PTA2 KINETIS_MUX('A',2,4) /* PTA2 */
#define FTM2_QD_PHB_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define FTM1_CH0_PTA2 KINETIS_MUX('A',2,6) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define XB_IN9_PTA3_PTA3_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define XB_IN9_PTA3_PTA3 KINETIS_MUX('A',3,4) /* PTA3 */
#define EWM_OUT_b_PTA3 KINETIS_MUX('A',3,5) /* PTA3 */
#define FLEXPWM0_A0_PTA3 KINETIS_MUX('A',3,6) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define XB_IN10_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10/FTM0_FLT3_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define XB_IN10_PTA4_PTA4_PTA4_PTA4 KINETIS_MUX('A',4,4) /* PTA4 */
#define FLEXPWM0_B0_PTA4 KINETIS_MUX('A',4,6) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
#define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
#define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */
#define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */
#define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
#define PTA6 KINETIS_MUX('A',6,1) /* PTA6 */
#define FTM0_CH3_PTA6 KINETIS_MUX('A',6,3) /* PTA6 */
#define CLKOUT_PTA6 KINETIS_MUX('A',6,5) /* PTA6 */
#define TRACE_CLKOUT_PTA6 KINETIS_MUX('A',6,7) /* PTA6 */
#define HSADC1B_CH8_PTA7 KINETIS_MUX('A',7,0) /* PTA7 */
#define PTA7 KINETIS_MUX('A',7,1) /* PTA7 */
#define FTM0_CH4_PTA7 KINETIS_MUX('A',7,3) /* PTA7 */
#define RMII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define MII0_MDIO_PTA7 KINETIS_MUX('A',7,5) /* PTA7 */
#define TRACE_D3_PTA7 KINETIS_MUX('A',7,7) /* PTA7 */
#define HSADC1B_CH9_PTA8 KINETIS_MUX('A',8,0) /* PTA8 */
#define PTA8 KINETIS_MUX('A',8,1) /* PTA8 */
#define FTM1_CH0_PTA8 KINETIS_MUX('A',8,3) /* PTA8 */
#define MII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define RMII0_MDC_PTA8 KINETIS_MUX('A',8,5) /* PTA8 */
#define TRACE_D2_PTA8 KINETIS_MUX('A',8,7) /* PTA8 */
#define PTA9 KINETIS_MUX('A',9,1) /* PTA9 */
#define FTM1_CH1_PTA9 KINETIS_MUX('A',9,3) /* PTA9 */
#define MII0_RXD3_PTA9 KINETIS_MUX('A',9,5) /* PTA9 */
#define TRACE_D1_PTA9 KINETIS_MUX('A',9,7) /* PTA9 */
#define PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define LLWU_P22_PTA10 KINETIS_MUX('A',10,1) /* PTA10 */
#define FTM2_CH0_PTA10 KINETIS_MUX('A',10,3) /* PTA10 */
#define MII0_RXD2_PTA10 KINETIS_MUX('A',10,5) /* PTA10 */
#define FTM2_QD_PHA_PTA10 KINETIS_MUX('A',10,6) /* PTA10 */
#define TRACE_D0_PTA10 KINETIS_MUX('A',10,7) /* PTA10 */
#define LLWU_P23_PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define PTA11 KINETIS_MUX('A',11,1) /* PTA11 */
#define FTM2_CH1_PTA11 KINETIS_MUX('A',11,3) /* PTA11 */
#define MII0_RXCLK_PTA11 KINETIS_MUX('A',11,5) /* PTA11 */
#define FTM2_QD_PHB_PTA11 KINETIS_MUX('A',11,6) /* PTA11 */
#define I2C0_SDA_PTA11 KINETIS_MUX('A',11,8) /* PTA11 */
#define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */
#define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
#define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */
#define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
#define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define MII0_RXD1_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */
#define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
#define I2C0_SCL_PTA12 KINETIS_MUX('A',12,8) /* PTA12 */
#define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */
#define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
#define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */
#define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
#define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define MII0_RXD0_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */
#define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
#define I2C1_SDA_PTA13 KINETIS_MUX('A',13,8) /* PTA13 */
#define CMP3_IN0_PTA14 KINETIS_MUX('A',14,0) /* PTA14 */
#define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */
#define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */
#define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */
#define CAN2_TX_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */
#define MII0_RXDV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */
#define I2C1_SCL_PTA14 KINETIS_MUX('A',14,8) /* PTA14 */
#define CMP3_IN1_PTA15 KINETIS_MUX('A',15,0) /* PTA15 */
#define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */
#define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */
#define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */
#define CAN2_RX_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */
#define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define MII0_TXEN_PTA15 KINETIS_MUX('A',15,5) /* PTA15 */
#define CMP3_IN2_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */
#define MII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define HSADC0A_CH15_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */
#define MII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define XB_IN7_PTA18_PTA18_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define XB_IN7_PTA18_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XB_OUT8_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */
#define FTM3_CH2_PTA18 KINETIS_MUX('A',18,6) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define XB_IN8_PTA19_PTA19_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8/FTM1_FLT0_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define XB_IN8_PTA19_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define XB_OUT9_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA24 KINETIS_MUX('A',24,1) /* PTA24 */
#define XB_IN4_PTA24_PTA24_PTA24_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define XB_IN4_PTA24_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define XB_IN4_PTA24 KINETIS_MUX('A',24,2) /* PTA24 */
#define MII0_TXD2_PTA24 KINETIS_MUX('A',24,5) /* PTA24 */
#define PTA25 KINETIS_MUX('A',25,1) /* PTA25 */
#define XB_IN5_PTA25_PTA25_PTA25_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define XB_IN5_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define XB_IN5_PTA25_PTA25 KINETIS_MUX('A',25,2) /* PTA25 */
#define MII0_TXCLK_PTA25 KINETIS_MUX('A',25,5) /* PTA25 */
#define PTA26 KINETIS_MUX('A',26,1) /* PTA26 */
#define MII0_TXD3_PTA26 KINETIS_MUX('A',26,5) /* PTA26 */
#define PTA27 KINETIS_MUX('A',27,1) /* PTA27 */
#define MII0_CRS_PTA27 KINETIS_MUX('A',27,5) /* PTA27 */
#define PTA28 KINETIS_MUX('A',28,1) /* PTA28 */
#define MII0_TXER_PTA28 KINETIS_MUX('A',28,5) /* PTA28 */
#define PTA29 KINETIS_MUX('A',29,1) /* PTA29 */
#define MII0_COL_PTA29 KINETIS_MUX('A',29,5) /* PTA29 */
#define HSADC0B_CH2_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
#define UART0_RX_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define MII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,8) /* PTB0 */
#define HSADC0B_CH3_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define FTM0_FLT2_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define EWM_IN_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
#define UART0_TX_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define RMII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define MII0_MDC_PTB1 KINETIS_MUX('B',1,8) /* PTB1 */
#define CMP2_IN2_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define HSADC0A_CH14_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define FTM0_FLT1_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */
#define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
#define CMP3_IN5_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define HSADC0B_CH15_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
#define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
#define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
#define ADC0_SE6b_PTB4 KINETIS_MUX('B',4,0) /* PTB4 */
#define PTB4 KINETIS_MUX('B',4,1) /* PTB4 */
#define FLEXPWM1_X0_PTB4 KINETIS_MUX('B',4,4) /* PTB4 */
#define ENET0_1588_TMR2_PTB4 KINETIS_MUX('B',4,5) /* PTB4 */
#define FTM1_FLT0_PTB4 KINETIS_MUX('B',4,6) /* PTB4 */
#define ADC0_SE7b_PTB5 KINETIS_MUX('B',5,0) /* PTB5 */
#define PTB5 KINETIS_MUX('B',5,1) /* PTB5 */
#define FLEXPWM1_X1_PTB5 KINETIS_MUX('B',5,4) /* PTB5 */
#define ENET0_1588_TMR3_PTB5 KINETIS_MUX('B',5,5) /* PTB5 */
#define FTM2_FLT0_PTB5 KINETIS_MUX('B',5,6) /* PTB5 */
#define HSADC1A_CH12_PTB6 KINETIS_MUX('B',6,0) /* PTB6 */
#define PTB6 KINETIS_MUX('B',6,1) /* PTB6 */
#define CAN2_TX_PTB6 KINETIS_MUX('B',6,2) /* PTB6 */
#define FLEXPWM1_X2_PTB6 KINETIS_MUX('B',6,4) /* PTB6 */
#define HSADC1A_CH13_PTB7 KINETIS_MUX('B',7,0) /* PTB7 */
#define PTB7 KINETIS_MUX('B',7,1) /* PTB7 */
#define CAN2_RX_PTB7 KINETIS_MUX('B',7,2) /* PTB7 */
#define FLEXPWM1_X3_PTB7 KINETIS_MUX('B',7,4) /* PTB7 */
#define PTB8 KINETIS_MUX('B',8,1) /* PTB8 */
#define UART3_RTS_b_PTB8 KINETIS_MUX('B',8,3) /* PTB8 */
#define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */
#define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */
#define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */
#define ENET0_1588_TMR2_PTB9 KINETIS_MUX('B',9,5) /* PTB9 */
#define HSADC0B_CH6_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */
#define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */
#define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */
#define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */
#define ENET0_1588_TMR3_PTB10 KINETIS_MUX('B',10,5) /* PTB10 */
#define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */
#define HSADC0B_CH7_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */
#define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */
#define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */
#define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */
#define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
#define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define FTM_CLKIN2_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
#define CAN0_TX_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define EWM_IN/XB_IN5_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define XB_IN5_PTB16_PTB16_PTB16_PTB16 KINETIS_MUX('B',16,7) /* PTB16 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
#define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
#define CAN0_RX_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */
#define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define FTM3_CH2_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define FLEXPWM1_A1_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
#define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
#define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */
#define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
#define FTM3_CH3_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
#define FLEXPWM1_B1_PTB19 KINETIS_MUX('B',19,5) /* PTB19 */
#define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
#define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */
#define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */
#define FLEXPWM0_X0_PTB20 KINETIS_MUX('B',20,5) /* PTB20 */
#define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */
#define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */
#define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */
#define FLEXPWM0_X1_PTB21 KINETIS_MUX('B',21,5) /* PTB21 */
#define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */
#define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */
#define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */
#define FLEXPWM0_X2_PTB22 KINETIS_MUX('B',22,5) /* PTB22 */
#define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */
#define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */
#define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */
#define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */
#define FLEXPWM0_X3_PTB23 KINETIS_MUX('B',23,5) /* PTB23 */
#define CMP3_OUT_PTB23 KINETIS_MUX('B',23,6) /* PTB23 */
#define HSADC0B_CH8_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define FTM0_FLT1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */
#define SPI0_PCS0_PTC0 KINETIS_MUX('C',0,7) /* PTC0 */
#define HSADC0B_CH9_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define FLEXPWM0_A3_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define XB_IN11_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define XB_IN11_PTC1_PTC1_PTC1_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
#define HSADC1B_CH10_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define FLEXPWM0_B3_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define XB_IN6_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define XB_IN6_PTC2_PTC2_PTC2_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
#define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define FTM3_FLT0_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define XB_IN2_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define XB_IN2_PTC5_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define CMP2_IN4_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define PDB0_EXTRG/XB_IN3_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define XB_IN3_PTC6_PTC6_PTC6_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define UART0_RX_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define XB_OUT6_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define I2C0_SCL_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define CMP3_IN4_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define XB_IN4_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define XB_IN4_PTC7_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define UART0_TX_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define XB_OUT7_PTC7 KINETIS_MUX('C',7,6) /* PTC7 */
#define I2C0_SDA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define HSADC1B_CH11_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
#define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
#define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
#define FLEXPWM1_A2_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
#define HSADC1B_CH12_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
#define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
#define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
#define FLEXPWM1_B2_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
#define HSADC1B_CH13_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
#define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
#define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
#define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
#define FLEXPWM1_A3_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
#define HSADC1B_CH14_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
#define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
#define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
#define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
#define FLEXPWM1_B3_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */
#define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */
#define CAN2_TX_PTC12 KINETIS_MUX('C',12,2) /* PTC12 */
#define FTM_CLKIN0_PTC12 KINETIS_MUX('C',12,4) /* PTC12 */
#define FLEXPWM1_A1_PTC12 KINETIS_MUX('C',12,5) /* PTC12 */
#define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */
#define SPI2_PCS1_PTC12 KINETIS_MUX('C',12,7) /* PTC12 */
#define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,9) /* PTC12 */
#define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */
#define CAN2_RX_PTC13 KINETIS_MUX('C',13,2) /* PTC13 */
#define FTM_CLKIN1_PTC13 KINETIS_MUX('C',13,4) /* PTC13 */
#define FLEXPWM1_B1_PTC13 KINETIS_MUX('C',13,5) /* PTC13 */
#define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,9) /* PTC13 */
#define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */
#define I2C1_SCL_PTC14 KINETIS_MUX('C',14,2) /* PTC14 */
#define I2C0_SCL_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */
#define FLEXPWM1_A0_PTC14 KINETIS_MUX('C',14,5) /* PTC14 */
#define UART4_RX_PTC14 KINETIS_MUX('C',14,9) /* PTC14 */
#define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */
#define I2C1_SDA_PTC15 KINETIS_MUX('C',15,2) /* PTC15 */
#define I2C0_SDA_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */
#define FLEXPWM1_B0_PTC15 KINETIS_MUX('C',15,5) /* PTC15 */
#define UART4_TX_PTC15 KINETIS_MUX('C',15,9) /* PTC15 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define CAN1_RX_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define FLEXPWM1_A2_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define CAN1_TX_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define FLEXPWM1_B2_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define FLEXPWM1_A3_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define UART3_CTS_b_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define ENET0_1588_TMR3_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define FLEXPWM1_B3_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
#define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
#define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
#define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
#define FTM0_CH0_PTD0 KINETIS_MUX('D',0,5) /* PTD0 */
#define FLEXPWM0_A0_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
#define FLEXPWM1_A0_PTD0 KINETIS_MUX('D',0,9) /* PTD0 */
#define HSADC1A_CH11_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
#define FTM0_CH1_PTD1 KINETIS_MUX('D',1,5) /* PTD1 */
#define FLEXPWM0_B0_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
#define FLEXPWM1_B0_PTD1 KINETIS_MUX('D',1,9) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define FTM0_CH2_PTD2 KINETIS_MUX('D',2,5) /* PTD2 */
#define FLEXPWM0_A1_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
#define FLEXPWM1_A1_PTD2 KINETIS_MUX('D',2,9) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define FTM0_CH3_PTD3 KINETIS_MUX('D',3,5) /* PTD3 */
#define FLEXPWM0_B1_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
#define FLEXPWM1_B1_PTD3 KINETIS_MUX('D',3,9) /* PTD3 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define FLEXPWM0_A2_PTD4 KINETIS_MUX('D',4,5) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
#define HSADC1A_CH8_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define FLEXPWM0_B2_PTD5 KINETIS_MUX('D',5,5) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
#define HSADC1A_CH9_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM1_CH0_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM1_CH1_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
#define LLWU_P24_PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define PTD8 KINETIS_MUX('D',8,1) /* PTD8 */
#define I2C1_SCL_PTD8 KINETIS_MUX('D',8,2) /* PTD8 */
#define UART5_RX_PTD8 KINETIS_MUX('D',8,3) /* PTD8 */
#define FLEXPWM0_A3_PTD8 KINETIS_MUX('D',8,6) /* PTD8 */
#define PTD9 KINETIS_MUX('D',9,1) /* PTD9 */
#define I2C1_SDA_PTD9 KINETIS_MUX('D',9,2) /* PTD9 */
#define UART5_TX_PTD9 KINETIS_MUX('D',9,3) /* PTD9 */
#define FLEXPWM0_B3_PTD9 KINETIS_MUX('D',9,6) /* PTD9 */
#define PTD10 KINETIS_MUX('D',10,1) /* PTD10 */
#define UART5_RTS_b_PTD10 KINETIS_MUX('D',10,3) /* PTD10 */
#define FLEXPWM0_A2_PTD10 KINETIS_MUX('D',10,6) /* PTD10 */
#define PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define LLWU_P25_PTD11 KINETIS_MUX('D',11,1) /* PTD11 */
#define SPI2_PCS0_PTD11 KINETIS_MUX('D',11,2) /* PTD11 */
#define UART5_CTS_b_PTD11 KINETIS_MUX('D',11,3) /* PTD11 */
#define FLEXPWM0_B2_PTD11 KINETIS_MUX('D',11,6) /* PTD11 */
#define PTD12 KINETIS_MUX('D',12,1) /* PTD12 */
#define SPI2_SCK_PTD12 KINETIS_MUX('D',12,2) /* PTD12 */
#define FTM3_FLT0_PTD12 KINETIS_MUX('D',12,3) /* PTD12 */
#define XB_IN5_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_IN5_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define FTM3_FLT0/XB_IN5_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_IN5_PTD12_PTD12_PTD12_PTD12 KINETIS_MUX('D',12,4) /* PTD12 */
#define XB_OUT5_PTD12 KINETIS_MUX('D',12,5) /* PTD12 */
#define FLEXPWM0_A1_PTD12 KINETIS_MUX('D',12,6) /* PTD12 */
#define PTD13 KINETIS_MUX('D',13,1) /* PTD13 */
#define SPI2_SOUT_PTD13 KINETIS_MUX('D',13,2) /* PTD13 */
#define XB_IN7_PTD13_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_IN7_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_IN7_PTD13_PTD13_PTD13_PTD13 KINETIS_MUX('D',13,4) /* PTD13 */
#define XB_OUT7_PTD13 KINETIS_MUX('D',13,5) /* PTD13 */
#define FLEXPWM0_B1_PTD13 KINETIS_MUX('D',13,6) /* PTD13 */
#define PTD14 KINETIS_MUX('D',14,1) /* PTD14 */
#define SPI2_SIN_PTD14 KINETIS_MUX('D',14,2) /* PTD14 */
#define XB_IN11_PTD14_PTD14_PTD14_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_IN11_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_IN11_PTD14_PTD14 KINETIS_MUX('D',14,4) /* PTD14 */
#define XB_OUT11_PTD14 KINETIS_MUX('D',14,5) /* PTD14 */
#define FLEXPWM0_A0_PTD14 KINETIS_MUX('D',14,6) /* PTD14 */
#define PTD15 KINETIS_MUX('D',15,1) /* PTD15 */
#define SPI2_PCS1_PTD15 KINETIS_MUX('D',15,2) /* PTD15 */
#define FLEXPWM0_B0_PTD15 KINETIS_MUX('D',15,6) /* PTD15 */
#define HSADC1A_CH0_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define HSADC0B_CH16_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define XB_OUT10_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define XB_IN11_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define XB_IN11_PTE0_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,8) /* PTE0 */
#define HSADC0B_CH17_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define HSADC1A_CH1_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define XB_OUT11_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */
#define XB_IN7_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define XB_IN7_PTE1_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,8) /* PTE1 */
#define HSADC1B_CH0_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define HSADC0B_CH10_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,8) /* PTE2 */
#define HSADC1B_CH1_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define HSADC0B_CH11_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,8) /* PTE3 */
#define ADC0_DP2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define ADC0_SE2_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define HSADC1A_CH4_PTE4 KINETIS_MUX('E',4,0) /* PTE4 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,8) /* PTE4 */
#define ADC0_DM2_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define HSADC1A_CH5_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define ADC0_SE10_PTE5 KINETIS_MUX('E',5,0) /* PTE5 */
#define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */
#define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */
#define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */
#define FLEXPWM1_A0_PTE5 KINETIS_MUX('E',5,5) /* PTE5 */
#define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */
#define HSADC1B_CH7_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define ADC0_SE4a_PTE6 KINETIS_MUX('E',6,0) /* PTE6 */
#define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define LLWU_P16_PTE6 KINETIS_MUX('E',6,1) /* PTE6 */
#define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */
#define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */
#define FLEXPWM1_B0_PTE6 KINETIS_MUX('E',6,5) /* PTE6 */
#define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */
#define PTE7 KINETIS_MUX('E',7,1) /* PTE7 */
#define UART3_RTS_b_PTE7 KINETIS_MUX('E',7,3) /* PTE7 */
#define FLEXPWM1_A1_PTE7 KINETIS_MUX('E',7,5) /* PTE7 */
#define FTM3_CH2_PTE7 KINETIS_MUX('E',7,6) /* PTE7 */
#define PTE8 KINETIS_MUX('E',8,1) /* PTE8 */
#define UART5_TX_PTE8 KINETIS_MUX('E',8,3) /* PTE8 */
#define FLEXPWM1_B1_PTE8 KINETIS_MUX('E',8,5) /* PTE8 */
#define FTM3_CH3_PTE8 KINETIS_MUX('E',8,6) /* PTE8 */
#define PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define LLWU_P17_PTE9 KINETIS_MUX('E',9,1) /* PTE9 */
#define UART5_RX_PTE9 KINETIS_MUX('E',9,3) /* PTE9 */
#define FLEXPWM1_A2_PTE9 KINETIS_MUX('E',9,5) /* PTE9 */
#define FTM3_CH4_PTE9 KINETIS_MUX('E',9,6) /* PTE9 */
#define LLWU_P18_PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define PTE10 KINETIS_MUX('E',10,1) /* PTE10 */
#define UART5_CTS_b_PTE10 KINETIS_MUX('E',10,3) /* PTE10 */
#define FLEXPWM1_B2_PTE10 KINETIS_MUX('E',10,5) /* PTE10 */
#define FTM3_CH5_PTE10 KINETIS_MUX('E',10,6) /* PTE10 */
#define ADC0_DP3_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define ADC0_SE3_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define HSADC1A_CH6_PTE11 KINETIS_MUX('E',11,0) /* PTE11 */
#define PTE11 KINETIS_MUX('E',11,1) /* PTE11 */
#define UART5_RTS_b_PTE11 KINETIS_MUX('E',11,3) /* PTE11 */
#define FLEXPWM1_A3_PTE11 KINETIS_MUX('E',11,5) /* PTE11 */
#define FTM3_CH6_PTE11 KINETIS_MUX('E',11,6) /* PTE11 */
#define HSADC1B_CH6_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define ADC0_SE11_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define ADC0_DM3_PTE12 KINETIS_MUX('E',12,0) /* PTE12 */
#define PTE12 KINETIS_MUX('E',12,1) /* PTE12 */
#define FLEXPWM1_B3_PTE12 KINETIS_MUX('E',12,5) /* PTE12 */
#define FTM3_CH7_PTE12 KINETIS_MUX('E',12,6) /* PTE12 */
#define PTE13 KINETIS_MUX('E',13,1) /* PTE13 */
#define ADC0_DP1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define ADC0_SE1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define HSADC0A_CH0_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define SPI0_PCS0_PTE16 KINETIS_MUX('E',16,2) /* PTE16 */
#define UART2_TX_PTE16 KINETIS_MUX('E',16,3) /* PTE16 */
#define FTM_CLKIN0_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FTM0_FLT3_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define HSADC0A_CH1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_DM1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_SE9_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define LLWU_P19_PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define SPI0_SCK_PTE17 KINETIS_MUX('E',17,2) /* PTE17 */
#define UART2_RX_PTE17 KINETIS_MUX('E',17,3) /* PTE17 */
#define FTM_CLKIN1_PTE17 KINETIS_MUX('E',17,4) /* PTE17 */
#define LPTMR0_ALT3_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define HSADC0B_CH0_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define ADC0_SE5a_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define LLWU_P20_PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define SPI0_SOUT_PTE18 KINETIS_MUX('E',18,2) /* PTE18 */
#define UART2_CTS_b_PTE18 KINETIS_MUX('E',18,3) /* PTE18 */
#define I2C0_SDA_PTE18 KINETIS_MUX('E',18,4) /* PTE18 */
#define HSADC0B_CH1_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define ADC0_SE6a_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define PTE19 KINETIS_MUX('E',19,1) /* PTE19 */
#define SPI0_SIN_PTE19 KINETIS_MUX('E',19,2) /* PTE19 */
#define UART2_RTS_b_PTE19 KINETIS_MUX('E',19,3) /* PTE19 */
#define I2C0_SCL_PTE19 KINETIS_MUX('E',19,4) /* PTE19 */
#define CMP3_OUT_PTE19 KINETIS_MUX('E',19,6) /* PTE19 */
#define HSADC0A_CH8_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define ADC0_SE5b_PTE20 KINETIS_MUX('E',20,0) /* PTE20 */
#define PTE20 KINETIS_MUX('E',20,1) /* PTE20 */
#define FTM1_CH0_PTE20 KINETIS_MUX('E',20,3) /* PTE20 */
#define UART0_TX_PTE20 KINETIS_MUX('E',20,4) /* PTE20 */
#define FTM1_QD_PHA_PTE20 KINETIS_MUX('E',20,5) /* PTE20 */
#define HSADC0A_CH9_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define HSADC1A_CH7_PTE21 KINETIS_MUX('E',21,0) /* PTE21 */
#define PTE21 KINETIS_MUX('E',21,1) /* PTE21 */
#define XB_IN9_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define XB_IN9_PTE21_PTE21 KINETIS_MUX('E',21,2) /* PTE21 */
#define FTM1_CH1_PTE21 KINETIS_MUX('E',21,3) /* PTE21 */
#define UART0_RX_PTE21 KINETIS_MUX('E',21,4) /* PTE21 */
#define FTM1_QD_PHB_PTE21 KINETIS_MUX('E',21,5) /* PTE21 */
#define PTE22 KINETIS_MUX('E',22,1) /* PTE22 */
#define FTM2_CH0_PTE22 KINETIS_MUX('E',22,3) /* PTE22 */
#define XB_IN2_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define XB_IN2_PTE22_PTE22_PTE22_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define XB_IN2_PTE22_PTE22 KINETIS_MUX('E',22,4) /* PTE22 */
#define FTM2_QD_PHA_PTE22 KINETIS_MUX('E',22,5) /* PTE22 */
#define PTE23 KINETIS_MUX('E',23,1) /* PTE23 */
#define FTM2_CH1_PTE23 KINETIS_MUX('E',23,3) /* PTE23 */
#define XB_IN3_PTE23_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define XB_IN3_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define XB_IN3_PTE23_PTE23_PTE23_PTE23 KINETIS_MUX('E',23,4) /* PTE23 */
#define FTM2_QD_PHB_PTE23 KINETIS_MUX('E',23,5) /* PTE23 */
#define HSADC0B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define HSADC1B_CH4_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */
#define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */
#define CAN1_TX_PTE24 KINETIS_MUX('E',24,2) /* PTE24 */
#define FTM0_CH0_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */
#define XB_IN2_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define XB_IN2_PTE24_PTE24 KINETIS_MUX('E',24,4) /* PTE24 */
#define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */
#define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */
#define XB_OUT4_PTE24 KINETIS_MUX('E',24,7) /* PTE24 */
#define UART4_TX_PTE24 KINETIS_MUX('E',24,8) /* PTE24 */
#define HSADC1B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define HSADC0B_CH5_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */
#define LLWU_P21_PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */
#define CAN1_RX_PTE25 KINETIS_MUX('E',25,2) /* PTE25 */
#define FTM0_CH1_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */
#define XB_IN3_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define XB_IN3/EWM_IN_PTE25_PTE25 KINETIS_MUX('E',25,4) /* PTE25 */
#define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */
#define XB_OUT5_PTE25 KINETIS_MUX('E',25,7) /* PTE25 */
#define UART4_RX_PTE25 KINETIS_MUX('E',25,8) /* PTE25 */
#define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */
#define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */
#define FTM0_CH4_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */
#define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,8) /* PTE26 */
#define PTE27 KINETIS_MUX('E',27,1) /* PTE27 */
#define CAN2_TX_PTE27 KINETIS_MUX('E',27,2) /* PTE27 */
#define UART4_RTS_b_PTE27 KINETIS_MUX('E',27,8) /* PTE27 */
#define PTE28 KINETIS_MUX('E',28,1) /* PTE28 */
#define CAN2_RX_PTE28 KINETIS_MUX('E',28,2) /* PTE28 */
#define CMP1_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define CMP0_IN5_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define HSADC0A_CH4_PTE29 KINETIS_MUX('E',29,0) /* PTE29 */
#define PTE29 KINETIS_MUX('E',29,1) /* PTE29 */
#define FTM0_CH2_PTE29 KINETIS_MUX('E',29,3) /* PTE29 */
#define FTM_CLKIN0_PTE29 KINETIS_MUX('E',29,5) /* PTE29 */
#define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define HSADC0A_CH5_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP1_IN3_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define FTM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define FTM_CLKIN1_PTE30 KINETIS_MUX('E',30,5) /* PTE30 */
#endif

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@ -1,366 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKW24D512VHA5/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
UART0_CTS_b_PTA0: UART0_COL_b_PTA0: uart0_cts_b_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
FTM0_CH5_PTA0: ftm0_ch5_pta0 {
nxp,kinetis-port-pins = < 0 3 >;
};
JTAG_TCLK_PTA0: SWD_CLK_PTA0: jtag_tclk_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
UART0_RX_PTA1: uart0_rx_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
FTM0_CH6_PTA1: ftm0_ch6_pta1 {
nxp,kinetis-port-pins = < 1 3 >;
};
JTAG_TDI_PTA1: jtag_tdi_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
UART0_TX_PTA2: uart0_tx_pta2 {
nxp,kinetis-port-pins = < 2 2 >;
};
FTM0_CH7_PTA2: ftm0_ch7_pta2 {
nxp,kinetis-port-pins = < 2 3 >;
};
JTAG_TDO_PTA2: TRACE_SWO_PTA2: jtag_tdo_pta2 {
nxp,kinetis-port-pins = < 2 7 >;
};
PTA3: GPIOA_PTA3: gpioa_pta3 {
nxp,kinetis-port-pins = < 3 1 >;
};
UART0_RTS_b_PTA3: uart0_rts_b_pta3 {
nxp,kinetis-port-pins = < 3 2 >;
};
FTM0_CH0_PTA3: ftm0_ch0_pta3 {
nxp,kinetis-port-pins = < 3 3 >;
};
JTAG_TMS_PTA3: SWD_DIO_PTA3: jtag_tms_pta3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTA4: GPIOA_PTA4: LLWU_P3_PTA4: gpioa_pta4 {
nxp,kinetis-port-pins = < 4 1 >;
};
FTM0_CH1_PTA4: ftm0_ch1_pta4 {
nxp,kinetis-port-pins = < 4 3 >;
};
NMI_b_PTA4: nmi_b_pta4 {
nxp,kinetis-port-pins = < 4 7 >;
};
EXTAL0_PTA18: extal0_pta18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTA18: GPIOA_PTA18: gpioa_pta18 {
nxp,kinetis-port-pins = < 18 1 >;
};
FTM0_FLT2_PTA18: ftm0_flt2_pta18 {
nxp,kinetis-port-pins = < 18 3 >;
};
FTM_CLKIN0_PTA18: ftm_clkin0_pta18 {
nxp,kinetis-port-pins = < 18 4 >;
};
XTAL0_PTA19: xtal0_pta19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTA19: GPIOA_PTA19: gpioa_pta19 {
nxp,kinetis-port-pins = < 19 1 >;
};
FTM1_FLT0_PTA19: ftm1_flt0_pta19 {
nxp,kinetis-port-pins = < 19 3 >;
};
FTM_CLKIN1_PTA19: ftm_clkin1_pta19 {
nxp,kinetis-port-pins = < 19 4 >;
};
LPTMR0_ALT1_PTA19: lptmr0_alt1_pta19 {
nxp,kinetis-port-pins = < 19 6 >;
};
};
&portc {
PTC4: GPIOC_PTC4: LLWU_P8_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI0_PCS0_PTC4: spi0_pcs0_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART1_TX_PTC4: uart1_tx_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM0_CH3_PTC4: ftm0_ch3_ptc4 {
nxp,kinetis-port-pins = < 4 4 >;
};
CMP1_OUT_PTC4: cmp1_out_ptc4 {
nxp,kinetis-port-pins = < 4 6 >;
};
PTC5: GPIOC_PTC5: LLWU_P9_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI0_SCK_PTC5: spi0_sck_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTC5: lptmr0_alt2_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
I2S0_RXD0_PTC5: i2s0_rxd0_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
CMP0_OUT_PTC5: cmp0_out_ptc5 {
nxp,kinetis-port-pins = < 5 6 >;
};
CMP0_IN0_PTC6: cmp0_in0_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: LLWU_P10_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI0_SOUT_PTC6: spi0_sout_ptc6 {
nxp,kinetis-port-pins = < 6 2 >;
};
PDB0_EXTRG_PTC6: pdb0_extrg_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
I2S0_RX_BCLK_PTC6: i2s0_rx_bclk_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
I2S0_MCLK_PTC6: i2s0_mclk_ptc6 {
nxp,kinetis-port-pins = < 6 6 >;
};
CMP0_IN1_PTC7: cmp0_in1_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
SPI0_SIN_PTC7: spi0_sin_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
USB_SOF_OUT_PTC7: usb_sof_out_ptc7 {
nxp,kinetis-port-pins = < 7 3 >;
};
I2S0_RX_FS_PTC7: i2s0_rx_fs_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
};
&portd {
ADC0_SE5b_PTD1: adc0_se5b_ptd1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTD1: GPIOD_PTD1: gpiod_ptd1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI0_SCK_PTD1: spi0_sck_ptd1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART2_CTS_b_PTD1: uart2_cts_b_ptd1 {
nxp,kinetis-port-pins = < 1 3 >;
};
PTD2: GPIOD_PTD2: LLWU_P13_PTD2: gpiod_ptd2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI0_SOUT_PTD2: spi0_sout_ptd2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART2_RX_PTD2: uart2_rx_ptd2 {
nxp,kinetis-port-pins = < 2 3 >;
};
I2C0_SCL_PTD2: i2c0_scl_ptd2 {
nxp,kinetis-port-pins = < 2 4 >;
};
PTD3: GPIOD_PTD3: gpiod_ptd3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI0_SIN_PTD3: spi0_sin_ptd3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART2_TX_PTD3: uart2_tx_ptd3 {
nxp,kinetis-port-pins = < 3 3 >;
};
I2C0_SDA_PTD3: i2c0_sda_ptd3 {
nxp,kinetis-port-pins = < 3 4 >;
};
ADC0_SE21_PTD4: adc0_se21_ptd4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTD4: GPIOD_PTD4: LLWU_P14_PTD4: gpiod_ptd4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI0_PCS1_PTD4: spi0_pcs1_ptd4 {
nxp,kinetis-port-pins = < 4 2 >;
};
UART0_RTS_b_PTD4: uart0_rts_b_ptd4 {
nxp,kinetis-port-pins = < 4 3 >;
};
FTM0_CH4_PTD4: ftm0_ch4_ptd4 {
nxp,kinetis-port-pins = < 4 4 >;
};
EWM_IN_PTD4: ewm_in_ptd4 {
nxp,kinetis-port-pins = < 4 6 >;
};
ADC0_SE6b_PTD5: adc0_se6b_ptd5 {
nxp,kinetis-port-pins = < 5 0 >;
};
PTD5: GPIOD_PTD5: gpiod_ptd5 {
nxp,kinetis-port-pins = < 5 1 >;
};
SPI0_PCS2_PTD5: spi0_pcs2_ptd5 {
nxp,kinetis-port-pins = < 5 2 >;
};
UART0_CTS_b_PTD5: UART0_COL_b_PTD5: uart0_cts_b_ptd5 {
nxp,kinetis-port-pins = < 5 3 >;
};
FTM0_CH5_PTD5: ftm0_ch5_ptd5 {
nxp,kinetis-port-pins = < 5 4 >;
};
EWM_OUT_b_PTD5: ewm_out_b_ptd5 {
nxp,kinetis-port-pins = < 5 6 >;
};
ADC0_SE7b_PTD6: adc0_se7b_ptd6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTD6: GPIOD_PTD6: LLWU_P15_PTD6: gpiod_ptd6 {
nxp,kinetis-port-pins = < 6 1 >;
};
SPI0_PCS3_PTD6: spi0_pcs3_ptd6 {
nxp,kinetis-port-pins = < 6 2 >;
};
UART0_RX_PTD6: uart0_rx_ptd6 {
nxp,kinetis-port-pins = < 6 3 >;
};
FTM0_CH6_PTD6: ftm0_ch6_ptd6 {
nxp,kinetis-port-pins = < 6 4 >;
};
FTM0_FLT0_PTD6: ftm0_flt0_ptd6 {
nxp,kinetis-port-pins = < 6 6 >;
};
ADC0_SE22_PTD7: adc0_se22_ptd7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTD7: GPIOD_PTD7: gpiod_ptd7 {
nxp,kinetis-port-pins = < 7 1 >;
};
CMT_IRO_PTD7: cmt_iro_ptd7 {
nxp,kinetis-port-pins = < 7 2 >;
};
UART0_TX_PTD7: uart0_tx_ptd7 {
nxp,kinetis-port-pins = < 7 3 >;
};
FTM0_CH7_PTD7: ftm0_ch7_ptd7 {
nxp,kinetis-port-pins = < 7 4 >;
};
FTM0_FLT1_PTD7: ftm0_flt1_ptd7 {
nxp,kinetis-port-pins = < 7 6 >;
};
};
&porte {
ADC0_SE10_PTE0: adc0_se10_pte0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTE0: GPIOE_PTE0: gpioe_pte0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI1_PCS1_PTE0: spi1_pcs1_pte0 {
nxp,kinetis-port-pins = < 0 2 >;
};
UART1_TX_PTE0: uart1_tx_pte0 {
nxp,kinetis-port-pins = < 0 3 >;
};
TRACE_CLKOUT_PTE0: trace_clkout_pte0 {
nxp,kinetis-port-pins = < 0 5 >;
};
I2C1_SDA_PTE0: i2c1_sda_pte0 {
nxp,kinetis-port-pins = < 0 6 >;
};
RTC_CLKOUT_PTE0: rtc_clkout_pte0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE11_PTE1: adc0_se11_pte1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTE1: GPIOE_PTE1: LLWU_P0_PTE1: gpioe_pte1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI1_SOUT_PTE1: spi1_sout_pte1 {
nxp,kinetis-port-pins = < 1 2 >;
};
UART1_RX_PTE1: uart1_rx_pte1 {
nxp,kinetis-port-pins = < 1 3 >;
};
TRACE_D3_PTE1: trace_d3_pte1 {
nxp,kinetis-port-pins = < 1 5 >;
};
I2C1_SCL_PTE1: i2c1_scl_pte1 {
nxp,kinetis-port-pins = < 1 6 >;
};
SPI1_SIN_PTE1: spi1_sin_pte1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC0_DP1_PTE2: adc0_dp1_pte2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTE2: GPIOE_PTE2: LLWU_P1_PTE2: gpioe_pte2 {
nxp,kinetis-port-pins = < 2 1 >;
};
SPI1_SCK_PTE2: spi1_sck_pte2 {
nxp,kinetis-port-pins = < 2 2 >;
};
UART1_CTS_b_PTE2: uart1_cts_b_pte2 {
nxp,kinetis-port-pins = < 2 3 >;
};
TRACE_D2_PTE2: trace_d2_pte2 {
nxp,kinetis-port-pins = < 2 5 >;
};
ADC0_DM1_PTE3: adc0_dm1_pte3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTE3: GPIOE_PTE3: gpioe_pte3 {
nxp,kinetis-port-pins = < 3 1 >;
};
SPI1_SIN_PTE3: spi1_sin_pte3 {
nxp,kinetis-port-pins = < 3 2 >;
};
UART1_RTS_b_PTE3: uart1_rts_b_pte3 {
nxp,kinetis-port-pins = < 3 3 >;
};
TRACE_D1_PTE3: trace_d1_pte3 {
nxp,kinetis-port-pins = < 3 5 >;
};
SPI1_SOUT_PTE3: spi1_sout_pte3 {
nxp,kinetis-port-pins = < 3 7 >;
};
PTE4: GPIOE_PTE4: LLWU_P2_PTE4: gpioe_pte4 {
nxp,kinetis-port-pins = < 4 1 >;
};
SPI1_PCS0_PTE4: spi1_pcs0_pte4 {
nxp,kinetis-port-pins = < 4 2 >;
};
TRACE_D0_PTE4: trace_d0_pte4 {
nxp,kinetis-port-pins = < 4 5 >;
};
};

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKW24D512VHA5/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKW24D512VHA5_
#define _ZEPHYR_DTS_BINDING_MKW24D512VHA5_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
#define ADC0_SE21_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define ADC0_SE22_PTD7 KINETIS_MUX('D',7,0) /* PTD7 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define ADC0_SE10_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
#define ADC0_SE11_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
#define ADC0_DP1_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
#define ADC0_DM1_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
#endif

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@ -1,41 +0,0 @@
/*
* Copyright (c) 2021, Linaro
*
* SPDX-License-Identifier: Apache-2.0
*/
/* This file is handcoded based on what pin configurations are actually
* used by boards in Zephyr. At this time that is only the Hexiwear KW40Z.
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&portb {
ADC0_SE1_PTB1: CMP0_IN5_PTB1: adc0_se1_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
};
&portc {
PTC6: GPIOC_PTC6: LLWU_P14_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
UART0_RX_PTC6: uart0_rx_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
PTC7: GPIOC_PTC7: LLWU_P15_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
UART0_TX_PTC7: uart0_tx_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
};

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/*
* Copyright (c) 2022, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* This file is handcoded based on what pin configurations are actually
* used by boards in Zephyr. At this time that is only the Hexiwear KW40Z.
*/
#ifndef _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_
#define _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define ADC0_SE1_PTB1 KINETIS_MUX('B', 1, 0)
#define GPIOB_PTB1 KINETIS_MUX('B', 1, 0)
#define GPIOC_PTC6 KINETIS_MUX('C', 6, 1)
#define UART0_RX_PTC6 KINETIS_MUX('C', 6, 4)
#define GPIOC_PTC7 KINETIS_MUX('C', 7, 1)
#define UART0_TX_PTC7 KINETIS_MUX('C', 7, 4)
#endif

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/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKW41Z512CAT4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKW41Z512CAT4_
#define _ZEPHYR_DTS_BINDING_MKW41Z512CAT4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH8_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define SPI0_PCS1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define TPM1_CH0_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define SWD_DIO_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH9_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define SPI1_PCS0_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM1_CH1_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define SWD_CLK_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define TPM0_CH3_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define RESET_b_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH10_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define LLWU_P4_PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI1_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define TPM0_CH0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define TSI0_CH11_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define RF_RESET_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define LLWU_P5_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI1_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define TPM_CLKIN1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define TSI0_CH12_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define LLWU_P6_PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define SPI1_SCK_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define TPM2_CH0_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */
#define TSI0_CH13_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define ADC0_SE5_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define LLWU_P7_PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define SPI1_PCS0_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define TPM2_CH1_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P8_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define XTAL_OUT_EN_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define CMP0_OUT_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define TPM0_CH1_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define CLKOUT_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define CMP0_IN5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE1_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define DTM_RX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define LPTMR0_ALT1_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define TPM0_CH2_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define CMT_IRO_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define CMP0_IN3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define ADC0_SE3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define RF_NOT_ALLOWED_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define DTM_TX_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define TPM1_CH0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define ADC0_SE2_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define CMP0_IN4_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define CLKOUT_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TPM1_CH1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define RTC_CLKOUT_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define EXTAL32K_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define I2C1_SCL_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define TPM2_CH0_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define XTAL32K_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define I2C1_SDA_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define TPM2_CH1_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define BSM_CLK_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define ADC0_SE4_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define DAC0_OUT_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define CMP0_IN2_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define I2C1_SCL_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define TPM_CLKIN0_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define TPM0_CH0_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define NMI_b_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define LLWU_P9_PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
#define ANT_A_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
#define I2C0_SCL_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
#define UART0_CTS_b_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
#define TPM0_CH1_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define ANT_B_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define I2C0_SDA_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define UART0_RTS_b_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define TPM0_CH2_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define BLE_RF_ACTIVE_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH14_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define LLWU_P10_PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define TX_SWITCH_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define I2C1_SCL_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define UART0_RX_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define CMT_IRO_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define DTM_RX_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define TSI0_CH15_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P11_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define RX_SWITCH_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define I2C1_SDA_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define UART0_TX_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define TPM0_CH1_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define DTM_TX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define TSI0_CH0_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define LLWU_P12_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define ANT_A_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define EXTRG_IN_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define UART0_CTS_b_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define TPM1_CH0_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define BSM_DATA_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define TSI0_CH1_PTC5 KINETIS_MUX('C',5,0) /* PTC5 */
#define LLWU_P13_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define RF_NOT_ALLOWED_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define UART0_RTS_b_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define TPM1_CH1_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define BSM_CLK_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define TSI0_CH2_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P14_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define XTAL_OUT_EN_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define I2C1_SCL_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define UART0_RX_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define TPM2_CH0_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define BSM_FRAME_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define TSI0_CH3_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LLWU_P15_PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_PCS2_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define I2C1_SDA_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define UART0_TX_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define TPM2_CH1_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define BSM_DATA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define TSI0_CH4_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define LLWU_P0_PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define SPI0_SCK_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define I2C0_SDA_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define UART0_RTS_b_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define TPM0_CH3_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define TSI0_CH5_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define LLWU_P1_PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define SPI0_SOUT_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define I2C1_SCL_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define UART0_RX_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define BSM_FRAME_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define DTM_RX_PTC17 KINETIS_MUX('C',17,7) /* PTC17 */
#define TSI0_CH6_PTC18 KINETIS_MUX('C',18,0) /* PTC18 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LLWU_P2_PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define SPI0_SIN_PTC18 KINETIS_MUX('C',18,2) /* PTC18 */
#define I2C1_SDA_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define UART0_TX_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define BSM_DATA_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define DTM_TX_PTC18 KINETIS_MUX('C',18,7) /* PTC18 */
#define TSI0_CH7_PTC19 KINETIS_MUX('C',19,0) /* PTC19 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LLWU_P3_PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define SPI0_PCS0_PTC19 KINETIS_MUX('C',19,2) /* PTC19 */
#define I2C0_SCL_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define UART0_CTS_b_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define BSM_CLK_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define BLE_RF_ACTIVE_PTC19 KINETIS_MUX('C',19,7) /* PTC19 */
#endif

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@ -1,444 +0,0 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKW41Z512VHT4/signal_configuration.xml
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Pin nodes are of the form:
*
* <SIGNAL[0..n]>: <signal[0]> {
* nxp,kinetis-port-pins = < PIN PCR[MUX] >;
* };
*/
&porta {
TSI0_CH8_PTA0: tsi0_ch8_pta0 {
nxp,kinetis-port-pins = < 0 0 >;
};
PTA0: GPIOA_PTA0: gpioa_pta0 {
nxp,kinetis-port-pins = < 0 1 >;
};
SPI0_PCS1_PTA0: spi0_pcs1_pta0 {
nxp,kinetis-port-pins = < 0 2 >;
};
TPM1_CH0_PTA0: tpm1_ch0_pta0 {
nxp,kinetis-port-pins = < 0 5 >;
};
SWD_DIO_PTA0: swd_dio_pta0 {
nxp,kinetis-port-pins = < 0 7 >;
};
TSI0_CH9_PTA1: tsi0_ch9_pta1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTA1: GPIOA_PTA1: gpioa_pta1 {
nxp,kinetis-port-pins = < 1 1 >;
};
SPI1_PCS0_PTA1: spi1_pcs0_pta1 {
nxp,kinetis-port-pins = < 1 2 >;
};
TPM1_CH1_PTA1: tpm1_ch1_pta1 {
nxp,kinetis-port-pins = < 1 5 >;
};
SWD_CLK_PTA1: swd_clk_pta1 {
nxp,kinetis-port-pins = < 1 7 >;
};
PTA2: GPIOA_PTA2: gpioa_pta2 {
nxp,kinetis-port-pins = < 2 1 >;
};
TPM0_CH3_PTA2: tpm0_ch3_pta2 {
nxp,kinetis-port-pins = < 2 5 >;
};
RESET_b_PTA2: reset_b_pta2 {
nxp,kinetis-port-pins = < 2 7 >;
};
TSI0_CH10_PTA16: tsi0_ch10_pta16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTA16: GPIOA_PTA16: LLWU_P4_PTA16: gpioa_pta16 {
nxp,kinetis-port-pins = < 16 1 >;
};
SPI1_SOUT_PTA16: spi1_sout_pta16 {
nxp,kinetis-port-pins = < 16 2 >;
};
TPM0_CH0_PTA16: tpm0_ch0_pta16 {
nxp,kinetis-port-pins = < 16 5 >;
};
TSI0_CH11_PTA17: tsi0_ch11_pta17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTA17: GPIOA_PTA17: LLWU_P5_PTA17: RF_RESET_PTA17: gpioa_pta17 {
nxp,kinetis-port-pins = < 17 1 >;
};
SPI1_SIN_PTA17: spi1_sin_pta17 {
nxp,kinetis-port-pins = < 17 2 >;
};
TPM_CLKIN1_PTA17: tpm_clkin1_pta17 {
nxp,kinetis-port-pins = < 17 5 >;
};
TSI0_CH12_PTA18: tsi0_ch12_pta18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTA18: GPIOA_PTA18: LLWU_P6_PTA18: gpioa_pta18 {
nxp,kinetis-port-pins = < 18 1 >;
};
SPI1_SCK_PTA18: spi1_sck_pta18 {
nxp,kinetis-port-pins = < 18 2 >;
};
TPM2_CH0_PTA18: tpm2_ch0_pta18 {
nxp,kinetis-port-pins = < 18 5 >;
};
TSI0_CH13_PTA19: ADC0_SE5_PTA19: tsi0_ch13_pta19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTA19: GPIOA_PTA19: LLWU_P7_PTA19: gpioa_pta19 {
nxp,kinetis-port-pins = < 19 1 >;
};
SPI1_PCS0_PTA19: spi1_pcs0_pta19 {
nxp,kinetis-port-pins = < 19 2 >;
};
TPM2_CH1_PTA19: tpm2_ch1_pta19 {
nxp,kinetis-port-pins = < 19 5 >;
};
};
&portb {
PTB0: GPIOB_PTB0: LLWU_P8_PTB0: XTAL_OUT_EN_PTB0: gpiob_ptb0 {
nxp,kinetis-port-pins = < 0 1 >;
};
I2C0_SCL_PTB0: i2c0_scl_ptb0 {
nxp,kinetis-port-pins = < 0 3 >;
};
CMP0_OUT_PTB0: cmp0_out_ptb0 {
nxp,kinetis-port-pins = < 0 4 >;
};
TPM0_CH1_PTB0: tpm0_ch1_ptb0 {
nxp,kinetis-port-pins = < 0 5 >;
};
CLKOUT_PTB0: clkout_ptb0 {
nxp,kinetis-port-pins = < 0 7 >;
};
ADC0_SE1_PTB1: CMP0_IN5_PTB1: adc0_se1_ptb1 {
nxp,kinetis-port-pins = < 1 0 >;
};
PTB1: GPIOB_PTB1: gpiob_ptb1 {
nxp,kinetis-port-pins = < 1 1 >;
};
DTM_RX_PTB1: dtm_rx_ptb1 {
nxp,kinetis-port-pins = < 1 2 >;
};
I2C0_SDA_PTB1: i2c0_sda_ptb1 {
nxp,kinetis-port-pins = < 1 3 >;
};
LPTMR0_ALT1_PTB1: lptmr0_alt1_ptb1 {
nxp,kinetis-port-pins = < 1 4 >;
};
TPM0_CH2_PTB1: tpm0_ch2_ptb1 {
nxp,kinetis-port-pins = < 1 5 >;
};
CMT_IRO_PTB1: cmt_iro_ptb1 {
nxp,kinetis-port-pins = < 1 7 >;
};
ADC0_SE3_PTB2: CMP0_IN3_PTB2: adc0_se3_ptb2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTB2: GPIOB_PTB2: gpiob_ptb2 {
nxp,kinetis-port-pins = < 2 1 >;
};
RF_NOT_ALLOWED_PTB2: rf_not_allowed_ptb2 {
nxp,kinetis-port-pins = < 2 2 >;
};
DTM_TX_PTB2: dtm_tx_ptb2 {
nxp,kinetis-port-pins = < 2 3 >;
};
TPM1_CH0_PTB2: tpm1_ch0_ptb2 {
nxp,kinetis-port-pins = < 2 5 >;
};
ADC0_SE2_PTB3: CMP0_IN4_PTB3: adc0_se2_ptb3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTB3: GPIOB_PTB3: gpiob_ptb3 {
nxp,kinetis-port-pins = < 3 1 >;
};
CLKOUT_PTB3: clkout_ptb3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TPM1_CH1_PTB3: tpm1_ch1_ptb3 {
nxp,kinetis-port-pins = < 3 5 >;
};
RTC_CLKOUT_PTB3: rtc_clkout_ptb3 {
nxp,kinetis-port-pins = < 3 7 >;
};
EXTAL32K_PTB16: extal32k_ptb16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTB16: GPIOB_PTB16: gpiob_ptb16 {
nxp,kinetis-port-pins = < 16 1 >;
};
I2C1_SCL_PTB16: i2c1_scl_ptb16 {
nxp,kinetis-port-pins = < 16 3 >;
};
TPM2_CH0_PTB16: tpm2_ch0_ptb16 {
nxp,kinetis-port-pins = < 16 5 >;
};
XTAL32K_PTB17: xtal32k_ptb17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTB17: GPIOB_PTB17: gpiob_ptb17 {
nxp,kinetis-port-pins = < 17 1 >;
};
I2C1_SDA_PTB17: i2c1_sda_ptb17 {
nxp,kinetis-port-pins = < 17 3 >;
};
TPM2_CH1_PTB17: tpm2_ch1_ptb17 {
nxp,kinetis-port-pins = < 17 5 >;
};
BSM_CLK_PTB17: bsm_clk_ptb17 {
nxp,kinetis-port-pins = < 17 7 >;
};
DAC0_OUT_PTB18: ADC0_SE4_PTB18: CMP0_IN2_PTB18: dac0_out_ptb18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTB18: GPIOB_PTB18: gpiob_ptb18 {
nxp,kinetis-port-pins = < 18 1 >;
};
I2C1_SCL_PTB18: i2c1_scl_ptb18 {
nxp,kinetis-port-pins = < 18 3 >;
};
TPM_CLKIN0_PTB18: tpm_clkin0_ptb18 {
nxp,kinetis-port-pins = < 18 4 >;
};
TPM0_CH0_PTB18: tpm0_ch0_ptb18 {
nxp,kinetis-port-pins = < 18 5 >;
};
NMI_b_PTB18: nmi_b_ptb18 {
nxp,kinetis-port-pins = < 18 7 >;
};
};
&portc {
PTC1: GPIOC_PTC1: gpioc_ptc1 {
nxp,kinetis-port-pins = < 1 1 >;
};
ANT_B_PTC1: ant_b_ptc1 {
nxp,kinetis-port-pins = < 1 2 >;
};
I2C0_SDA_PTC1: i2c0_sda_ptc1 {
nxp,kinetis-port-pins = < 1 3 >;
};
UART0_RTS_b_PTC1: uart0_rts_b_ptc1 {
nxp,kinetis-port-pins = < 1 4 >;
};
TPM0_CH2_PTC1: tpm0_ch2_ptc1 {
nxp,kinetis-port-pins = < 1 5 >;
};
BLE_RF_ACTIVE_PTC1: ble_rf_active_ptc1 {
nxp,kinetis-port-pins = < 1 7 >;
};
TSI0_CH14_PTC2: tsi0_ch14_ptc2 {
nxp,kinetis-port-pins = < 2 0 >;
};
PTC2: GPIOC_PTC2: LLWU_P10_PTC2: gpioc_ptc2 {
nxp,kinetis-port-pins = < 2 1 >;
};
TX_SWITCH_PTC2: tx_switch_ptc2 {
nxp,kinetis-port-pins = < 2 2 >;
};
I2C1_SCL_PTC2: i2c1_scl_ptc2 {
nxp,kinetis-port-pins = < 2 3 >;
};
UART0_RX_PTC2: uart0_rx_ptc2 {
nxp,kinetis-port-pins = < 2 4 >;
};
CMT_IRO_PTC2: cmt_iro_ptc2 {
nxp,kinetis-port-pins = < 2 5 >;
};
DTM_RX_PTC2: dtm_rx_ptc2 {
nxp,kinetis-port-pins = < 2 7 >;
};
TSI0_CH15_PTC3: tsi0_ch15_ptc3 {
nxp,kinetis-port-pins = < 3 0 >;
};
PTC3: GPIOC_PTC3: LLWU_P11_PTC3: gpioc_ptc3 {
nxp,kinetis-port-pins = < 3 1 >;
};
RX_SWITCH_PTC3: rx_switch_ptc3 {
nxp,kinetis-port-pins = < 3 2 >;
};
I2C1_SDA_PTC3: i2c1_sda_ptc3 {
nxp,kinetis-port-pins = < 3 3 >;
};
UART0_TX_PTC3: uart0_tx_ptc3 {
nxp,kinetis-port-pins = < 3 4 >;
};
TPM0_CH1_PTC3: tpm0_ch1_ptc3 {
nxp,kinetis-port-pins = < 3 5 >;
};
DTM_TX_PTC3: dtm_tx_ptc3 {
nxp,kinetis-port-pins = < 3 7 >;
};
TSI0_CH0_PTC4: tsi0_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 0 >;
};
PTC4: GPIOC_PTC4: LLWU_P12_PTC4: gpioc_ptc4 {
nxp,kinetis-port-pins = < 4 1 >;
};
ANT_A_PTC4: ant_a_ptc4 {
nxp,kinetis-port-pins = < 4 2 >;
};
EXTRG_IN_PTC4: extrg_in_ptc4 {
nxp,kinetis-port-pins = < 4 3 >;
};
UART0_CTS_b_PTC4: uart0_cts_b_ptc4 {
nxp,kinetis-port-pins = < 4 4 >;
};
TPM1_CH0_PTC4: tpm1_ch0_ptc4 {
nxp,kinetis-port-pins = < 4 5 >;
};
BSM_DATA_PTC4: bsm_data_ptc4 {
nxp,kinetis-port-pins = < 4 7 >;
};
TSI0_CH1_PTC5: tsi0_ch1_ptc5 {
nxp,kinetis-port-pins = < 5 0 >;
};
PTC5: GPIOC_PTC5: LLWU_P13_PTC5: gpioc_ptc5 {
nxp,kinetis-port-pins = < 5 1 >;
};
RF_NOT_ALLOWED_PTC5: rf_not_allowed_ptc5 {
nxp,kinetis-port-pins = < 5 2 >;
};
LPTMR0_ALT2_PTC5: lptmr0_alt2_ptc5 {
nxp,kinetis-port-pins = < 5 3 >;
};
UART0_RTS_b_PTC5: uart0_rts_b_ptc5 {
nxp,kinetis-port-pins = < 5 4 >;
};
TPM1_CH1_PTC5: tpm1_ch1_ptc5 {
nxp,kinetis-port-pins = < 5 5 >;
};
BSM_CLK_PTC5: bsm_clk_ptc5 {
nxp,kinetis-port-pins = < 5 7 >;
};
TSI0_CH2_PTC6: tsi0_ch2_ptc6 {
nxp,kinetis-port-pins = < 6 0 >;
};
PTC6: GPIOC_PTC6: LLWU_P14_PTC6: XTAL_OUT_EN_PTC6: gpioc_ptc6 {
nxp,kinetis-port-pins = < 6 1 >;
};
I2C1_SCL_PTC6: i2c1_scl_ptc6 {
nxp,kinetis-port-pins = < 6 3 >;
};
UART0_RX_PTC6: uart0_rx_ptc6 {
nxp,kinetis-port-pins = < 6 4 >;
};
TPM2_CH0_PTC6: tpm2_ch0_ptc6 {
nxp,kinetis-port-pins = < 6 5 >;
};
BSM_FRAME_PTC6: bsm_frame_ptc6 {
nxp,kinetis-port-pins = < 6 7 >;
};
TSI0_CH3_PTC7: tsi0_ch3_ptc7 {
nxp,kinetis-port-pins = < 7 0 >;
};
PTC7: GPIOC_PTC7: LLWU_P15_PTC7: gpioc_ptc7 {
nxp,kinetis-port-pins = < 7 1 >;
};
SPI0_PCS2_PTC7: spi0_pcs2_ptc7 {
nxp,kinetis-port-pins = < 7 2 >;
};
I2C1_SDA_PTC7: i2c1_sda_ptc7 {
nxp,kinetis-port-pins = < 7 3 >;
};
UART0_TX_PTC7: uart0_tx_ptc7 {
nxp,kinetis-port-pins = < 7 4 >;
};
TPM2_CH1_PTC7: tpm2_ch1_ptc7 {
nxp,kinetis-port-pins = < 7 5 >;
};
BSM_DATA_PTC7: bsm_data_ptc7 {
nxp,kinetis-port-pins = < 7 7 >;
};
TSI0_CH4_PTC16: tsi0_ch4_ptc16 {
nxp,kinetis-port-pins = < 16 0 >;
};
PTC16: GPIOC_PTC16: LLWU_P0_PTC16: gpioc_ptc16 {
nxp,kinetis-port-pins = < 16 1 >;
};
SPI0_SCK_PTC16: spi0_sck_ptc16 {
nxp,kinetis-port-pins = < 16 2 >;
};
I2C0_SDA_PTC16: i2c0_sda_ptc16 {
nxp,kinetis-port-pins = < 16 3 >;
};
UART0_RTS_b_PTC16: uart0_rts_b_ptc16 {
nxp,kinetis-port-pins = < 16 4 >;
};
TPM0_CH3_PTC16: tpm0_ch3_ptc16 {
nxp,kinetis-port-pins = < 16 5 >;
};
TSI0_CH5_PTC17: tsi0_ch5_ptc17 {
nxp,kinetis-port-pins = < 17 0 >;
};
PTC17: GPIOC_PTC17: LLWU_P1_PTC17: gpioc_ptc17 {
nxp,kinetis-port-pins = < 17 1 >;
};
SPI0_SOUT_PTC17: spi0_sout_ptc17 {
nxp,kinetis-port-pins = < 17 2 >;
};
I2C1_SCL_PTC17: i2c1_scl_ptc17 {
nxp,kinetis-port-pins = < 17 3 >;
};
UART0_RX_PTC17: uart0_rx_ptc17 {
nxp,kinetis-port-pins = < 17 4 >;
};
BSM_FRAME_PTC17: bsm_frame_ptc17 {
nxp,kinetis-port-pins = < 17 5 >;
};
DTM_RX_PTC17: dtm_rx_ptc17 {
nxp,kinetis-port-pins = < 17 7 >;
};
TSI0_CH6_PTC18: tsi0_ch6_ptc18 {
nxp,kinetis-port-pins = < 18 0 >;
};
PTC18: GPIOC_PTC18: LLWU_P2_PTC18: gpioc_ptc18 {
nxp,kinetis-port-pins = < 18 1 >;
};
SPI0_SIN_PTC18: spi0_sin_ptc18 {
nxp,kinetis-port-pins = < 18 2 >;
};
I2C1_SDA_PTC18: i2c1_sda_ptc18 {
nxp,kinetis-port-pins = < 18 3 >;
};
UART0_TX_PTC18: uart0_tx_ptc18 {
nxp,kinetis-port-pins = < 18 4 >;
};
BSM_DATA_PTC18: bsm_data_ptc18 {
nxp,kinetis-port-pins = < 18 5 >;
};
DTM_TX_PTC18: dtm_tx_ptc18 {
nxp,kinetis-port-pins = < 18 7 >;
};
TSI0_CH7_PTC19: tsi0_ch7_ptc19 {
nxp,kinetis-port-pins = < 19 0 >;
};
PTC19: GPIOC_PTC19: LLWU_P3_PTC19: gpioc_ptc19 {
nxp,kinetis-port-pins = < 19 1 >;
};
SPI0_PCS0_PTC19: spi0_pcs0_ptc19 {
nxp,kinetis-port-pins = < 19 2 >;
};
I2C0_SCL_PTC19: i2c0_scl_ptc19 {
nxp,kinetis-port-pins = < 19 3 >;
};
UART0_CTS_b_PTC19: uart0_cts_b_ptc19 {
nxp,kinetis-port-pins = < 19 4 >;
};
BSM_CLK_PTC19: bsm_clk_ptc19 {
nxp,kinetis-port-pins = < 19 5 >;
};
BLE_RF_ACTIVE_PTC19: ble_rf_active_ptc19 {
nxp,kinetis-port-pins = < 19 7 >;
};
};

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@ -0,0 +1,181 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MKW41Z512VHT4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DTS_BINDING_MKW41Z512VHT4_
#define _ZEPHYR_DTS_BINDING_MKW41Z512VHT4_
#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#define TSI0_CH8_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */
#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define SPI0_PCS1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
#define TPM1_CH0_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */
#define SWD_DIO_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define TSI0_CH9_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define SPI1_PCS0_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM1_CH1_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */
#define SWD_CLK_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define TPM0_CH3_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */
#define RESET_b_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
#define TSI0_CH10_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */
#define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define LLWU_P4_PTA16 KINETIS_MUX('A',16,1) /* PTA16 */
#define SPI1_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */
#define TPM0_CH0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */
#define TSI0_CH11_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */
#define RF_RESET_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define LLWU_P5_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */
#define SPI1_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */
#define TPM_CLKIN1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */
#define TSI0_CH12_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define LLWU_P6_PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define SPI1_SCK_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */
#define TPM2_CH0_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */
#define TSI0_CH13_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define ADC0_SE5_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define LLWU_P7_PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define SPI1_PCS0_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */
#define TPM2_CH1_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P8_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define XTAL_OUT_EN_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define CMP0_OUT_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define TPM0_CH1_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define CLKOUT_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */
#define CMP0_IN5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define ADC0_SE1_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define DTM_RX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define LPTMR0_ALT1_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define TPM0_CH2_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define CMT_IRO_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */
#define CMP0_IN3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define ADC0_SE3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
#define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
#define RF_NOT_ALLOWED_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
#define DTM_TX_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
#define TPM1_CH0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */
#define ADC0_SE2_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define CMP0_IN4_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
#define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
#define CLKOUT_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */
#define TPM1_CH1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */
#define RTC_CLKOUT_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */
#define EXTAL32K_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */
#define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
#define I2C1_SCL_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
#define TPM2_CH0_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */
#define XTAL32K_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */
#define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
#define I2C1_SDA_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
#define TPM2_CH1_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */
#define BSM_CLK_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */
#define ADC0_SE4_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define DAC0_OUT_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define CMP0_IN2_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */
#define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
#define I2C1_SCL_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
#define TPM_CLKIN0_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
#define TPM0_CH0_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */
#define NMI_b_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define ANT_B_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define I2C0_SDA_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
#define UART0_RTS_b_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define TPM0_CH2_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */
#define BLE_RF_ACTIVE_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
#define TSI0_CH14_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define LLWU_P10_PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define TX_SWITCH_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define I2C1_SCL_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
#define UART0_RX_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define CMT_IRO_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */
#define DTM_RX_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
#define TSI0_CH15_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
#define LLWU_P11_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define RX_SWITCH_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define I2C1_SDA_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define UART0_TX_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define TPM0_CH1_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define DTM_TX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
#define TSI0_CH0_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */
#define LLWU_P12_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define ANT_A_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define EXTRG_IN_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define UART0_CTS_b_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define TPM1_CH0_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define BSM_DATA_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
#define TSI0_CH1_PTC5 KINETIS_MUX('C',5,0) /* PTC5 */
#define LLWU_P13_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define RF_NOT_ALLOWED_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define UART0_RTS_b_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
#define TPM1_CH1_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */
#define BSM_CLK_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
#define TSI0_CH2_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P14_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define XTAL_OUT_EN_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define I2C1_SCL_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define UART0_RX_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
#define TPM2_CH0_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define BSM_FRAME_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */
#define TSI0_CH3_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define LLWU_P15_PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_PCS2_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define I2C1_SDA_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
#define UART0_TX_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
#define TPM2_CH1_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define BSM_DATA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */
#define TSI0_CH4_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */
#define LLWU_P0_PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */
#define SPI0_SCK_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */
#define I2C0_SDA_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */
#define UART0_RTS_b_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */
#define TPM0_CH3_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */
#define TSI0_CH5_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */
#define LLWU_P1_PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */
#define SPI0_SOUT_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */
#define I2C1_SCL_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */
#define UART0_RX_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */
#define BSM_FRAME_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */
#define DTM_RX_PTC17 KINETIS_MUX('C',17,7) /* PTC17 */
#define TSI0_CH6_PTC18 KINETIS_MUX('C',18,0) /* PTC18 */
#define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define LLWU_P2_PTC18 KINETIS_MUX('C',18,1) /* PTC18 */
#define SPI0_SIN_PTC18 KINETIS_MUX('C',18,2) /* PTC18 */
#define I2C1_SDA_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */
#define UART0_TX_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */
#define BSM_DATA_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */
#define DTM_TX_PTC18 KINETIS_MUX('C',18,7) /* PTC18 */
#define TSI0_CH7_PTC19 KINETIS_MUX('C',19,0) /* PTC19 */
#define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define LLWU_P3_PTC19 KINETIS_MUX('C',19,1) /* PTC19 */
#define SPI0_PCS0_PTC19 KINETIS_MUX('C',19,2) /* PTC19 */
#define I2C0_SCL_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */
#define UART0_CTS_b_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */
#define BSM_CLK_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */
#define BLE_RF_ACTIVE_PTC19 KINETIS_MUX('C',19,7) /* PTC19 */
#endif