mirror of https://review.coreboot.org/fsp.git
Amber Lake FSP 3.7.6
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@ -667,7 +667,8 @@ StructDef
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$gKabylakeFspPkgTokenSpaceGuid_Early8254ClockGatingEnable 1 bytes $_DEFAULT_ = 0x00
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$gKabylakeFspPkgTokenSpaceGuid_Early8254ClockGatingEnable 1 bytes $_DEFAULT_ = 0x00
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$gKabylakeFspPkgTokenSpaceGuid_SataRstOptaneMemory 1 bytes $_DEFAULT_ = 0x01
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$gKabylakeFspPkgTokenSpaceGuid_SataRstOptaneMemory 1 bytes $_DEFAULT_ = 0x01
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$gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage 1 bytes $_DEFAULT_ = 0x01
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$gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage 1 bytes $_DEFAULT_ = 0x01
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Skip 2 bytes
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$gKabylakeFspPkgTokenSpaceGuid_HybridStorageMode 1 bytes $_DEFAULT_ = 0x00
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Skip 1 bytes
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$gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr 4 bytes $_DEFAULT_ = 0x00000000
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$gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr 4 bytes $_DEFAULT_ = 0x00000000
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$gKabylakeFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00
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$gKabylakeFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00
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$gSkylakeFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF
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$gSkylakeFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF
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@ -2913,6 +2914,8 @@ Page "Sunrise Point PCH"
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Help "Optane Memory"
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Help "Optane Memory"
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Combo $gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage, "PCH SATA RST CPU attached storage", &EN_DIS,
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Combo $gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage, "PCH SATA RST CPU attached storage", &EN_DIS,
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Help "RST CPU attached storage"
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Help "RST CPU attached storage"
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Combo $gKabylakeFspPkgTokenSpaceGuid_HybridStorageMode, "Hybrid Storage Mode", &EN_DIS,
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Help "Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration. Default is 0: Disabled"
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EditNum $gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr, "Pch PCIE device override table pointer", HEX,
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EditNum $gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr, "Pch PCIE device override table pointer", HEX,
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Help "The PCIe device table is being used to override PCIe device ASPM settings. This is a pointer points to a 32bit address. And it's only used in PostMem phase. Please refer to PCH_PCIE_DEVICE_OVERRIDE structure for the table. Last entry VendorId must be 0."
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Help "The PCIe device table is being used to override PCIe device ASPM settings. This is a pointer points to a 32bit address. And it's only used in PostMem phase. Please refer to PCH_PCIE_DEVICE_OVERRIDE structure for the table. Last entry VendorId must be 0."
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"Valid range: 0x00 ~ 0xFFFFFFFF"
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"Valid range: 0x00 ~ 0xFFFFFFFF"
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@ -2010,9 +2010,16 @@ typedef struct {
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**/
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**/
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UINT8 SataRstCpuAttachedStorage;
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UINT8 SataRstCpuAttachedStorage;
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/** Offset 0x0722
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/** Offset 0x0722 - Hybrid Storage Mode
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Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration.
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Default is 0: Disabled
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$EN_DIS
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**/
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**/
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UINT8 UnusedUpdSpace18[2];
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UINT8 HybridStorageMode;
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/** Offset 0x0723
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**/
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UINT8 UnusedUpdSpace18;
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/** Offset 0x0724 - Pch PCIE device override table pointer
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/** Offset 0x0724 - Pch PCIE device override table pointer
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The PCIe device table is being used to override PCIe device ASPM settings. This
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The PCIe device table is being used to override PCIe device ASPM settings. This
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