diff --git a/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.chm b/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.chm index 7d7d52c..d808a4d 100644 Binary files a/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.chm and b/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.chm differ diff --git a/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.pdf b/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.pdf index 65bc942..086f390 100644 --- a/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.pdf +++ b/AmberLakeFspBinPkg/Docs/Amberlake_FSP_Integration_Guide.pdf @@ -1084,2102 +1084,2108 @@ endobj << /S /GoTo /D (subsubsection.8.6.2.21) >> endobj 724 0 obj -(\376\377\0008\000.\0006\000.\0002\000.\0002\0001\000\040\000I\000c\000c\000M\000a\000x) +(\376\377\0008\000.\0006\000.\0002\000.\0002\0001\000\040\000H\000y\000b\000r\000i\000d\000S\000t\000o\000r\000a\000g\000e\000M\000o\000d\000e) endobj 725 0 obj << /S /GoTo /D (subsubsection.8.6.2.22) >> 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-(\376\377\0008\000.\0007\000\040\000F\000S\000P\000\137\000S\000\137\000T\000E\000S\000T\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0006\000.\0002\000.\0002\0000\0007\000\040\000X\000d\000c\000i\000E\000n\000a\000b\000l\000e) endobj 1469 0 obj -<< /S /GoTo /D (subsection.8.7.1) >> +<< /S /GoTo /D (section.8.7) >> endobj 1472 0 obj -(\376\377\0008\000.\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0007\000\040\000F\000S\000P\000\137\000S\000\137\000T\000E\000S\000T\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1473 0 obj -<< /S /GoTo /D (subsection.8.7.2) >> +<< /S /GoTo /D (subsection.8.7.1) >> endobj 1476 0 obj -(\376\377\0008\000.\0007\000.\0002\000\040\000M\000e\000m\000b\000e\000r\000\040\000D\000a\000t\000a\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) +(\376\377\0008\000.\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1477 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.1) >> +<< /S /GoTo /D (subsection.8.7.2) >> endobj 1480 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0001\000\040\000A\000p\000H\000a\000n\000d\000o\000f\000f\000M\000a\000n\000n\000e\000r) +(\376\377\0008\000.\0007\000.\0002\000\040\000M\000e\000m\000b\000e\000r\000\040\000D\000a\000t\000a\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) endobj 1481 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.2) >> +<< /S /GoTo /D (subsubsection.8.7.2.1) >> endobj 1484 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0002\000\040\000A\000p\000I\000d\000l\000e\000M\000a\000n\000n\000e\000r) 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-(\376\377\0008\000.\0007\000.\0002\000.\0005\000\040\000C\000o\000n\000f\000i\000g\000T\000d\000p\000B\000i\000o\000s) +(\376\377\0008\000.\0007\000.\0002\000.\0004\000\040\000C\0001\000e) endobj 1497 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.6) >> +<< /S /GoTo /D (subsubsection.8.7.2.5) >> endobj 1500 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0006\000\040\000C\000S\000t\000a\000t\000e\000P\000r\000e\000W\000a\000k\000e) +(\376\377\0008\000.\0007\000.\0002\000.\0005\000\040\000C\000o\000n\000f\000i\000g\000T\000d\000p\000B\000i\000o\000s) endobj 1501 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.7) >> +<< /S /GoTo /D (subsubsection.8.7.2.6) >> endobj 1504 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0007\000\040\000C\000s\000t\000C\000f\000g\000C\000t\000r\000I\000o\000M\000w\000a\000i\000t\000R\000e\000d\000i\000r\000e\000c\000t\000i\000o\000n) +(\376\377\0008\000.\0007\000.\0002\000.\0006\000\040\000C\000S\000t\000a\000t\000e\000P\000r\000e\000W\000a\000k\000e) endobj 1505 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.8) >> +<< /S /GoTo /D (subsubsection.8.7.2.7) >> endobj 1508 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0008\000\040\000C\000u\000s\000t\000o\000m\0001\000C\000o\000n\000f\000i\000g\000T\000d\000p\000C\000o\000n\000t\000r\000o\000l) +(\376\377\0008\000.\0007\000.\0002\000.\0007\000\040\000C\000s\000t\000C\000f\000g\000C\000t\000r\000I\000o\000M\000w\000a\000i\000t\000R\000e\000d\000i\000r\000e\000c\000t\000i\000o\000n) endobj 1509 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.9) >> +<< /S /GoTo /D (subsubsection.8.7.2.8) >> endobj 1512 0 obj -(\376\377\0008\000.\0007\000.\0002\000.\0009\000\040\000C\000u\000s\000t\000o\000m\0001\000P\000o\000w\000e\000r\000L\000i\000m\000i\000t\0001) +(\376\377\0008\000.\0007\000.\0002\000.\0008\000\040\000C\000u\000s\000t\000o\000m\0001\000C\000o\000n\000f\000i\000g\000T\000d\000p\000C\000o\000n\000t\000r\000o\000l) endobj 1513 0 obj -<< /S /GoTo /D (subsubsection.8.7.2.10) >> +<< /S /GoTo /D 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-(\376\377\0008\000.\0009\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0009\000\040\000F\000S\000P\000M\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1849 0 obj -<< /S /GoTo /D (section.8.10) >> +<< /S /GoTo /D (subsection.8.9.1) >> endobj 1852 0 obj -(\376\377\0008\000.\0001\0000\000\040\000F\000S\000P\000S\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0009\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1853 0 obj -<< /S /GoTo /D (subsection.8.10.1) >> +<< /S /GoTo /D (section.8.10) >> endobj 1856 0 obj -(\376\377\0008\000.\0001\0000\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0000\000\040\000F\000S\000P\000S\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1857 0 obj -<< /S /GoTo /D (section.8.11) >> +<< /S /GoTo /D (subsection.8.10.1) >> endobj 1860 0 obj -(\376\377\0008\000.\0001\0001\000\040\000F\000S\000P\000T\000\137\000C\000O\000R\000E\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0000\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1861 0 obj -<< /S /GoTo /D (subsection.8.11.1) >> +<< /S /GoTo /D (section.8.11) >> endobj 1864 0 obj -(\376\377\0008\000.\0001\0001\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0001\000\040\000F\000S\000P\000T\000\137\000C\000O\000R\000E\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1865 0 obj -<< /S /GoTo /D (section.8.12) >> +<< /S /GoTo /D (subsection.8.11.1) >> endobj 1868 0 obj -(\376\377\0008\000.\0001\0002\000\040\000F\000S\000P\000T\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0001\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1869 0 obj -<< /S /GoTo /D (subsection.8.12.1) >> +<< /S /GoTo /D (section.8.12) >> endobj 1872 0 obj -(\376\377\0008\000.\0001\0002\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0002\000\040\000F\000S\000P\000T\000\137\000U\000P\000D\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1873 0 obj -<< /S /GoTo /D (section.8.13) >> +<< /S /GoTo /D (subsection.8.12.1) >> endobj 1876 0 obj -(\376\377\0008\000.\0001\0003\000\040\000G\000P\000I\000O\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0002\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1877 0 obj -<< /S /GoTo /D (subsection.8.13.1) >> +<< /S /GoTo /D (section.8.13) >> endobj 1880 0 obj -(\376\377\0008\000.\0001\0003\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0003\000\040\000G\000P\000I\000O\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1881 0 obj -<< /S /GoTo /D (subsection.8.13.2) >> +<< /S /GoTo /D (subsection.8.13.1) >> endobj 1884 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000\040\000M\000e\000m\000b\000e\000r\000\040\000D\000a\000t\000a\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0003\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1885 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.1) >> +<< /S /GoTo /D (subsection.8.13.2) >> endobj 1888 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0001\000\040\000D\000i\000r\000e\000c\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0003\000.\0002\000\040\000M\000e\000m\000b\000e\000r\000\040\000D\000a\000t\000a\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) endobj 1889 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.2) >> +<< /S /GoTo /D (subsubsection.8.13.2.1) >> endobj 1892 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0002\000\040\000E\000l\000e\000c\000t\000r\000i\000c\000a\000l\000C\000o\000n\000f\000i\000g) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0001\000\040\000D\000i\000r\000e\000c\000t\000i\000o\000n) endobj 1893 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.3) >> +<< /S /GoTo /D (subsubsection.8.13.2.2) >> endobj 1896 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0003\000\040\000H\000o\000s\000t\000S\000o\000f\000t\000P\000a\000d\000O\000w\000n) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0002\000\040\000E\000l\000e\000c\000t\000r\000i\000c\000a\000l\000C\000o\000n\000f\000i\000g) endobj 1897 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.4) >> +<< /S /GoTo /D (subsubsection.8.13.2.3) >> endobj 1900 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0004\000\040\000I\000n\000t\000e\000r\000r\000u\000p\000t\000C\000o\000n\000f\000i\000g) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0003\000\040\000H\000o\000s\000t\000S\000o\000f\000t\000P\000a\000d\000O\000w\000n) endobj 1901 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.5) >> +<< /S /GoTo /D (subsubsection.8.13.2.4) >> endobj 1904 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0005\000\040\000L\000o\000c\000k\000C\000o\000n\000f\000i\000g) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0004\000\040\000I\000n\000t\000e\000r\000r\000u\000p\000t\000C\000o\000n\000f\000i\000g) endobj 1905 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.6) >> +<< /S /GoTo /D (subsubsection.8.13.2.5) >> endobj 1908 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0006\000\040\000O\000u\000t\000p\000u\000t\000S\000t\000a\000t\000e) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0005\000\040\000L\000o\000c\000k\000C\000o\000n\000f\000i\000g) endobj 1909 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.7) >> +<< /S /GoTo /D (subsubsection.8.13.2.6) >> endobj 1912 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0007\000\040\000P\000a\000d\000M\000o\000d\000e) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0006\000\040\000O\000u\000t\000p\000u\000t\000S\000t\000a\000t\000e) endobj 1913 0 obj -<< /S /GoTo /D (subsubsection.8.13.2.8) >> +<< /S /GoTo /D (subsubsection.8.13.2.7) >> endobj 1916 0 obj -(\376\377\0008\000.\0001\0003\000.\0002\000.\0008\000\040\000P\000o\000w\000e\000r\000C\000o\000n\000f\000i\000g) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0007\000\040\000P\000a\000d\000M\000o\000d\000e) endobj 1917 0 obj -<< /S /GoTo /D (section.8.14) >> +<< /S /GoTo /D (subsubsection.8.13.2.8) >> endobj 1920 0 obj -(\376\377\0008\000.\0001\0004\000\040\000M\000E\000M\000O\000R\000Y\000\137\000P\000L\000A\000T\000F\000O\000R\000M\000\137\000D\000A\000T\000A\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0003\000.\0002\000.\0008\000\040\000P\000o\000w\000e\000r\000C\000o\000n\000f\000i\000g) endobj 1921 0 obj -<< /S /GoTo /D (subsection.8.14.1) >> +<< /S /GoTo /D (section.8.14) >> endobj 1924 0 obj -(\376\377\0008\000.\0001\0004\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0004\000\040\000M\000E\000M\000O\000R\000Y\000\137\000P\000L\000A\000T\000F\000O\000R\000M\000\137\000D\000A\000T\000A\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1925 0 obj -<< /S /GoTo /D (section.8.15) >> +<< /S /GoTo /D (subsection.8.14.1) >> endobj 1928 0 obj -(\376\377\0008\000.\0001\0005\000\040\000S\000I\000\137\000C\000H\000I\000P\000S\000E\000T\000\137\000I\000N\000I\000T\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0004\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1929 0 obj -<< /S /GoTo /D (subsection.8.15.1) >> +<< /S /GoTo /D (section.8.15) >> endobj 1932 0 obj -(\376\377\0008\000.\0001\0005\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0005\000\040\000S\000I\000\137\000C\000H\000I\000P\000S\000E\000T\000\137\000I\000N\000I\000T\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1933 0 obj -<< /S /GoTo /D (section.8.16) >> +<< /S /GoTo /D (subsection.8.15.1) >> endobj 1936 0 obj -(\376\377\0008\000.\0001\0006\000\040\000S\000I\000\137\000P\000C\000H\000\137\000D\000E\000V\000I\000C\000E\000\137\000I\000N\000T\000E\000R\000R\000U\000P\000T\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0005\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1937 0 obj -<< /S /GoTo /D (subsection.8.16.1) >> +<< /S /GoTo /D (section.8.16) >> endobj 1940 0 obj -(\376\377\0008\000.\0001\0006\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0006\000\040\000S\000I\000\137\000P\000C\000H\000\137\000D\000E\000V\000I\000C\000E\000\137\000I\000N\000T\000E\000R\000R\000U\000P\000T\000\137\000C\000O\000N\000F\000I\000G\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1941 0 obj -<< /S /GoTo /D (section.8.17) >> +<< /S /GoTo /D (subsection.8.16.1) >> endobj 1944 0 obj -(\376\377\0008\000.\0001\0007\000\040\000S\000M\000B\000I\000O\000S\000\137\000C\000A\000C\000H\000E\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0006\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1945 0 obj -<< /S /GoTo /D (subsection.8.17.1) >> +<< /S /GoTo /D (section.8.17) >> endobj 1948 0 obj -(\376\377\0008\000.\0001\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0007\000\040\000S\000M\000B\000I\000O\000S\000\137\000C\000A\000C\000H\000E\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1949 0 obj -<< /S /GoTo /D (section.8.18) >> +<< /S /GoTo /D (subsection.8.17.1) >> endobj 1952 0 obj -(\376\377\0008\000.\0001\0008\000\040\000S\000M\000B\000I\000O\000S\000\137\000P\000R\000O\000C\000E\000S\000S\000O\000R\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0008\000.\0001\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1953 0 obj -<< /S /GoTo /D (subsection.8.18.1) >> +<< /S /GoTo /D (section.8.18) >> endobj 1956 0 obj -(\376\377\0008\000.\0001\0008\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0008\000\040\000S\000M\000B\000I\000O\000S\000\137\000P\000R\000O\000C\000E\000S\000S\000O\000R\000\137\000I\000N\000F\000O\000\040\000S\000t\000r\000u\000c\000t\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1957 0 obj -<< /S /GoTo /D (chapter.9) >> +<< /S /GoTo /D (subsection.8.18.1) >> endobj 1960 0 obj -(\376\377\0009\000\040\000F\000i\000l\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) +(\376\377\0008\000.\0001\0008\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1961 0 obj -<< /S /GoTo /D (section.9.1) >> +<< /S /GoTo /D (chapter.9) >> endobj 1964 0 obj -(\376\377\0009\000.\0001\000\040\000C\000p\000u\000C\000o\000n\000f\000i\000g\000F\000s\000p\000D\000a\000t\000a\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000\040\000F\000i\000l\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) endobj 1965 0 obj -<< /S /GoTo /D (subsection.9.1.1) >> +<< /S /GoTo /D (section.9.1) >> endobj 1968 0 obj -(\376\377\0009\000.\0001\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0001\000\040\000C\000p\000u\000C\000o\000n\000f\000i\000g\000F\000s\000p\000D\000a\000t\000a\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1969 0 obj -<< /S /GoTo /D (section.9.2) >> +<< /S /GoTo /D (subsection.9.1.1) >> endobj 1972 0 obj -(\376\377\0009\000.\0002\000\040\000D\000o\000x\000y\000g\000e\000n\000F\000s\000p\000I\000n\000t\000e\000g\000r\000a\000t\000i\000o\000n\000G\000u\000i\000d\000e\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0001\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1973 0 obj -<< /S /GoTo /D (subsection.9.2.1) >> +<< /S /GoTo /D (section.9.2) >> endobj 1976 0 obj -(\376\377\0009\000.\0002\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0002\000\040\000D\000o\000x\000y\000g\000e\000n\000F\000s\000p\000I\000n\000t\000e\000g\000r\000a\000t\000i\000o\000n\000G\000u\000i\000d\000e\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1977 0 obj -<< /S /GoTo /D (section.9.3) >> +<< /S /GoTo /D (subsection.9.2.1) >> endobj 1980 0 obj -(\376\377\0009\000.\0003\000\040\000F\000s\000p\000m\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0002\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1981 0 obj -<< /S /GoTo /D (subsection.9.3.1) >> +<< /S /GoTo /D (section.9.3) >> endobj 1984 0 obj -(\376\377\0009\000.\0003\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0003\000\040\000F\000s\000p\000m\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1985 0 obj -<< /S /GoTo /D (section.9.4) >> +<< /S /GoTo /D (subsection.9.3.1) >> endobj 1988 0 obj -(\376\377\0009\000.\0004\000\040\000F\000s\000p\000s\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0003\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1989 0 obj -<< /S /GoTo /D (subsection.9.4.1) >> +<< /S /GoTo /D (section.9.4) >> endobj 1992 0 obj -(\376\377\0009\000.\0004\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0004\000\040\000F\000s\000p\000s\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 1993 0 obj -<< /S /GoTo /D (subsection.9.4.2) >> +<< /S /GoTo /D (subsection.9.4.1) >> endobj 1996 0 obj -(\376\377\0009\000.\0004\000.\0002\000\040\000E\000n\000u\000m\000e\000r\000a\000t\000i\000o\000n\000\040\000T\000y\000p\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) +(\376\377\0009\000.\0004\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 1997 0 obj -<< /S /GoTo /D (subsubsection.9.4.2.1) >> +<< /S /GoTo /D (subsection.9.4.2) >> endobj 2000 0 obj -(\376\377\0009\000.\0004\000.\0002\000.\0001\000\040\000S\000I\000\137\000P\000C\000H\000\137\000I\000N\000T\000\137\000P\000I\000N) +(\376\377\0009\000.\0004\000.\0002\000\040\000E\000n\000u\000m\000e\000r\000a\000t\000i\000o\000n\000\040\000T\000y\000p\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) endobj 2001 0 obj -<< /S /GoTo /D (section.9.5) >> +<< /S /GoTo /D (subsubsection.9.4.2.1) >> endobj 2004 0 obj -(\376\377\0009\000.\0005\000\040\000F\000s\000p\000t\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0004\000.\0002\000.\0001\000\040\000S\000I\000\137\000P\000C\000H\000\137\000I\000N\000T\000\137\000P\000I\000N) endobj 2005 0 obj -<< /S /GoTo /D (subsection.9.5.1) >> +<< /S /GoTo /D (section.9.5) >> endobj 2008 0 obj -(\376\377\0009\000.\0005\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0005\000\040\000F\000s\000p\000t\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 2009 0 obj -<< /S /GoTo /D (section.9.6) >> +<< /S /GoTo /D (subsection.9.5.1) >> endobj 2012 0 obj -(\376\377\0009\000.\0006\000\040\000F\000s\000p\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0005\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 2013 0 obj -<< /S /GoTo /D (subsection.9.6.1) >> +<< /S /GoTo /D (section.9.6) >> endobj 2016 0 obj -(\376\377\0009\000.\0006\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0006\000\040\000F\000s\000p\000U\000p\000d\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 2017 0 obj -<< /S /GoTo /D (section.9.7) >> +<< /S /GoTo /D (subsection.9.6.1) >> endobj 2020 0 obj -(\376\377\0009\000.\0007\000\040\000G\000p\000i\000o\000C\000o\000n\000f\000i\000g\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0006\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 2021 0 obj -<< /S /GoTo /D (subsection.9.7.1) >> +<< /S /GoTo /D (section.9.7) >> endobj 2024 0 obj -(\376\377\0009\000.\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) +(\376\377\0009\000.\0007\000\040\000G\000p\000i\000o\000C\000o\000n\000f\000i\000g\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) endobj 2025 0 obj -<< /S /GoTo /D (subsection.9.7.2) >> +<< /S /GoTo /D (subsection.9.7.1) >> endobj 2028 0 obj -(\376\377\0009\000.\0007\000.\0002\000\040\000E\000n\000u\000m\000e\000r\000a\000t\000i\000o\000n\000\040\000T\000y\000p\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) +(\376\377\0009\000.\0007\000.\0001\000\040\000D\000e\000t\000a\000i\000l\000e\000d\000\040\000D\000e\000s\000c\000r\000i\000p\000t\000i\000o\000n) endobj 2029 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.1) >> +<< /S /GoTo /D (subsection.9.7.2) >> endobj 2032 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0001\000\040\000G\000P\000I\000O\000\137\000D\000I\000R\000E\000C\000T\000I\000O\000N) +(\376\377\0009\000.\0007\000.\0002\000\040\000E\000n\000u\000m\000e\000r\000a\000t\000i\000o\000n\000\040\000T\000y\000p\000e\000\040\000D\000o\000c\000u\000m\000e\000n\000t\000a\000t\000i\000o\000n) endobj 2033 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.2) >> +<< /S /GoTo /D (subsubsection.9.7.2.1) >> endobj 2036 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0002\000\040\000G\000P\000I\000O\000\137\000E\000L\000E\000C\000T\000R\000I\000C\000A\000L\000\137\000C\000O\000N\000F\000I\000G) +(\376\377\0009\000.\0007\000.\0002\000.\0001\000\040\000G\000P\000I\000O\000\137\000D\000I\000R\000E\000C\000T\000I\000O\000N) endobj 2037 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.3) >> +<< /S /GoTo /D (subsubsection.9.7.2.2) >> endobj 2040 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0003\000\040\000G\000P\000I\000O\000\137\000H\000A\000R\000D\000W\000A\000R\000E\000\137\000D\000E\000F\000A\000U\000L\000T) +(\376\377\0009\000.\0007\000.\0002\000.\0002\000\040\000G\000P\000I\000O\000\137\000E\000L\000E\000C\000T\000R\000I\000C\000A\000L\000\137\000C\000O\000N\000F\000I\000G) endobj 2041 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.4) >> +<< /S /GoTo /D (subsubsection.9.7.2.3) >> endobj 2044 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0004\000\040\000G\000P\000I\000O\000\137\000H\000O\000S\000T\000S\000W\000\137\000O\000W\000N) +(\376\377\0009\000.\0007\000.\0002\000.\0003\000\040\000G\000P\000I\000O\000\137\000H\000A\000R\000D\000W\000A\000R\000E\000\137\000D\000E\000F\000A\000U\000L\000T) endobj 2045 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.5) >> +<< /S /GoTo /D (subsubsection.9.7.2.4) >> endobj 2048 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0005\000\040\000G\000P\000I\000O\000\137\000I\000N\000T\000\137\000C\000O\000N\000F\000I\000G) +(\376\377\0009\000.\0007\000.\0002\000.\0004\000\040\000G\000P\000I\000O\000\137\000H\000O\000S\000T\000S\000W\000\137\000O\000W\000N) endobj 2049 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.6) >> +<< /S /GoTo /D (subsubsection.9.7.2.5) >> endobj 2052 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0006\000\040\000G\000P\000I\000O\000\137\000L\000O\000C\000K\000\137\000C\000O\000N\000F\000I\000G) +(\376\377\0009\000.\0007\000.\0002\000.\0005\000\040\000G\000P\000I\000O\000\137\000I\000N\000T\000\137\000C\000O\000N\000F\000I\000G) endobj 2053 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.7) >> +<< /S /GoTo /D (subsubsection.9.7.2.6) >> endobj 2056 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0007\000\040\000G\000P\000I\000O\000\137\000O\000T\000H\000E\000R\000\137\000C\000O\000N\000F\000I\000G) +(\376\377\0009\000.\0007\000.\0002\000.\0006\000\040\000G\000P\000I\000O\000\137\000L\000O\000C\000K\000\137\000C\000O\000N\000F\000I\000G) endobj 2057 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.8) >> +<< /S /GoTo /D (subsubsection.9.7.2.7) >> endobj 2060 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0008\000\040\000G\000P\000I\000O\000\137\000O\000U\000T\000P\000U\000T\000\137\000S\000T\000A\000T\000E) +(\376\377\0009\000.\0007\000.\0002\000.\0007\000\040\000G\000P\000I\000O\000\137\000O\000T\000H\000E\000R\000\137\000C\000O\000N\000F\000I\000G) endobj 2061 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.9) >> +<< /S /GoTo /D (subsubsection.9.7.2.8) >> endobj 2064 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0009\000\040\000G\000P\000I\000O\000\137\000P\000A\000D\000\137\000M\000O\000D\000E) +(\376\377\0009\000.\0007\000.\0002\000.\0008\000\040\000G\000P\000I\000O\000\137\000O\000U\000T\000P\000U\000T\000\137\000S\000T\000A\000T\000E) endobj 2065 0 obj -<< /S /GoTo /D (subsubsection.9.7.2.10) >> +<< /S /GoTo /D (subsubsection.9.7.2.9) >> endobj 2068 0 obj -(\376\377\0009\000.\0007\000.\0002\000.\0001\0000\000\040\000G\000P\000I\000O\000\137\000R\000E\000S\000E\000T\000\137\000C\000O\000N\000F\000I\000G) +(\376\377\0009\000.\0007\000.\0002\000.\0009\000\040\000G\000P\000I\000O\000\137\000P\000A\000D\000\137\000M\000O\000D\000E) endobj 2069 0 obj -<< /S /GoTo /D (section.9.8) >> +<< /S /GoTo /D (subsubsection.9.7.2.10) >> endobj 2072 0 obj -(\376\377\0009\000.\0008\000\040\000G\000p\000i\000o\000S\000a\000m\000p\000l\000e\000D\000e\000f\000.\000h\000\040\000F\000i\000l\000e\000\040\000R\000e\000f\000e\000r\000e\000n\000c\000e) +(\376\377\0009\000.\0007\000.\0002\000.\0001\0000\000\040\000G\000P\000I\000O\000\137\000R\000E\000S\000E\000T\000\137\000C\000O\000N\000F\000I\000G) endobj 2073 0 obj -<< /S /GoTo /D (subsection.9.8.1) >> +<< /S /GoTo /D (section.9.8) >> endobj 2076 0 obj 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(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a01f0b259ce1c7a73dcc7847dfd2e503b) >> >> endobj 4862 0 obj @@ -25900,8 +25907,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 509.556 214.675 518.327] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_afac9877a9e6b3754584b185e1bc1fa88) >> +/Rect [128.158 556.5 214.675 565.271] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a9c3583789d183f17183ecaa1db632bf1) >> >> endobj 4863 0 obj @@ -25909,8 +25916,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 468.96 222.969 479.228] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a4dceaf62d546e8cd4b32c8f8f6fd200a) >> +/Rect [128.158 517.47 214.675 526.241] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a5998d5a8131f4931f7a052c1d6ebdc0b) >> >> endobj 4864 0 obj @@ -25918,8 +25925,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 441.027 222.969 451.295] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad0013378324368c6b00003e1a27a9f4d) >> +/Rect [128.158 478.441 214.675 487.212] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a947f712b0381b4a5538c6318590da7b4) >> >> endobj 4865 0 obj @@ -25927,8 +25934,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 413.094 172.498 423.362] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_acc2322edf6975df892293c07825b47f4) >> +/Rect [128.158 439.411 214.675 448.182] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_afddc7e3abd83c3ffdd4c9ead111ab982) >> >> endobj 4866 0 obj @@ -25936,8 +25943,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 385.161 227.183 395.636] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a18ca6d344248c2cb16a22e45cc308060) >> +/Rect [128.158 400.382 214.675 409.153] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_afac9877a9e6b3754584b185e1bc1fa88) >> >> endobj 4867 0 obj @@ -25945,8 +25952,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [128.158 357.228 209.878 367.703] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ab806f79a84fa17611b7bc4ae16df370a) >> +/Rect [128.158 359.648 222.969 369.917] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a4dceaf62d546e8cd4b32c8f8f6fd200a) >> >> endobj 4868 0 obj @@ -25954,8 +25961,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 330.999 201.163 339.77] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad0690ae12a2cdace2701a43a4997eea6) >> +/Rect [128.158 331.578 222.969 341.846] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad0013378324368c6b00003e1a27a9f4d) >> >> endobj 4869 0 obj @@ -25963,8 +25970,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 303.066 196.904 311.837] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a45b0a31da82b0350820969d788963915) >> +/Rect [128.158 303.507 172.498 313.775] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_acc2322edf6975df892293c07825b47f4) >> >> endobj 4870 0 obj @@ -25972,8 +25979,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 275.133 209.376 283.904] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ab64860385df7a7448d10ab358c818167) >> +/Rect [128.158 275.436 227.183 285.911] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a18ca6d344248c2cb16a22e45cc308060) >> >> endobj 4871 0 obj @@ -25981,8 +25988,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 245.389 204.883 255.971] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a4b66db067eb42e074b308be14afda76a) >> +/Rect [128.158 247.366 209.878 257.84] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ab806f79a84fa17611b7bc4ae16df370a) >> >> endobj 4872 0 obj @@ -25990,8 +25997,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 219.267 233.064 228.038] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a6c75fc6bffac31f92ad9347876c25e14) >> +/Rect [123.173 220.998 201.163 229.769] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad0690ae12a2cdace2701a43a4997eea6) >> >> endobj 4873 0 obj @@ -25999,8 +26006,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 178.671 233.8 189.146] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a306d787223ded9a7896d1f6237a90f05) >> +/Rect [123.173 192.928 196.904 201.699] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a45b0a31da82b0350820969d788963915) >> >> endobj 4874 0 obj @@ -26008,8 +26015,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 150.631 215.437 161.213] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_aa7a0f2c995ec78372024b783a40aa450) >> +/Rect [123.173 164.857 209.376 173.628] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ab64860385df7a7448d10ab358c818167) >> >> endobj 4875 0 obj @@ -26017,8 +26024,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 122.698 204.453 133.28] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a7a0bf83045635201a5b92f56b3ec6c53) >> +/Rect [123.173 134.975 204.883 145.557] +/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a4b66db067eb42e074b308be14afda76a) >> >> endobj 4876 0 obj @@ -26026,67 +26033,8 @@ endobj /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [123.173 94.765 232.84 105.347] -/A << /S /GoTo /D (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a1e98af19fc02a9cadd1cede37ab9c036) >> ->> -endobj -4882 0 obj -<< -/D [4880 0 R /XYZ 69.866 801.979 null] ->> -endobj -4883 0 obj -<< -/D [4880 0 R /XYZ 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M9Ab@ZL&h;9>>4(%gǫMqi-׊qʹ-$ɪ{Y yC>VXot~}?4%5^ΐ)]#_ ?XڲODlIMӁBt1t:ܜ(C)0ޏt,C:œ.s:0†BNRtlWHsg ^4:c&>|H$$|G8IQiM$xO@Kјehǐ?~.񯿮(N :B ]{nXfٚ>>t,\]PW}3TNl7myb]}Չ SgVV]צ*gdd}M7Uy*뫊UN}-:܊A)рځdjWމA#5Օձ&\SŽM;&ɮtնdzp7,Ou^Jm qua}Zxɜx-JlJ :TH*aհ:>M}:VA'j>Y ݭB> endobj -5046 0 obj +5033 0 obj << /Type /Annot /Subtype /Link /Border[0 0 0]/H/I/C[1 0 0] -/Rect [94.777 745.904 166.517 756.486] -/A << /S /GoTo /D (struct_f_s_p___m___c_o_n_f_i_g) >> ->> -endobj -5047 0 obj -<< -/Type /Annot -/Subtype /Link -/Border[0 0 0]/H/I/C[1 0 0] -/Rect [167.017 745.904 217.338 756.486] -/A << /S /GoTo /D (struct_f_s_p_m___u_p_d_ac8e22d7fa209f037c7257e9fe2f8ddf5) >> ->> -endobj -5048 0 obj -<< -/Type /Annot -/Subtype /Link -/Border[0 0 0]/H/I/C[1 0 0] -/Rect [94.777 719.58 194.42 730.162] -/A << /S /GoTo /D (struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g) >> +/Rect [180.969 735.339 243.752 745.813] +/A << /S /GoTo /D (struct_f_s_p_m___u_p_d_a74c247ddff97be41e56b7cc5acc7118a) >> >> endobj 5049 0 obj @@ -28254,8 +28248,8 @@ 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obj << /Title 2092 0 R /A 2089 0 R -/Parent 2087 0 R +/Parent 1963 0 R +/Prev 2083 0 R +/Next 2099 0 R +/First 2095 0 R +/Last 2095 0 R +/Count -1 >> endobj 2087 0 obj << /Title 2088 0 R /A 2085 0 R -/Parent 1959 0 R -/Prev 2079 0 R -/Next 2095 0 R -/First 2091 0 R -/Last 2091 0 R -/Count -1 +/Parent 2083 0 R >> endobj 2083 0 obj << /Title 2084 0 R /A 2081 0 R -/Parent 2079 0 R +/Parent 1963 0 R +/Prev 2075 0 R +/Next 2091 0 R +/First 2087 0 R +/Last 2087 0 R +/Count -1 >> endobj 2079 0 obj << /Title 2080 0 R /A 2077 0 R -/Parent 1959 0 R -/Prev 2071 0 R -/Next 2087 0 R -/First 2083 0 R -/Last 2083 0 R -/Count -1 +/Parent 2075 0 R >> endobj 2075 0 obj << /Title 2076 0 R /A 2073 0 R -/Parent 2071 0 R +/Parent 1963 0 R +/Prev 2023 0 R +/Next 2083 0 R +/First 2079 0 R +/Last 2079 0 R +/Count -1 >> endobj 2071 0 obj << /Title 2072 0 R /A 2069 0 R -/Parent 1959 0 R -/Prev 2019 0 R -/Next 2079 0 R -/First 2075 0 R -/Last 2075 0 R -/Count -1 +/Parent 2031 0 R +/Prev 2067 0 R >> endobj 2067 0 obj << /Title 2068 0 R /A 2065 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2063 0 R +/Next 2071 0 R >> endobj 2063 0 obj << /Title 2064 0 R /A 2061 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2059 0 R /Next 2067 0 R >> @@ -44590,7 +44760,7 @@ endobj << /Title 2060 0 R /A 2057 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2055 0 R /Next 2063 0 R >> @@ -44599,7 +44769,7 @@ endobj << /Title 2056 0 R /A 2053 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2051 0 R /Next 2059 0 R >> @@ -44608,7 +44778,7 @@ endobj << /Title 2052 0 R /A 2049 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2047 0 R /Next 2055 0 R >> @@ -44617,7 +44787,7 @@ endobj << /Title 2048 0 R /A 2045 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2043 0 R /Next 2051 0 R >> @@ -44626,7 +44796,7 @@ endobj << /Title 2044 0 R /A 2041 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2039 0 R /Next 2047 0 R >> @@ -44635,7 +44805,7 @@ endobj << /Title 2040 0 R /A 2037 0 R -/Parent 2027 0 R +/Parent 2031 0 R /Prev 2035 0 R /Next 2043 0 R >> @@ -44644,8 +44814,7 @@ endobj << /Title 2036 0 R /A 2033 0 R -/Parent 2027 0 R -/Prev 2031 0 R +/Parent 2031 0 R /Next 2039 0 R >> endobj @@ -44653,153 +44822,152 @@ endobj << /Title 2032 0 R /A 2029 0 R -/Parent 2027 0 R -/Next 2035 0 R +/Parent 2023 0 R +/Prev 2027 0 R +/First 2035 0 R +/Last 2071 0 R +/Count -10 >> endobj 2027 0 obj << /Title 2028 0 R /A 2025 0 R -/Parent 2019 0 R -/Prev 2023 0 R -/First 2031 0 R -/Last 2067 0 R -/Count -10 +/Parent 2023 0 R +/Next 2031 0 R >> endobj 2023 0 obj << /Title 2024 0 R /A 2021 0 R -/Parent 2019 0 R -/Next 2027 0 R +/Parent 1963 0 R +/Prev 2015 0 R +/Next 2075 0 R +/First 2027 0 R +/Last 2031 0 R +/Count -2 >> endobj 2019 0 obj << /Title 2020 0 R /A 2017 0 R -/Parent 1959 0 R -/Prev 2011 0 R -/Next 2071 0 R -/First 2023 0 R -/Last 2027 0 R -/Count -2 +/Parent 2015 0 R >> endobj 2015 0 obj << /Title 2016 0 R /A 2013 0 R -/Parent 2011 0 R +/Parent 1963 0 R +/Prev 2007 0 R +/Next 2023 0 R +/First 2019 0 R +/Last 2019 0 R +/Count -1 >> endobj 2011 0 obj << /Title 2012 0 R /A 2009 0 R -/Parent 1959 0 R -/Prev 2003 0 R -/Next 2019 0 R -/First 2015 0 R -/Last 2015 0 R -/Count -1 +/Parent 2007 0 R >> endobj 2007 0 obj << /Title 2008 0 R /A 2005 0 R -/Parent 2003 0 R +/Parent 1963 0 R +/Prev 1991 0 R +/Next 2015 0 R +/First 2011 0 R +/Last 2011 0 R +/Count -1 >> endobj 2003 0 obj << /Title 2004 0 R /A 2001 0 R -/Parent 1959 0 R -/Prev 1987 0 R -/Next 2011 0 R -/First 2007 0 R -/Last 2007 0 R -/Count -1 +/Parent 1999 0 R >> endobj 1999 0 obj << /Title 2000 0 R /A 1997 0 R -/Parent 1995 0 R +/Parent 1991 0 R +/Prev 1995 0 R +/First 2003 0 R +/Last 2003 0 R +/Count -1 >> endobj 1995 0 obj << /Title 1996 0 R /A 1993 0 R -/Parent 1987 0 R -/Prev 1991 0 R -/First 1999 0 R -/Last 1999 0 R -/Count -1 +/Parent 1991 0 R +/Next 1999 0 R >> endobj 1991 0 obj << /Title 1992 0 R /A 1989 0 R -/Parent 1987 0 R -/Next 1995 0 R +/Parent 1963 0 R +/Prev 1983 0 R +/Next 2007 0 R +/First 1995 0 R +/Last 1999 0 R +/Count -2 >> endobj 1987 0 obj << /Title 1988 0 R /A 1985 0 R -/Parent 1959 0 R -/Prev 1979 0 R -/Next 2003 0 R -/First 1991 0 R -/Last 1995 0 R -/Count -2 +/Parent 1983 0 R >> endobj 1983 0 obj << /Title 1984 0 R /A 1981 0 R -/Parent 1979 0 R +/Parent 1963 0 R +/Prev 1975 0 R +/Next 1991 0 R +/First 1987 0 R +/Last 1987 0 R +/Count -1 >> endobj 1979 0 obj << /Title 1980 0 R /A 1977 0 R -/Parent 1959 0 R -/Prev 1971 0 R -/Next 1987 0 R -/First 1983 0 R -/Last 1983 0 R -/Count -1 +/Parent 1975 0 R >> endobj 1975 0 obj << /Title 1976 0 R /A 1973 0 R -/Parent 1971 0 R +/Parent 1963 0 R +/Prev 1967 0 R +/Next 1983 0 R +/First 1979 0 R +/Last 1979 0 R +/Count -1 >> endobj 1971 0 obj << /Title 1972 0 R /A 1969 0 R -/Parent 1959 0 R -/Prev 1963 0 R -/Next 1979 0 R -/First 1975 0 R -/Last 1975 0 R -/Count -1 +/Parent 1967 0 R >> endobj 1967 0 obj @@ -44807,138 +44975,140 @@ endobj /Title 1968 0 R /A 1965 0 R /Parent 1963 0 R +/Next 1975 0 R +/First 1971 0 R +/Last 1971 0 R +/Count -1 >> endobj 1963 0 obj << /Title 1964 0 R /A 1961 0 R -/Parent 1959 0 R -/Next 1971 0 R +/Parent 6719 0 R +/Prev 39 0 R +/Next 2107 0 R /First 1967 0 R -/Last 1967 0 R -/Count -1 +/Last 2099 0 R +/Count -11 >> endobj 1959 0 obj << /Title 1960 0 R /A 1957 0 R -/Parent 6710 0 R -/Prev 39 0 R -/Next 2103 0 R -/First 1963 0 R -/Last 2095 0 R -/Count -11 +/Parent 1955 0 R >> endobj 1955 0 obj << /Title 1956 0 R /A 1953 0 R -/Parent 1951 0 R +/Parent 39 0 R +/Prev 1947 0 R +/First 1959 0 R +/Last 1959 0 R +/Count -1 >> endobj 1951 0 obj << /Title 1952 0 R /A 1949 0 R -/Parent 39 0 R -/Prev 1943 0 R -/First 1955 0 R -/Last 1955 0 R -/Count -1 +/Parent 1947 0 R >> endobj 1947 0 obj << /Title 1948 0 R /A 1945 0 R -/Parent 1943 0 R +/Parent 39 0 R +/Prev 1939 0 R +/Next 1955 0 R +/First 1951 0 R +/Last 1951 0 R +/Count -1 >> endobj 1943 0 obj << /Title 1944 0 R /A 1941 0 R -/Parent 39 0 R -/Prev 1935 0 R -/Next 1951 0 R -/First 1947 0 R -/Last 1947 0 R -/Count -1 +/Parent 1939 0 R >> endobj 1939 0 obj << /Title 1940 0 R /A 1937 0 R -/Parent 1935 0 R +/Parent 39 0 R +/Prev 1931 0 R +/Next 1947 0 R +/First 1943 0 R +/Last 1943 0 R +/Count -1 >> endobj 1935 0 obj << /Title 1936 0 R /A 1933 0 R -/Parent 39 0 R -/Prev 1927 0 R -/Next 1943 0 R -/First 1939 0 R -/Last 1939 0 R -/Count -1 +/Parent 1931 0 R >> endobj 1931 0 obj << /Title 1932 0 R /A 1929 0 R -/Parent 1927 0 R +/Parent 39 0 R +/Prev 1923 0 R +/Next 1939 0 R +/First 1935 0 R +/Last 1935 0 R +/Count -1 >> endobj 1927 0 obj << /Title 1928 0 R /A 1925 0 R -/Parent 39 0 R -/Prev 1919 0 R -/Next 1935 0 R -/First 1931 0 R -/Last 1931 0 R -/Count -1 +/Parent 1923 0 R >> endobj 1923 0 obj << /Title 1924 0 R /A 1921 0 R -/Parent 1919 0 R +/Parent 39 0 R +/Prev 1879 0 R +/Next 1931 0 R +/First 1927 0 R +/Last 1927 0 R +/Count -1 >> endobj 1919 0 obj << /Title 1920 0 R /A 1917 0 R -/Parent 39 0 R -/Prev 1875 0 R -/Next 1927 0 R -/First 1923 0 R -/Last 1923 0 R -/Count -1 +/Parent 1887 0 R +/Prev 1915 0 R >> endobj 1915 0 obj << /Title 1916 0 R /A 1913 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1911 0 R +/Next 1919 0 R >> endobj 1911 0 obj << /Title 1912 0 R /A 1909 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1907 0 R /Next 1915 0 R >> @@ -44947,7 +45117,7 @@ endobj << /Title 1908 0 R /A 1905 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1903 0 R /Next 1911 0 R >> @@ -44956,7 +45126,7 @@ endobj << /Title 1904 0 R /A 1901 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1899 0 R /Next 1907 0 R >> @@ -44965,7 +45135,7 @@ endobj << /Title 1900 0 R /A 1897 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1895 0 R /Next 1903 0 R >> @@ -44974,7 +45144,7 @@ endobj << /Title 1896 0 R /A 1893 0 R -/Parent 1883 0 R +/Parent 1887 0 R /Prev 1891 0 R /Next 1899 0 R >> @@ -44983,8 +45153,7 @@ endobj << /Title 1892 0 R /A 1889 0 R -/Parent 1883 0 R -/Prev 1887 0 R +/Parent 1887 0 R /Next 1895 0 R >> endobj @@ -44992,177 +45161,178 @@ endobj << /Title 1888 0 R /A 1885 0 R -/Parent 1883 0 R -/Next 1891 0 R +/Parent 1879 0 R +/Prev 1883 0 R +/First 1891 0 R +/Last 1919 0 R +/Count -8 >> endobj 1883 0 obj << /Title 1884 0 R /A 1881 0 R -/Parent 1875 0 R -/Prev 1879 0 R -/First 1887 0 R -/Last 1915 0 R -/Count -8 +/Parent 1879 0 R +/Next 1887 0 R >> endobj 1879 0 obj << /Title 1880 0 R /A 1877 0 R -/Parent 1875 0 R -/Next 1883 0 R +/Parent 39 0 R +/Prev 1871 0 R +/Next 1923 0 R +/First 1883 0 R +/Last 1887 0 R +/Count -2 >> endobj 1875 0 obj << /Title 1876 0 R /A 1873 0 R -/Parent 39 0 R -/Prev 1867 0 R -/Next 1919 0 R -/First 1879 0 R -/Last 1883 0 R -/Count -2 +/Parent 1871 0 R >> endobj 1871 0 obj << /Title 1872 0 R /A 1869 0 R -/Parent 1867 0 R +/Parent 39 0 R +/Prev 1863 0 R +/Next 1879 0 R +/First 1875 0 R +/Last 1875 0 R +/Count -1 >> endobj 1867 0 obj << /Title 1868 0 R /A 1865 0 R -/Parent 39 0 R -/Prev 1859 0 R -/Next 1875 0 R -/First 1871 0 R -/Last 1871 0 R -/Count -1 +/Parent 1863 0 R >> endobj 1863 0 obj << /Title 1864 0 R /A 1861 0 R -/Parent 1859 0 R +/Parent 39 0 R +/Prev 1855 0 R +/Next 1871 0 R +/First 1867 0 R +/Last 1867 0 R +/Count -1 >> endobj 1859 0 obj << /Title 1860 0 R /A 1857 0 R -/Parent 39 0 R -/Prev 1851 0 R -/Next 1867 0 R -/First 1863 0 R -/Last 1863 0 R -/Count -1 +/Parent 1855 0 R >> endobj 1855 0 obj << /Title 1856 0 R /A 1853 0 R -/Parent 1851 0 R +/Parent 39 0 R +/Prev 1847 0 R +/Next 1863 0 R +/First 1859 0 R +/Last 1859 0 R +/Count -1 >> endobj 1851 0 obj << /Title 1852 0 R /A 1849 0 R -/Parent 39 0 R -/Prev 1843 0 R -/Next 1859 0 R -/First 1855 0 R -/Last 1855 0 R -/Count -1 +/Parent 1847 0 R >> endobj 1847 0 obj << /Title 1848 0 R /A 1845 0 R -/Parent 1843 0 R +/Parent 39 0 R +/Prev 1827 0 R +/Next 1855 0 R +/First 1851 0 R +/Last 1851 0 R +/Count -1 >> endobj 1843 0 obj << /Title 1844 0 R /A 1841 0 R -/Parent 39 0 R -/Prev 1823 0 R -/Next 1851 0 R -/First 1847 0 R -/Last 1847 0 R -/Count -1 +/Parent 1835 0 R +/Prev 1839 0 R >> endobj 1839 0 obj << /Title 1840 0 R /A 1837 0 R -/Parent 1831 0 R -/Prev 1835 0 R +/Parent 1835 0 R +/Next 1843 0 R >> endobj 1835 0 obj << /Title 1836 0 R /A 1833 0 R -/Parent 1831 0 R -/Next 1839 0 R +/Parent 1827 0 R +/Prev 1831 0 R +/First 1839 0 R +/Last 1843 0 R +/Count -2 >> endobj 1831 0 obj << /Title 1832 0 R /A 1829 0 R -/Parent 1823 0 R -/Prev 1827 0 R -/First 1835 0 R -/Last 1839 0 R -/Count -2 +/Parent 1827 0 R +/Next 1835 0 R >> endobj 1827 0 obj << /Title 1828 0 R /A 1825 0 R -/Parent 1823 0 R -/Next 1831 0 R +/Parent 39 0 R +/Prev 1471 0 R +/Next 1847 0 R +/First 1831 0 R +/Last 1835 0 R +/Count -2 >> endobj 1823 0 obj << /Title 1824 0 R /A 1821 0 R -/Parent 39 0 R -/Prev 1467 0 R -/Next 1843 0 R -/First 1827 0 R -/Last 1831 0 R -/Count -2 +/Parent 1479 0 R +/Prev 1819 0 R >> endobj 1819 0 obj << /Title 1820 0 R /A 1817 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1815 0 R +/Next 1823 0 R >> endobj 1815 0 obj << /Title 1816 0 R /A 1813 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1811 0 R /Next 1819 0 R >> @@ -45171,7 +45341,7 @@ endobj << /Title 1812 0 R /A 1809 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1807 0 R /Next 1815 0 R >> @@ -45180,7 +45350,7 @@ endobj << /Title 1808 0 R /A 1805 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1803 0 R /Next 1811 0 R >> @@ -45189,7 +45359,7 @@ endobj << /Title 1804 0 R /A 1801 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1799 0 R /Next 1807 0 R >> @@ -45198,7 +45368,7 @@ endobj << /Title 1800 0 R /A 1797 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1795 0 R /Next 1803 0 R >> @@ -45207,7 +45377,7 @@ endobj << /Title 1796 0 R /A 1793 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1791 0 R /Next 1799 0 R >> @@ -45216,7 +45386,7 @@ endobj << /Title 1792 0 R /A 1789 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1787 0 R /Next 1795 0 R >> @@ -45225,7 +45395,7 @@ endobj << /Title 1788 0 R /A 1785 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1783 0 R /Next 1791 0 R >> @@ -45234,7 +45404,7 @@ endobj << /Title 1784 0 R /A 1781 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1779 0 R /Next 1787 0 R >> @@ -45243,7 +45413,7 @@ endobj << /Title 1780 0 R /A 1777 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1775 0 R /Next 1783 0 R >> @@ -45252,7 +45422,7 @@ endobj << /Title 1776 0 R /A 1773 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1771 0 R /Next 1779 0 R >> @@ -45261,7 +45431,7 @@ endobj << /Title 1772 0 R /A 1769 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1767 0 R /Next 1775 0 R >> @@ -45270,7 +45440,7 @@ endobj << /Title 1768 0 R /A 1765 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1763 0 R /Next 1771 0 R >> @@ -45279,7 +45449,7 @@ endobj << /Title 1764 0 R /A 1761 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1759 0 R /Next 1767 0 R >> @@ -45288,7 +45458,7 @@ endobj << /Title 1760 0 R /A 1757 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1755 0 R /Next 1763 0 R >> @@ -45297,7 +45467,7 @@ endobj << /Title 1756 0 R /A 1753 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1751 0 R /Next 1759 0 R >> @@ -45306,7 +45476,7 @@ endobj << /Title 1752 0 R /A 1749 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1747 0 R /Next 1755 0 R >> @@ -45315,7 +45485,7 @@ endobj << /Title 1748 0 R /A 1745 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1743 0 R /Next 1751 0 R >> @@ -45324,7 +45494,7 @@ endobj << /Title 1744 0 R /A 1741 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1739 0 R /Next 1747 0 R >> @@ -45333,7 +45503,7 @@ endobj << /Title 1740 0 R /A 1737 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1735 0 R /Next 1743 0 R >> @@ -45342,7 +45512,7 @@ endobj << /Title 1736 0 R /A 1733 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1731 0 R /Next 1739 0 R >> @@ -45351,7 +45521,7 @@ endobj << /Title 1732 0 R /A 1729 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1727 0 R /Next 1735 0 R >> @@ -45360,7 +45530,7 @@ endobj << /Title 1728 0 R /A 1725 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1723 0 R /Next 1731 0 R >> @@ -45369,7 +45539,7 @@ endobj << /Title 1724 0 R /A 1721 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1719 0 R /Next 1727 0 R >> @@ -45378,7 +45548,7 @@ endobj << /Title 1720 0 R /A 1717 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1715 0 R /Next 1723 0 R >> @@ -45387,7 +45557,7 @@ endobj << /Title 1716 0 R /A 1713 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1711 0 R /Next 1719 0 R >> @@ -45396,7 +45566,7 @@ endobj << /Title 1712 0 R /A 1709 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1707 0 R /Next 1715 0 R >> @@ -45405,7 +45575,7 @@ endobj << /Title 1708 0 R /A 1705 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1703 0 R /Next 1711 0 R >> @@ -45414,7 +45584,7 @@ endobj << /Title 1704 0 R /A 1701 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1699 0 R /Next 1707 0 R >> @@ -45423,7 +45593,7 @@ endobj << /Title 1700 0 R /A 1697 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1695 0 R /Next 1703 0 R >> @@ -45432,7 +45602,7 @@ endobj << /Title 1696 0 R /A 1693 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1691 0 R /Next 1699 0 R >> @@ -45441,7 +45611,7 @@ endobj << /Title 1692 0 R /A 1689 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1687 0 R /Next 1695 0 R >> @@ -45450,7 +45620,7 @@ endobj << /Title 1688 0 R /A 1685 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1683 0 R /Next 1691 0 R >> @@ -45459,7 +45629,7 @@ endobj << /Title 1684 0 R /A 1681 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1679 0 R /Next 1687 0 R >> @@ -45468,7 +45638,7 @@ endobj << /Title 1680 0 R /A 1677 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1675 0 R /Next 1683 0 R >> @@ -45477,7 +45647,7 @@ endobj << /Title 1676 0 R /A 1673 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1671 0 R /Next 1679 0 R >> @@ -45486,7 +45656,7 @@ endobj << /Title 1672 0 R /A 1669 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1667 0 R /Next 1675 0 R >> @@ -45495,7 +45665,7 @@ endobj << /Title 1668 0 R /A 1665 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1663 0 R /Next 1671 0 R >> @@ -45504,7 +45674,7 @@ endobj << /Title 1664 0 R /A 1661 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1659 0 R /Next 1667 0 R >> @@ -45513,7 +45683,7 @@ endobj << /Title 1660 0 R /A 1657 0 R -/Parent 1475 0 R +/Parent 1479 0 R /Prev 1655 0 R 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(_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129) 5432 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129a01e9f04c3e45464931e1234c97e587f9) 5480 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129a4fc2bb2cd69fd704820528fed0e82d43) 5479 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129aedbb5f40bb41bbd3f1575be782329caa) 5481 0 R] -/Limits [(_gpio_config_8h_a6fd7c32dbe0a51c663b7dbb7802f1387) (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129aedbb5f40bb41bbd3f1575be782329caa)] +/Names [(_fsps_upd_8h_a98e8701e3dc693bef24a75a68ae6b0f4) 5337 0 R (_fsps_upd_8h_a98e8701e3dc693bef24a75a68ae6b0f4a72ed2f6fa5d26f868a796ad49a0bb252) 5338 0 R (_fsps_upd_8h_abd1742bbcd45929f915b48c95fc64054) 5335 0 R (_fspt_upd_8h) 2741 0 R (_gpio_config_8h) 2963 0 R (_gpio_config_8h_a018eb245b4edc10630018418f5e72194) 5428 0 R] +/Limits [(_fsps_upd_8h_a98e8701e3dc693bef24a75a68ae6b0f4) (_gpio_config_8h_a018eb245b4edc10630018418f5e72194)] >> endobj 6722 0 obj << -/Names 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(_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba67fb17e498da8b3270ea09d7abafb4a5) 5499 0 R (_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba7b6b5ea50ad4c123f69d1df9851abbd9) 5501 0 R] +/Limits [(_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01b) (_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba7b6b5ea50ad4c123f69d1df9851abbd9)] >> endobj 6723 0 obj << -/Names [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba470c9c10fa83ddec05936306a0e4b98f) 5469 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba4dfc9da375dc5fbd305952e5d8831be0) 5477 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba73cd9584910e438125531e23ea95456f) 5476 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba8c34915bff11fe51a8cf1a8bf89093c1) 5471 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba8e214ca7693741572c6b39fea5f47223) 5470 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bac3e881c1dc5eb301de1e45a12c6f2f31) 5478 0 R] -/Limits [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba470c9c10fa83ddec05936306a0e4b98f) (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bac3e881c1dc5eb301de1e45a12c6f2f31)] +/Names [(_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba7c2c49f7bcdcab98d01a557fd5729fab) 5506 0 R (_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba82c4d8296e2bb95e529f7f17515a8fa8) 5504 0 R (_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba90c93fbb087de04680dcc3a99df7dc2c) 5500 0 R (_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01bae3170b686b3a2f32b40afc8bf110557c) 5503 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854ef) 5434 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efa05af680bcf802ccf23c017d3eb581638) 5447 0 R] +/Limits [(_gpio_config_8h_a14273df3e058fcdd00d24e51247ae01ba7c2c49f7bcdcab98d01a557fd5729fab) (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efa05af680bcf802ccf23c017d3eb581638)] >> endobj 6724 0 obj << -/Names [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bacd2353894ebe6659c922be8f1e4b88d2) 5474 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bafd81acab1db3f880cd9a59b46818c2aa) 5472 0 R (_gpio_config_8h_adf65dbc175c8753d492af162ad39c86e) 5418 0 R (_gpio_sample_def_8h) 2739 0 R (_mem_info_hob_8h) 2811 0 R (_mem_info_hob_8h_a49749aecd31ee60754a825eb1ada39dc) 3055 0 R] -/Limits [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bacd2353894ebe6659c922be8f1e4b88d2) (_mem_info_hob_8h_a49749aecd31ee60754a825eb1ada39dc)] +/Names [(_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efa341ba84617fc479c1c1cd7da9a6711dd) 5448 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efa786eef635945971009c00369fbe1de92) 5451 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efab9dc5cf82e5700f7fdad8b5f1b33f1bd) 5450 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efae5751af61ed5b248c8ae0a92ff4f06a1) 5449 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efaec1235ce73c04ada92533578b3cd556d) 5446 0 R (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efaf48a0bd91cfdce20864d4f1da7a9007a) 5445 0 R] +/Limits [(_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efa341ba84617fc479c1c1cd7da9a6711dd) (_gpio_config_8h_a159d97308dfb94e14e936a93b1b854efaf48a0bd91cfdce20864d4f1da7a9007a)] >> endobj 6725 0 obj << -/Names [(_mem_info_hob_8h_a7f4e2ef4847bf2ee31bfd5f7f7aa5ca1) 5527 0 R (_smbios_cache_info_hob_8h) 2812 0 R (_smbios_processor_info_hob_8h) 2813 0 R (chapter*.1) 2151 0 R (chapter.1) 2 0 R (chapter.2) 6 0 R] -/Limits [(_mem_info_hob_8h_a7f4e2ef4847bf2ee31bfd5f7f7aa5ca1) (chapter.2)] +/Names [(_gpio_config_8h_a26cb077935a526dd104d2a6feee79a89) 5431 0 R (_gpio_config_8h_a26cb077935a526dd104d2a6feee79a89ab61802b9e0e901108bfa967233fd9fe5) 5468 0 R (_gpio_config_8h_a2c283c8801762254171c31b97eb98902) 5423 0 R (_gpio_config_8h_a2c7b972de3238c247372dad443c9733a) 5433 0 R (_gpio_config_8h_a2c7b972de3238c247372dad443c9733aa2a12d2de2340256790fb5b7c5f57c9f6) 5471 0 R (_gpio_config_8h_a2c7b972de3238c247372dad443c9733aa6a5d11c5c300e751f0342064bb8e0c52) 5470 0 R] +/Limits [(_gpio_config_8h_a26cb077935a526dd104d2a6feee79a89) (_gpio_config_8h_a2c7b972de3238c247372dad443c9733aa6a5d11c5c300e751f0342064bb8e0c52)] >> endobj 6726 0 obj << +/Names [(_gpio_config_8h_a2c7b972de3238c247372dad443c9733aadca9d1f54792097045120761bf03ab08) 5469 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2) 5438 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a04fb2cfde5d321e561cae964287f1e9b) 5462 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a2b2ad337f9f6dc7dd72117b28cc1ce30) 5453 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a3caca3987e32d25c32989a0eff2b4ef2) 5467 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a4fe374872c31b73d55446e16ef0f4bd2) 5463 0 R] +/Limits [(_gpio_config_8h_a2c7b972de3238c247372dad443c9733aadca9d1f54792097045120761bf03ab08) (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a4fe374872c31b73d55446e16ef0f4bd2)] +>> +endobj +6727 0 obj +<< +/Names [(_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a9a49fbb16ae582abfc95a0a6ff324d39) 5452 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2aa7e737fca115069f941b40ddc983e2d3) 5460 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2acbf313bf77f7a3119b62e3f4b51a2063) 5461 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ad7e15efcb977fef2cdc457a1a7ee356f) 5458 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ad9b5abd9c1d06484951043be8d7785e3) 5465 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ae1b2531e4275da58d2950e0b1cc81cc1) 5464 0 R] +/Limits [(_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2a9a49fbb16ae582abfc95a0a6ff324d39) (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ae1b2531e4275da58d2950e0b1cc81cc1)] +>> +endobj +6728 0 obj +<< +/Names [(_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ae4e02f02d3f7852faf1a9e3c82a09488) 5466 0 R (_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2af480d210511bd7a3b6dc563d6eeddb10) 5459 0 R (_gpio_config_8h_a351821d0875676cd22d303a8d0b883d6) 5440 0 R (_gpio_config_8h_a351821d0875676cd22d303a8d0b883d6a386e2c7a47401c8d38b00dde4b59223b) 5489 0 R (_gpio_config_8h_a351821d0875676cd22d303a8d0b883d6a435f098a41c7a75670fd6dfc0a5626d5) 5491 0 R (_gpio_config_8h_a351821d0875676cd22d303a8d0b883d6a5bc7c9f5f7b7a03aee5069581457ed6b) 5490 0 R] +/Limits [(_gpio_config_8h_a30ce660d3b648428df18eb02fec29ff2ae4e02f02d3f7852faf1a9e3c82a09488) (_gpio_config_8h_a351821d0875676cd22d303a8d0b883d6a5bc7c9f5f7b7a03aee5069581457ed6b)] +>> +endobj +6729 0 obj +<< +/Names [(_gpio_config_8h_a52292ef8b3eb88ef01fb725a294659d1) 5427 0 R (_gpio_config_8h_a6463e6b91239765033ea9e340a22a579) 5424 0 R (_gpio_config_8h_a6c59d1eaee5d48355da7adf265a416ce) 5435 0 R (_gpio_config_8h_a6c59d1eaee5d48355da7adf265a416cea37186bec1d3ae1511f4acc1a08ba734c) 5498 0 R (_gpio_config_8h_a6c59d1eaee5d48355da7adf265a416cea6af04d610e0dd95d35122e70f1e99cf3) 5496 0 R (_gpio_config_8h_a6c59d1eaee5d48355da7adf265a416cead10f69db37ab8e81453e4e25767452a9) 5497 0 R] +/Limits [(_gpio_config_8h_a52292ef8b3eb88ef01fb725a294659d1) (_gpio_config_8h_a6c59d1eaee5d48355da7adf265a416cead10f69db37ab8e81453e4e25767452a9)] +>> +endobj +6730 0 obj +<< +/Names [(_gpio_config_8h_a6fd7c32dbe0a51c663b7dbb7802f1387) 5432 0 R (_gpio_config_8h_a7073fab3c6e98bd0d077c8efc9c61f71) 5420 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129) 5439 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129a01e9f04c3e45464931e1234c97e587f9) 5487 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129a4fc2bb2cd69fd704820528fed0e82d43) 5486 0 R (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129aedbb5f40bb41bbd3f1575be782329caa) 5488 0 R] +/Limits [(_gpio_config_8h_a6fd7c32dbe0a51c663b7dbb7802f1387) (_gpio_config_8h_a7e791cfbd6138bc03e5c1bb4e37b3129aedbb5f40bb41bbd3f1575be782329caa)] +>> +endobj +6731 0 obj +<< +/Names [(_gpio_config_8h_a8b2cf12c67e0e296c94ae0bfb49abcf8) 5422 0 R (_gpio_config_8h_a9ebc9e8da3eeee9403ff7dd5ac2dfb12) 5419 0 R (_gpio_config_8h_abdb36c6d4dfaa93224b78aaa660af648) 5421 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718b) 5436 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba17754e45a6272181bd893319cd1d4a89) 5480 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba1b35b1a6099f1b50678b383945ebfdb8) 5482 0 R] +/Limits [(_gpio_config_8h_a8b2cf12c67e0e296c94ae0bfb49abcf8) (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba1b35b1a6099f1b50678b383945ebfdb8)] +>> +endobj +6732 0 obj +<< +/Names [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba470c9c10fa83ddec05936306a0e4b98f) 5476 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba4dfc9da375dc5fbd305952e5d8831be0) 5484 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba73cd9584910e438125531e23ea95456f) 5483 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba8c34915bff11fe51a8cf1a8bf89093c1) 5478 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba8e214ca7693741572c6b39fea5f47223) 5477 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bac3e881c1dc5eb301de1e45a12c6f2f31) 5485 0 R] +/Limits [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba470c9c10fa83ddec05936306a0e4b98f) (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bac3e881c1dc5eb301de1e45a12c6f2f31)] +>> +endobj +6733 0 obj +<< +/Names [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bacd2353894ebe6659c922be8f1e4b88d2) 5481 0 R (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bafd81acab1db3f880cd9a59b46818c2aa) 5479 0 R (_gpio_config_8h_adf65dbc175c8753d492af162ad39c86e) 5425 0 R (_gpio_sample_def_8h) 2744 0 R (_mem_info_hob_8h) 2816 0 R (_mem_info_hob_8h_a49749aecd31ee60754a825eb1ada39dc) 3060 0 R] +/Limits [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718bacd2353894ebe6659c922be8f1e4b88d2) (_mem_info_hob_8h_a49749aecd31ee60754a825eb1ada39dc)] +>> +endobj +6734 0 obj +<< +/Names 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4929 0 R] -/Limits [(page.104) (page.109)] ->> -endobj -6730 0 obj -<< -/Names [(page.11) 2805 0 R (page.110) 4956 0 R (page.111) 4962 0 R (page.112) 4967 0 R (page.113) 4971 0 R (page.114) 4975 0 R] -/Limits [(page.11) (page.114)] ->> -endobj -6731 0 obj -<< -/Names [(page.115) 4979 0 R (page.116) 4983 0 R (page.117) 4987 0 R (page.118) 4992 0 R (page.119) 4996 0 R (page.12) 2822 0 R] -/Limits [(page.115) (page.12)] ->> -endobj -6732 0 obj -<< -/Names [(page.120) 5000 0 R (page.121) 5004 0 R (page.122) 5016 0 R (page.123) 5032 0 R (page.124) 5064 0 R (page.125) 5095 0 R] -/Limits [(page.120) (page.125)] ->> -endobj -6733 0 obj -<< -/Names [(page.126) 5116 0 R (page.127) 5145 0 R (page.128) 5158 0 R (page.129) 5169 0 R (page.13) 2830 0 R (page.130) 5194 0 R] -/Limits [(page.126) (page.130)] ->> -endobj -6734 0 obj -<< -/Names [(page.131) 5222 0 R (page.132) 5241 0 R (page.133) 5246 0 R (page.134) 5261 0 R (page.135) 5279 0 R (page.136) 5301 0 R] -/Limits [(page.131) (page.136)] ->> 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[(struct_f_s_p___m___c_o_n_f_i_g_a5073a296724339d70355937874841bf0) (struct_f_s_p___m___c_o_n_f_i_g_a530f8e54aafb2a3ea85132691278bafe)] >> endobj 6799 0 obj << -/Names [(struct_f_s_p___m___c_o_n_f_i_g_a9decc1a03e347a485cf3d07541a73f1b) 3233 0 R (struct_f_s_p___m___c_o_n_f_i_g_aa15fb2fe57af2804940905570212e236) 3374 0 R (struct_f_s_p___m___c_o_n_f_i_g_aa413b9b06f84d31c82ab901b82e41782) 3274 0 R (struct_f_s_p___m___c_o_n_f_i_g_aa61301b54ad9e2a34fc8fa62a812654d) 3419 0 R (struct_f_s_p___m___c_o_n_f_i_g_aa6760cf0850246783b725937332e5b1f) 3097 0 R (struct_f_s_p___m___c_o_n_f_i_g_aa85a9db5873195190bbb535b8145b389) 3158 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a9decc1a03e347a485cf3d07541a73f1b) (struct_f_s_p___m___c_o_n_f_i_g_aa85a9db5873195190bbb535b8145b389)] +/Names [(struct_f_s_p___m___c_o_n_f_i_g_a5443575dde7ac3ba678ad1d1f36ec11f) 3341 0 R (struct_f_s_p___m___c_o_n_f_i_g_a5621ad6dd6bd5e7cb14c4df43073188f) 3092 0 R (struct_f_s_p___m___c_o_n_f_i_g_a58074a427b8fe8cb4dcea2b9adf7a8c8) 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(subsubsection.8.6.2.111)] >> endobj 6962 0 obj << -/Names [(subsubsection.8.6.2.162) 1286 0 R (subsubsection.8.6.2.163) 1290 0 R (subsubsection.8.6.2.164) 1294 0 R (subsubsection.8.6.2.165) 1298 0 R (subsubsection.8.6.2.166) 1302 0 R (subsubsection.8.6.2.167) 1306 0 R] -/Limits [(subsubsection.8.6.2.162) (subsubsection.8.6.2.167)] +/Names [(subsubsection.8.6.2.112) 1086 0 R (subsubsection.8.6.2.113) 1090 0 R (subsubsection.8.6.2.114) 1094 0 R (subsubsection.8.6.2.115) 1098 0 R (subsubsection.8.6.2.116) 1102 0 R (subsubsection.8.6.2.117) 1106 0 R] +/Limits [(subsubsection.8.6.2.112) (subsubsection.8.6.2.117)] >> endobj 6963 0 obj << -/Names [(subsubsection.8.6.2.168) 1310 0 R (subsubsection.8.6.2.169) 1314 0 R (subsubsection.8.6.2.17) 706 0 R (subsubsection.8.6.2.170) 1318 0 R (subsubsection.8.6.2.171) 1322 0 R (subsubsection.8.6.2.172) 1326 0 R] -/Limits [(subsubsection.8.6.2.168) (subsubsection.8.6.2.172)] +/Names [(subsubsection.8.6.2.118) 1110 0 R (subsubsection.8.6.2.119) 1114 0 R (subsubsection.8.6.2.12) 686 0 R (subsubsection.8.6.2.120) 1118 0 R (subsubsection.8.6.2.121) 1122 0 R (subsubsection.8.6.2.122) 1126 0 R] +/Limits [(subsubsection.8.6.2.118) (subsubsection.8.6.2.122)] >> endobj 6964 0 obj << -/Names [(subsubsection.8.6.2.173) 1330 0 R (subsubsection.8.6.2.174) 1334 0 R (subsubsection.8.6.2.175) 1338 0 R (subsubsection.8.6.2.176) 1342 0 R (subsubsection.8.6.2.177) 1346 0 R (subsubsection.8.6.2.178) 1350 0 R] -/Limits [(subsubsection.8.6.2.173) (subsubsection.8.6.2.178)] +/Names [(subsubsection.8.6.2.123) 1130 0 R (subsubsection.8.6.2.124) 1134 0 R (subsubsection.8.6.2.125) 1138 0 R (subsubsection.8.6.2.126) 1142 0 R (subsubsection.8.6.2.127) 1146 0 R (subsubsection.8.6.2.128) 1150 0 R] +/Limits [(subsubsection.8.6.2.123) (subsubsection.8.6.2.128)] >> endobj 6965 0 obj << -/Names [(subsubsection.8.6.2.179) 1354 0 R (subsubsection.8.6.2.18) 710 0 R (subsubsection.8.6.2.180) 1358 0 R (subsubsection.8.6.2.181) 1362 0 R (subsubsection.8.6.2.182) 1366 0 R (subsubsection.8.6.2.183) 1370 0 R] -/Limits [(subsubsection.8.6.2.179) (subsubsection.8.6.2.183)] +/Names [(subsubsection.8.6.2.129) 1154 0 R (subsubsection.8.6.2.13) 690 0 R (subsubsection.8.6.2.130) 1158 0 R (subsubsection.8.6.2.131) 1162 0 R (subsubsection.8.6.2.132) 1166 0 R (subsubsection.8.6.2.133) 1170 0 R] +/Limits [(subsubsection.8.6.2.129) (subsubsection.8.6.2.133)] >> endobj 6966 0 obj << -/Names [(subsubsection.8.6.2.184) 1374 0 R (subsubsection.8.6.2.185) 1378 0 R (subsubsection.8.6.2.186) 1382 0 R (subsubsection.8.6.2.187) 1386 0 R (subsubsection.8.6.2.188) 1390 0 R (subsubsection.8.6.2.189) 1394 0 R] -/Limits [(subsubsection.8.6.2.184) (subsubsection.8.6.2.189)] +/Names [(subsubsection.8.6.2.134) 1174 0 R (subsubsection.8.6.2.135) 1178 0 R (subsubsection.8.6.2.136) 1182 0 R (subsubsection.8.6.2.137) 1186 0 R (subsubsection.8.6.2.138) 1190 0 R (subsubsection.8.6.2.139) 1194 0 R] +/Limits [(subsubsection.8.6.2.134) (subsubsection.8.6.2.139)] >> endobj 6967 0 obj << -/Names [(subsubsection.8.6.2.19) 714 0 R (subsubsection.8.6.2.190) 1398 0 R (subsubsection.8.6.2.191) 1402 0 R (subsubsection.8.6.2.192) 1406 0 R (subsubsection.8.6.2.193) 1410 0 R (subsubsection.8.6.2.194) 1414 0 R] -/Limits [(subsubsection.8.6.2.19) (subsubsection.8.6.2.194)] +/Names [(subsubsection.8.6.2.14) 694 0 R (subsubsection.8.6.2.140) 1198 0 R (subsubsection.8.6.2.141) 1202 0 R (subsubsection.8.6.2.142) 1206 0 R (subsubsection.8.6.2.143) 1210 0 R (subsubsection.8.6.2.144) 1214 0 R] +/Limits [(subsubsection.8.6.2.14) (subsubsection.8.6.2.144)] >> endobj 6968 0 obj << -/Names [(subsubsection.8.6.2.195) 1418 0 R (subsubsection.8.6.2.196) 1422 0 R (subsubsection.8.6.2.197) 1426 0 R (subsubsection.8.6.2.198) 1430 0 R (subsubsection.8.6.2.199) 1434 0 R (subsubsection.8.6.2.2) 646 0 R] -/Limits [(subsubsection.8.6.2.195) (subsubsection.8.6.2.2)] +/Names [(subsubsection.8.6.2.145) 1218 0 R (subsubsection.8.6.2.146) 1222 0 R (subsubsection.8.6.2.147) 1226 0 R (subsubsection.8.6.2.148) 1230 0 R (subsubsection.8.6.2.149) 1234 0 R (subsubsection.8.6.2.15) 698 0 R] +/Limits [(subsubsection.8.6.2.145) (subsubsection.8.6.2.15)] >> endobj 6969 0 obj << -/Names [(subsubsection.8.6.2.20) 718 0 R (subsubsection.8.6.2.200) 1438 0 R (subsubsection.8.6.2.201) 1442 0 R (subsubsection.8.6.2.202) 1446 0 R (subsubsection.8.6.2.203) 1450 0 R (subsubsection.8.6.2.204) 1454 0 R] -/Limits [(subsubsection.8.6.2.20) (subsubsection.8.6.2.204)] +/Names [(subsubsection.8.6.2.150) 1238 0 R (subsubsection.8.6.2.151) 1242 0 R (subsubsection.8.6.2.152) 1246 0 R (subsubsection.8.6.2.153) 1250 0 R (subsubsection.8.6.2.154) 1254 0 R (subsubsection.8.6.2.155) 1258 0 R] +/Limits [(subsubsection.8.6.2.150) (subsubsection.8.6.2.155)] >> endobj 6970 0 obj << -/Names [(subsubsection.8.6.2.205) 1458 0 R (subsubsection.8.6.2.206) 1462 0 R (subsubsection.8.6.2.21) 722 0 R (subsubsection.8.6.2.22) 726 0 R (subsubsection.8.6.2.23) 730 0 R (subsubsection.8.6.2.24) 734 0 R] -/Limits [(subsubsection.8.6.2.205) (subsubsection.8.6.2.24)] +/Names [(subsubsection.8.6.2.156) 1262 0 R (subsubsection.8.6.2.157) 1266 0 R (subsubsection.8.6.2.158) 1270 0 R (subsubsection.8.6.2.159) 1274 0 R (subsubsection.8.6.2.16) 702 0 R (subsubsection.8.6.2.160) 1278 0 R] +/Limits [(subsubsection.8.6.2.156) (subsubsection.8.6.2.160)] >> endobj 6971 0 obj << -/Names [(subsubsection.8.6.2.25) 738 0 R (subsubsection.8.6.2.26) 742 0 R (subsubsection.8.6.2.27) 746 0 R (subsubsection.8.6.2.28) 750 0 R (subsubsection.8.6.2.29) 754 0 R (subsubsection.8.6.2.3) 650 0 R] -/Limits [(subsubsection.8.6.2.25) (subsubsection.8.6.2.3)] +/Names [(subsubsection.8.6.2.161) 1282 0 R (subsubsection.8.6.2.162) 1286 0 R (subsubsection.8.6.2.163) 1290 0 R (subsubsection.8.6.2.164) 1294 0 R (subsubsection.8.6.2.165) 1298 0 R (subsubsection.8.6.2.166) 1302 0 R] +/Limits [(subsubsection.8.6.2.161) (subsubsection.8.6.2.166)] >> endobj 6972 0 obj << -/Names [(subsubsection.8.6.2.30) 758 0 R (subsubsection.8.6.2.31) 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1374 0 R (subsubsection.8.6.2.185) 1378 0 R (subsubsection.8.6.2.186) 1382 0 R (subsubsection.8.6.2.187) 1386 0 R (subsubsection.8.6.2.188) 1390 0 R] +/Limits [(subsubsection.8.6.2.183) (subsubsection.8.6.2.188)] >> endobj 6976 0 obj << -/Names [(subsubsection.8.6.2.52) 846 0 R (subsubsection.8.6.2.53) 850 0 R (subsubsection.8.6.2.54) 854 0 R (subsubsection.8.6.2.55) 858 0 R (subsubsection.8.6.2.56) 862 0 R (subsubsection.8.6.2.57) 866 0 R] -/Limits [(subsubsection.8.6.2.52) (subsubsection.8.6.2.57)] +/Names [(subsubsection.8.6.2.189) 1394 0 R (subsubsection.8.6.2.19) 714 0 R (subsubsection.8.6.2.190) 1398 0 R (subsubsection.8.6.2.191) 1402 0 R (subsubsection.8.6.2.192) 1406 0 R (subsubsection.8.6.2.193) 1410 0 R] +/Limits [(subsubsection.8.6.2.189) (subsubsection.8.6.2.193)] >> endobj 6977 0 obj << -/Names [(subsubsection.8.6.2.58) 870 0 R (subsubsection.8.6.2.59) 874 0 R (subsubsection.8.6.2.6) 662 0 R (subsubsection.8.6.2.60) 878 0 R (subsubsection.8.6.2.61) 882 0 R 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[(subsubsection.8.6.2.69) 914 0 R (subsubsection.8.6.2.7) 666 0 R (subsubsection.8.6.2.70) 918 0 R (subsubsection.8.6.2.71) 922 0 R (subsubsection.8.6.2.72) 926 0 R (subsubsection.8.6.2.73) 930 0 R] -/Limits [(subsubsection.8.6.2.69) (subsubsection.8.6.2.73)] +/Names [(subsubsection.8.6.2.204) 1454 0 R (subsubsection.8.6.2.205) 1458 0 R (subsubsection.8.6.2.206) 1462 0 R (subsubsection.8.6.2.207) 1466 0 R (subsubsection.8.6.2.21) 722 0 R (subsubsection.8.6.2.22) 726 0 R] +/Limits [(subsubsection.8.6.2.204) (subsubsection.8.6.2.22)] >> endobj 6980 0 obj << -/Names [(subsubsection.8.6.2.74) 934 0 R (subsubsection.8.6.2.75) 938 0 R (subsubsection.8.6.2.76) 942 0 R (subsubsection.8.6.2.77) 946 0 R (subsubsection.8.6.2.78) 950 0 R (subsubsection.8.6.2.79) 954 0 R] -/Limits [(subsubsection.8.6.2.74) (subsubsection.8.6.2.79)] +/Names [(subsubsection.8.6.2.23) 730 0 R (subsubsection.8.6.2.24) 734 0 R (subsubsection.8.6.2.25) 738 0 R (subsubsection.8.6.2.26) 742 0 R (subsubsection.8.6.2.27) 746 0 R (subsubsection.8.6.2.28) 750 0 R] +/Limits [(subsubsection.8.6.2.23) (subsubsection.8.6.2.28)] >> endobj 6981 0 obj << -/Names [(subsubsection.8.6.2.8) 670 0 R (subsubsection.8.6.2.80) 958 0 R (subsubsection.8.6.2.81) 962 0 R (subsubsection.8.6.2.82) 966 0 R (subsubsection.8.6.2.83) 970 0 R (subsubsection.8.6.2.84) 974 0 R] -/Limits [(subsubsection.8.6.2.8) (subsubsection.8.6.2.84)] +/Names [(subsubsection.8.6.2.29) 754 0 R (subsubsection.8.6.2.3) 650 0 R (subsubsection.8.6.2.30) 758 0 R (subsubsection.8.6.2.31) 762 0 R (subsubsection.8.6.2.32) 766 0 R (subsubsection.8.6.2.33) 770 0 R] +/Limits [(subsubsection.8.6.2.29) (subsubsection.8.6.2.33)] >> endobj 6982 0 obj << -/Names [(subsubsection.8.6.2.85) 978 0 R (subsubsection.8.6.2.86) 982 0 R (subsubsection.8.6.2.87) 986 0 R (subsubsection.8.6.2.88) 990 0 R (subsubsection.8.6.2.89) 994 0 R (subsubsection.8.6.2.9) 674 0 R] -/Limits [(subsubsection.8.6.2.85) (subsubsection.8.6.2.9)] +/Names [(subsubsection.8.6.2.34) 774 0 R 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0 R] +/Limits [(subsubsection.8.6.2.61) (subsubsection.8.6.2.66)] >> endobj 6988 0 obj << -/Names [(subsubsection.8.7.2.28) 1586 0 R (subsubsection.8.7.2.29) 1590 0 R (subsubsection.8.7.2.3) 1486 0 R (subsubsection.8.7.2.30) 1594 0 R (subsubsection.8.7.2.31) 1598 0 R (subsubsection.8.7.2.32) 1602 0 R] -/Limits [(subsubsection.8.7.2.28) (subsubsection.8.7.2.32)] +/Names [(subsubsection.8.6.2.67) 906 0 R (subsubsection.8.6.2.68) 910 0 R (subsubsection.8.6.2.69) 914 0 R (subsubsection.8.6.2.7) 666 0 R (subsubsection.8.6.2.70) 918 0 R (subsubsection.8.6.2.71) 922 0 R] +/Limits [(subsubsection.8.6.2.67) (subsubsection.8.6.2.71)] >> endobj 6989 0 obj << -/Names [(subsubsection.8.7.2.33) 1606 0 R (subsubsection.8.7.2.34) 1610 0 R (subsubsection.8.7.2.35) 1614 0 R (subsubsection.8.7.2.36) 1618 0 R (subsubsection.8.7.2.37) 1622 0 R (subsubsection.8.7.2.38) 1626 0 R] -/Limits [(subsubsection.8.7.2.33) (subsubsection.8.7.2.38)] +/Names [(subsubsection.8.6.2.72) 926 0 R (subsubsection.8.6.2.73) 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[(subsubsection.8.7.2.1) (subsubsection.8.7.2.14)] >> endobj 6995 0 obj << -/Names [(subsubsection.8.7.2.66) 1738 0 R (subsubsection.8.7.2.67) 1742 0 R (subsubsection.8.7.2.68) 1746 0 R (subsubsection.8.7.2.69) 1750 0 R (subsubsection.8.7.2.7) 1502 0 R (subsubsection.8.7.2.70) 1754 0 R] -/Limits [(subsubsection.8.7.2.66) (subsubsection.8.7.2.70)] +/Names [(subsubsection.8.7.2.15) 1538 0 R (subsubsection.8.7.2.16) 1542 0 R (subsubsection.8.7.2.17) 1546 0 R (subsubsection.8.7.2.18) 1550 0 R (subsubsection.8.7.2.19) 1554 0 R (subsubsection.8.7.2.2) 1486 0 R] +/Limits [(subsubsection.8.7.2.15) (subsubsection.8.7.2.2)] >> endobj 6996 0 obj << -/Names [(subsubsection.8.7.2.71) 1758 0 R (subsubsection.8.7.2.72) 1762 0 R (subsubsection.8.7.2.73) 1766 0 R (subsubsection.8.7.2.74) 1770 0 R (subsubsection.8.7.2.75) 1774 0 R (subsubsection.8.7.2.76) 1778 0 R] -/Limits [(subsubsection.8.7.2.71) (subsubsection.8.7.2.76)] +/Names [(subsubsection.8.7.2.20) 1558 0 R (subsubsection.8.7.2.21) 1562 0 R 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6756 0 R 6757 0 R 6758 0 R] -/Limits [(page.87) (section*.3)] +/Names [(subsubsection.9.7.2.10) 2070 0 R (subsubsection.9.7.2.2) 2038 0 R (subsubsection.9.7.2.3) 2042 0 R (subsubsection.9.7.2.4) 2046 0 R (subsubsection.9.7.2.5) 2050 0 R (subsubsection.9.7.2.6) 2054 0 R] +/Limits [(subsubsection.9.7.2.10) (subsubsection.9.7.2.6)] >> endobj 7010 0 obj << -/Kids [6759 0 R 6760 0 R 6761 0 R 6762 0 R 6763 0 R 6764 0 R] -/Limits [(section*.30) (section*.62)] +/Names [(subsubsection.9.7.2.7) 2058 0 R (subsubsection.9.7.2.8) 2062 0 R (subsubsection.9.7.2.9) 2066 0 R] +/Limits [(subsubsection.9.7.2.7) (subsubsection.9.7.2.9)] >> endobj 7011 0 obj << -/Kids [6765 0 R 6766 0 R 6767 0 R 6768 0 R 6769 0 R 6770 0 R] -/Limits [(section*.63) (section.9.1)] +/Kids [6720 0 R 6721 0 R 6722 0 R 6723 0 R 6724 0 R 6725 0 R] +/Limits [(Doc-Start) (_gpio_config_8h_a2c7b972de3238c247372dad443c9733aa6a5d11c5c300e751f0342064bb8e0c52)] >> endobj 7012 0 obj << -/Kids [6771 0 R 6772 0 R 6773 0 R 6774 0 R 6775 0 R 6776 0 R] -/Limits [(section.9.10) (struct_f_s_p___m___c_o_n_f_i_g_a049475db041f38d539d73148bc06d08d)] +/Kids [6726 0 R 6727 0 R 6728 0 R 6729 0 R 6730 0 R 6731 0 R] +/Limits [(_gpio_config_8h_a2c7b972de3238c247372dad443c9733aadca9d1f54792097045120761bf03ab08) (_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba1b35b1a6099f1b50678b383945ebfdb8)] >> endobj 7013 0 obj << -/Kids [6777 0 R 6778 0 R 6779 0 R 6780 0 R 6781 0 R 6782 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a04a158432d5f2c77100a205e89fb18e3) (struct_f_s_p___m___c_o_n_f_i_g_a2cb04cceb53ae292a8edae9bf777298a)] +/Kids [6732 0 R 6733 0 R 6734 0 R 6735 0 R 6736 0 R 6737 0 R] +/Limits [(_gpio_config_8h_abef3fd17e30955cdcd1999d48f4e718ba470c9c10fa83ddec05936306a0e4b98f) (page.103)] >> endobj 7014 0 obj << -/Kids [6783 0 R 6784 0 R 6785 0 R 6786 0 R 6787 0 R 6788 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a2d36d25ffe930a96c9837f85aefaa545) (struct_f_s_p___m___c_o_n_f_i_g_a5055cf2b91609c65e69be1ef572520a8)] +/Kids [6738 0 R 6739 0 R 6740 0 R 6741 0 R 6742 0 R 6743 0 R] +/Limits [(page.104) (page.136)] >> endobj 7015 0 obj << -/Kids [6789 0 R 6790 0 R 6791 0 R 6792 0 R 6793 0 R 6794 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a5073a296724339d70355937874841bf0) (struct_f_s_p___m___c_o_n_f_i_g_a84620948dfa1ebe09aaa043850f3a020)] +/Kids [6744 0 R 6745 0 R 6746 0 R 6747 0 R 6748 0 R 6749 0 R] +/Limits [(page.137) (page.20)] >> endobj 7016 0 obj << -/Kids [6795 0 R 6796 0 R 6797 0 R 6798 0 R 6799 0 R 6800 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a86fa3fda4843cfbc90ffb2323b7ea495) (struct_f_s_p___m___c_o_n_f_i_g_ab2e32279091a9f3998b08d005dc3708d)] +/Kids [6750 0 R 6751 0 R 6752 0 R 6753 0 R 6754 0 R 6755 0 R] +/Limits [(page.21) (page.53)] >> endobj 7017 0 obj << -/Kids [6801 0 R 6802 0 R 6803 0 R 6804 0 R 6805 0 R 6806 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_ab414b6a623041b987fe028f63b4ff6ba) (struct_f_s_p___m___c_o_n_f_i_g_ad81e6977abcb92e14bd0fb76da15e31e)] +/Kids [6756 0 R 6757 0 R 6758 0 R 6759 0 R 6760 0 R 6761 0 R] +/Limits [(page.54) (page.86)] >> endobj 7018 0 obj << -/Kids [6807 0 R 6808 0 R 6809 0 R 6810 0 R 6811 0 R 6812 0 R] -/Limits [(struct_f_s_p___m___c_o_n_f_i_g_ad93dfd7bd9f306b8e24d4db7862d5c88) (struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_a01499b82b39aedc76f9ac73b9a2c5357)] +/Kids [6762 0 R 6763 0 R 6764 0 R 6765 0 R 6766 0 R 6767 0 R] +/Limits [(page.87) (section*.3)] >> endobj 7019 0 obj << -/Kids [6813 0 R 6814 0 R 6815 0 R 6816 0 R 6817 0 R 6818 0 R] -/Limits [(struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_a10f0e19e441dc63903e3c9e5f195c472) (struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_ab433253d197c7770975285ecf16026ca)] +/Kids [6768 0 R 6769 0 R 6770 0 R 6771 0 R 6772 0 R 6773 0 R] +/Limits [(section*.30) (section*.62)] >> endobj 7020 0 obj << -/Kids [6819 0 R 6820 0 R 6821 0 R 6822 0 R 6823 0 R 6824 0 R] -/Limits [(struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_ab6cfee994aa72ff7506d966073ed7068) (struct_f_s_p___s___c_o_n_f_i_g_a0940e40a382570753e1c358fda7e7445)] +/Kids [6774 0 R 6775 0 R 6776 0 R 6777 0 R 6778 0 R 6779 0 R] +/Limits [(section*.63) (section.9.1)] >> endobj 7021 0 obj << -/Kids [6825 0 R 6826 0 R 6827 0 R 6828 0 R 6829 0 R 6830 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a0c2be8ebcb037f111ac7b578de2fe486) (struct_f_s_p___s___c_o_n_f_i_g_a24d9e25038b36e25014ec07087095d27)] +/Kids [6780 0 R 6781 0 R 6782 0 R 6783 0 R 6784 0 R 6785 0 R] +/Limits [(section.9.10) (struct_f_s_p___m___c_o_n_f_i_g_a049475db041f38d539d73148bc06d08d)] >> endobj 7022 0 obj << -/Kids [6831 0 R 6832 0 R 6833 0 R 6834 0 R 6835 0 R 6836 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a250f2a0fd2fbaf59b664dd5470d0dadf) (struct_f_s_p___s___c_o_n_f_i_g_a3e2c4455de4ceec94b7db0f73f52343f)] +/Kids [6786 0 R 6787 0 R 6788 0 R 6789 0 R 6790 0 R 6791 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a04a158432d5f2c77100a205e89fb18e3) (struct_f_s_p___m___c_o_n_f_i_g_a2cb04cceb53ae292a8edae9bf777298a)] >> endobj 7023 0 obj << -/Kids [6837 0 R 6838 0 R 6839 0 R 6840 0 R 6841 0 R 6842 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a3e526ed26bd982ec178121ea018d50af) (struct_f_s_p___s___c_o_n_f_i_g_a5565a8212d00b79ba8af8e5addd8f317)] +/Kids [6792 0 R 6793 0 R 6794 0 R 6795 0 R 6796 0 R 6797 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a2d36d25ffe930a96c9837f85aefaa545) (struct_f_s_p___m___c_o_n_f_i_g_a5055cf2b91609c65e69be1ef572520a8)] >> endobj 7024 0 obj << -/Kids [6843 0 R 6844 0 R 6845 0 R 6846 0 R 6847 0 R 6848 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a55a2d2a79fbc189eaed9bfa5c18bd3e2) (struct_f_s_p___s___c_o_n_f_i_g_a6de13a438a30b78bae4bc0dbbc052ede)] +/Kids [6798 0 R 6799 0 R 6800 0 R 6801 0 R 6802 0 R 6803 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a5073a296724339d70355937874841bf0) (struct_f_s_p___m___c_o_n_f_i_g_a84620948dfa1ebe09aaa043850f3a020)] >> endobj 7025 0 obj << -/Kids [6849 0 R 6850 0 R 6851 0 R 6852 0 R 6853 0 R 6854 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a6e8f9dab3d45b75c6569b9e6ed3f06b5) (struct_f_s_p___s___c_o_n_f_i_g_a83b8aa509af344f3d100fdd2e24d0cfc)] +/Kids [6804 0 R 6805 0 R 6806 0 R 6807 0 R 6808 0 R 6809 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_a86fa3fda4843cfbc90ffb2323b7ea495) (struct_f_s_p___m___c_o_n_f_i_g_ab2e32279091a9f3998b08d005dc3708d)] >> endobj 7026 0 obj << -/Kids [6855 0 R 6856 0 R 6857 0 R 6858 0 R 6859 0 R 6860 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a86284f4b8f2fbcf72c2c092c68726546) (struct_f_s_p___s___c_o_n_f_i_g_aa507ea3e0190f0982e42a6fb8526f704)] +/Kids [6810 0 R 6811 0 R 6812 0 R 6813 0 R 6814 0 R 6815 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_ab414b6a623041b987fe028f63b4ff6ba) (struct_f_s_p___m___c_o_n_f_i_g_ad81e6977abcb92e14bd0fb76da15e31e)] >> endobj 7027 0 obj << -/Kids [6861 0 R 6862 0 R 6863 0 R 6864 0 R 6865 0 R 6866 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_aa534d8b41ec75a992a28327c8015b29e) (struct_f_s_p___s___c_o_n_f_i_g_ab998ff06c65c1118cfa182896546c565)] +/Kids [6816 0 R 6817 0 R 6818 0 R 6819 0 R 6820 0 R 6821 0 R] +/Limits [(struct_f_s_p___m___c_o_n_f_i_g_ad93dfd7bd9f306b8e24d4db7862d5c88) (struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_a01499b82b39aedc76f9ac73b9a2c5357)] >> endobj 7028 0 obj << -/Kids [6867 0 R 6868 0 R 6869 0 R 6870 0 R 6871 0 R 6872 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_abb8d46e4466a02e4b6ecc6b4f6a9d426) (struct_f_s_p___s___c_o_n_f_i_g_ada2125b48fb7f18981b00af7dba1ba2e)] +/Kids [6822 0 R 6823 0 R 6824 0 R 6825 0 R 6826 0 R 6827 0 R] +/Limits [(struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_a10f0e19e441dc63903e3c9e5f195c472) (struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_ab433253d197c7770975285ecf16026ca)] >> endobj 7029 0 obj << -/Kids [6873 0 R 6874 0 R 6875 0 R 6876 0 R 6877 0 R 6878 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_ada2f54b1d93cdecc52186c7f8b151bdd) (struct_f_s_p___s___c_o_n_f_i_g_af126c7dae19a95e83202df99e11eb8ff)] +/Kids [6828 0 R 6829 0 R 6830 0 R 6831 0 R 6832 0 R 6833 0 R] +/Limits [(struct_f_s_p___m___t_e_s_t___c_o_n_f_i_g_ab6cfee994aa72ff7506d966073ed7068) (struct_f_s_p___s___c_o_n_f_i_g_a0940e40a382570753e1c358fda7e7445)] >> endobj 7030 0 obj << -/Kids [6879 0 R 6880 0 R 6881 0 R 6882 0 R 6883 0 R 6884 0 R] -/Limits [(struct_f_s_p___s___c_o_n_f_i_g_af1544589635c7bf58789b69a74db6906) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a18ca6d344248c2cb16a22e45cc308060)] +/Kids [6834 0 R 6835 0 R 6836 0 R 6837 0 R 6838 0 R 6839 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a0c2be8ebcb037f111ac7b578de2fe486) (struct_f_s_p___s___c_o_n_f_i_g_a24d9e25038b36e25014ec07087095d27)] >> endobj 7031 0 obj << -/Kids [6885 0 R 6886 0 R 6887 0 R 6888 0 R 6889 0 R 6890 0 R] -/Limits [(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a1b5103d481ee9174489ad27a55ee533b) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a52443c0f8ab569cdfbe5a576feaf60de)] +/Kids [6840 0 R 6841 0 R 6842 0 R 6843 0 R 6844 0 R 6845 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a250f2a0fd2fbaf59b664dd5470d0dadf) (struct_f_s_p___s___c_o_n_f_i_g_a3e2c4455de4ceec94b7db0f73f52343f)] >> endobj 7032 0 obj << -/Kids [6891 0 R 6892 0 R 6893 0 R 6894 0 R 6895 0 R 6896 0 R] -/Limits [(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a53da5bbd218ec723024a881c9db4c414) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a9395f590ab806ee1e37b3540a0f7319f)] +/Kids [6846 0 R 6847 0 R 6848 0 R 6849 0 R 6850 0 R 6851 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a3e526ed26bd982ec178121ea018d50af) (struct_f_s_p___s___c_o_n_f_i_g_a53fac8aacb44da39dd126e20b68f4a71)] >> endobj 7033 0 obj << -/Kids [6897 0 R 6898 0 R 6899 0 R 6900 0 R 6901 0 R 6902 0 R] -/Limits [(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a93a0ba8d3dd28914f54d9c0ba004189c) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad085e5c542615a0655c3bd3476d674c6)] +/Kids [6852 0 R 6853 0 R 6854 0 R 6855 0 R 6856 0 R 6857 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a5565a8212d00b79ba8af8e5addd8f317) (struct_f_s_p___s___c_o_n_f_i_g_a6b57696c3bdac6456a8e1c580b45d719)] >> endobj 7034 0 obj << -/Kids [6903 0 R 6904 0 R 6905 0 R 6906 0 R 6907 0 R 6908 0 R] -/Limits [(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_ad25b5e67641944d3eec116f7618651c4) (struct_f_s_p_m___u_p_d_a74c247ddff97be41e56b7cc5acc7118a)] +/Kids [6858 0 R 6859 0 R 6860 0 R 6861 0 R 6862 0 R 6863 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a6d40d1e7190796889b47ca3bef25906a) (struct_f_s_p___s___c_o_n_f_i_g_a830105e031f9ecbca8413c793d821aca)] >> endobj 7035 0 obj << -/Kids [6909 0 R 6910 0 R 6911 0 R 6912 0 R 6913 0 R 6914 0 R] -/Limits [(struct_f_s_p_m___u_p_d_a75ce7847fea558f1edb99db4aa978bc6) (struct_s_i___c_h_i_p_s_e_t___i_n_i_t___i_n_f_o)] +/Kids [6864 0 R 6865 0 R 6866 0 R 6867 0 R 6868 0 R 6869 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_a83b8aa509af344f3d100fdd2e24d0cfc) (struct_f_s_p___s___c_o_n_f_i_g_aa3682cc47632839f20c1510bee8c4fe2)] >> endobj 7036 0 obj << -/Kids [6915 0 R 6916 0 R 6917 0 R 6918 0 R 6919 0 R 6920 0 R] -/Limits [(struct_s_i___p_c_h___d_e_v_i_c_e___i_n_t_e_r_r_u_p_t___c_o_n_f_i_g) (subsection.8.12.1)] +/Kids [6870 0 R 6871 0 R 6872 0 R 6873 0 R 6874 0 R 6875 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_aa507ea3e0190f0982e42a6fb8526f704) (struct_f_s_p___s___c_o_n_f_i_g_ab9860abae5fe9a78bf67a3b541bb1e06)] >> endobj 7037 0 obj << -/Kids [6921 0 R 6922 0 R 6923 0 R 6924 0 R 6925 0 R 6926 0 R] -/Limits [(subsection.8.13.1) (subsubsection.8.13.2.3)] +/Kids [6876 0 R 6877 0 R 6878 0 R 6879 0 R 6880 0 R 6881 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_ab998ff06c65c1118cfa182896546c565) (struct_f_s_p___s___c_o_n_f_i_g_ad9a0e895e4e4fe5c92f88044aeaae389)] >> endobj 7038 0 obj << -/Kids [6927 0 R 6928 0 R 6929 0 R 6930 0 R 6931 0 R 6932 0 R] -/Limits [(subsubsection.8.13.2.4) (subsubsection.8.4.2.37)] +/Kids [6882 0 R 6883 0 R 6884 0 R 6885 0 R 6886 0 R 6887 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_ada2125b48fb7f18981b00af7dba1ba2e) (struct_f_s_p___s___c_o_n_f_i_g_af0c907368ecbef65dd0bcb44c6895529)] >> endobj 7039 0 obj << -/Kids [6933 0 R 6934 0 R 6935 0 R 6936 0 R 6937 0 R 6938 0 R] -/Limits [(subsubsection.8.4.2.38) (subsubsection.8.4.2.7)] +/Kids [6888 0 R 6889 0 R 6890 0 R 6891 0 R 6892 0 R 6893 0 R] +/Limits [(struct_f_s_p___s___c_o_n_f_i_g_af126c7dae19a95e83202df99e11eb8ff) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a157f45d19a0aafb441b34d9d86656151)] >> endobj 7040 0 obj << -/Kids [6939 0 R 6940 0 R 6941 0 R 6942 0 R 6943 0 R 6944 0 R] -/Limits [(subsubsection.8.4.2.70) (subsubsection.8.5.2.22)] +/Kids [6894 0 R 6895 0 R 6896 0 R 6897 0 R 6898 0 R 6899 0 R] +/Limits [(struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a18ca6d344248c2cb16a22e45cc308060) (struct_f_s_p___s___t_e_s_t___c_o_n_f_i_g_a520b036244d7c9804d6c9a23d4f70ea2)] >> endobj 7041 0 obj << -/Kids [6945 0 R 6946 0 R 6947 0 R 6948 0 R 6949 0 R 6950 0 R] -/Limits [(subsubsection.8.5.2.23) (subsubsection.8.6.2.101)] +/Kids [6900 0 R 6901 0 R 6902 0 R 6903 0 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+0001610266 00000 n +0001610414 00000 n +0001610559 00000 n +0001610705 00000 n +0001610850 00000 n +0001610996 00000 n +0001611142 00000 n +0001611260 00000 n +0001611378 00000 n +0001611551 00000 n +0001611791 00000 n +0001612031 00000 n +0001612271 00000 n +0001612469 00000 n +0001612616 00000 n +0001612763 00000 n +0001612863 00000 n +0001612996 00000 n +0001613114 00000 n +0001613210 00000 n +0001613250 00000 n +0001613424 00000 n trailer -<< /Size 7066 -/Root 7064 0 R -/Info 7065 0 R -/ID [<687A139E5348D66EA4FC5DB2CB1B7EC8> <687A139E5348D66EA4FC5DB2CB1B7EC8>] >> +<< /Size 7075 +/Root 7073 0 R +/Info 7074 0 R +/ID [<0F87D64B7ADC75CB8EE6EAA3E5427146> <0F87D64B7ADC75CB8EE6EAA3E5427146>] >> startxref -1592975 +1613700 %%EOF diff --git a/AmberLakeFspBinPkg/Fsp.bsf b/AmberLakeFspBinPkg/Fsp.bsf index 242fb35..f8f77fa 100644 --- a/AmberLakeFspBinPkg/Fsp.bsf +++ b/AmberLakeFspBinPkg/Fsp.bsf @@ -667,7 +667,8 @@ StructDef $gKabylakeFspPkgTokenSpaceGuid_Early8254ClockGatingEnable 1 bytes $_DEFAULT_ = 0x00 $gKabylakeFspPkgTokenSpaceGuid_SataRstOptaneMemory 1 bytes $_DEFAULT_ = 0x01 $gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage 1 bytes $_DEFAULT_ = 0x01 - Skip 2 bytes + $gKabylakeFspPkgTokenSpaceGuid_HybridStorageMode 1 bytes $_DEFAULT_ = 0x00 + Skip 1 bytes $gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr 4 bytes $_DEFAULT_ = 0x00000000 $gKabylakeFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00 $gSkylakeFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF @@ -2913,6 +2914,8 @@ Page "Sunrise Point PCH" Help "Optane Memory" Combo $gKabylakeFspPkgTokenSpaceGuid_SataRstCpuAttachedStorage, "PCH SATA RST CPU attached storage", &EN_DIS, Help "RST CPU attached storage" + Combo $gKabylakeFspPkgTokenSpaceGuid_HybridStorageMode, "Hybrid Storage Mode", &EN_DIS, + Help "Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration. Default is 0: Disabled" EditNum $gKabylakeFspPkgTokenSpaceGuid_PchPcieDeviceOverrideTablePtr, "Pch PCIE device override table pointer", HEX, Help "The PCIe device table is being used to override PCIe device ASPM settings. This is a pointer points to a 32bit address. And it's only used in PostMem phase. Please refer to PCH_PCIE_DEVICE_OVERRIDE structure for the table. Last entry VendorId must be 0." "Valid range: 0x00 ~ 0xFFFFFFFF" diff --git a/AmberLakeFspBinPkg/Fsp.fd b/AmberLakeFspBinPkg/Fsp.fd index 2e5cc47..9aefb19 100644 Binary files a/AmberLakeFspBinPkg/Fsp.fd and b/AmberLakeFspBinPkg/Fsp.fd differ diff --git a/AmberLakeFspBinPkg/Include/FspsUpd.h b/AmberLakeFspBinPkg/Include/FspsUpd.h index e8be554..2ceba58 100644 --- a/AmberLakeFspBinPkg/Include/FspsUpd.h +++ b/AmberLakeFspBinPkg/Include/FspsUpd.h @@ -2010,9 +2010,16 @@ typedef struct { **/ UINT8 SataRstCpuAttachedStorage; -/** Offset 0x0722 +/** Offset 0x0722 - Hybrid Storage Mode + Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration. + Default is 0: Disabled + $EN_DIS **/ - UINT8 UnusedUpdSpace18[2]; + UINT8 HybridStorageMode; + +/** Offset 0x0723 +**/ + UINT8 UnusedUpdSpace18; /** Offset 0x0724 - Pch PCIE device override table pointer The PCIe device table is being used to override PCIe device ASPM settings. This diff --git a/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bin b/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bin index fe88d48..5eab2cc 100644 Binary files a/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bin and b/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bin differ diff --git a/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bsf b/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bsf index dafd3d0..004abf0 100644 --- a/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bsf +++ b/AmberLakeFspBinPkg/SampleCode/Vbt/Vbt.bsf @@ -94,7 +94,7 @@ ALIGN ; bmp_Bits_3 SKIP 2 bits ; Skip 2 bits -$180_Deg_Rotation_Enable 1 bit ; 180 degree rotation enable for LFP in GOP driver. +SKIP 1 bit ; Obsolete. SKIP 5 bits ; Skip remaining bits. ALIGN @@ -184,8 +184,9 @@ SKIP 2 bytes ; Skip Boot display type $size_ChildStruc 1 byte ; Internal LFP Data structure -SKIP 10 bytes ; Skip 10 bytes till Flags 0 - +SKIP 2 bytes ; Skip Device Handle +$LFP_Device_Class 2 bytes ; Device class +SKIP 6 bytes ; Skip till Flags 0 field SKIP 1 bit ; Skip EDID less enable bit used for EFP's $Int_LFP_Compression_Enable 1 bit ; Compression enable bit $Int_LFP_Compression_Method_Select 1 bit ; Compression method select PPS/CPS @@ -823,7 +824,7 @@ $CUI_Maintain_Aspect 1 bit ; Display "Maintain Aspect $Preserve_Aspect_Ratio 1 bit ; Preserve Aspect Ratio $SDVO_Device_Power_Down 1 bit ; Obsolete SKIP 1 bit ; Obsolete: Was used for CRT hot plug -$LVDS_Config 2 bits ; LVDS configuration +SKIP 2 bits ; Obsolete: Was used for LVDS configuration SKIP 1 bit ; Hot plug TV enable/disable SKIP 2 bits ; Integrated HDMI Configuration ALIGN @@ -849,18 +850,18 @@ $VBT_Customization_Version 1 byte ; Customization VBT versio ; bmp_Driver_Feature_Flags $PM_RMPM_Enable 1 bit ; Intel® Rapid Memory Power Management (RMPM) Enable/Disable Flag. $PM_S2DDT_Enable 1 bit ; Intel® Smart 2D Display Technology (S2DDT) Enable/Disable Flag. -$PM_DPST_Enable 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag. +SKIP 1 bit ; Obsolete. $PM_BLC_Enable 1 bit ; Backlight Control (BLC) Enable/Disable Flag. -$PM_ADB_Enable 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag. -$PM_DRRS_Enable 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag. +SKIP 1 bit ; Obsolete. +SKIP 1 bit ; Obsolete. $PM_RS_Enable 1 bit ; Graphics Render Standby (RS) Enable/Disable Flag. $PM_GPMT_Enable 1 bit ; Obsolete $PM_Turbo_Enable 1 bit ; Intel Turbo Boost Technology Enable/Disable Flag. -$Panel_Self_Refresh 1 bit ; Panel Self refresh feature (PSR) +SKIP 1 bit ; Obsolete. $Inter_Pixel_Storage 1 bit ; Hidden feature. $Dynamic_FPS_Enable 1 bit ; Dynamic Frames per second(DFPS) feature Enable/Disable Flag. -$DMRRS 1 bit ; Dynamic media refresh rate enable/disable -$ADT 1 bit ; Assertive display technology enable/disable +SKIP 1 bit ; Obsolete. +SKIP 1 bit ; Obsolete. $HPD_Wake 1 bit ; HPD events routing to display driver when system is in S0ix/DC9, enable/disable $PC_Fields_Enable 1 bit ; PC Feature field's validity Flag. ALIGN @@ -1089,82 +1090,82 @@ $eDP_Panel_Color_Depth_14 2 bits ; 00 = 18bpp, 01 = 24bpp, $eDP_Panel_Color_Depth_15 2 bits ; 00 = 18bpp, 01 = 24bpp, 10 = 30bpp $eDP_Panel_Color_Depth_16 2 bits ; 00 = 18bpp, 01 = 24bpp, 10 = 30bpp -$eDP_Link_DataRate_01 4 bits ; Panel #01 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #01 Link Data Rate $eDP_Link_LaneCount_01 4 bits ; Panel #01 Link Lane Count $eDP_Link_PreEmp_01 4 bits ; Panel #01 Link Pre-emphasis $eDP_Link_Vswing_01 4 bits ; Panel #01 Link Voltage Swing -$eDP_Link_DataRate_02 4 bits ; Panel #02 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #02 Link Data Rate $eDP_Link_LaneCount_02 4 bits ; Panel #02 Link Lane Count $eDP_Link_PreEmp_02 4 bits ; Panel #02 Link Pre-emphasis $eDP_Link_Vswing_02 4 bits ; Panel #02 Link Voltage Swing -$eDP_Link_DataRate_03 4 bits ; Panel #03 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #03 Link Data Rate $eDP_Link_LaneCount_03 4 bits ; Panel #03 Link Lane Count $eDP_Link_PreEmp_03 4 bits ; Panel #03 Link Pre-emphasis $eDP_Link_Vswing_03 4 bits ; Panel #03 Link Voltage Swing -$eDP_Link_DataRate_04 4 bits ; Panel #04 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #04 Link Data Rate $eDP_Link_LaneCount_04 4 bits ; Panel #04 Link Lane Count $eDP_Link_PreEmp_04 4 bits ; Panel #04 Link Pre-emphasis $eDP_Link_Vswing_04 4 bits ; Panel #04 Link Voltage Swing -$eDP_Link_DataRate_05 4 bits ; Panel #05 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #05 Link Data Rate $eDP_Link_LaneCount_05 4 bits ; Panel #05 Link Lane Count $eDP_Link_PreEmp_05 4 bits ; Panel #05 Link Pre-emphasis $eDP_Link_Vswing_05 4 bits ; Panel #05 Link Voltage Swing -$eDP_Link_DataRate_06 4 bits ; Panel #06 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #06 Link Data Rate $eDP_Link_LaneCount_06 4 bits ; Panel #06 Link Lane Count $eDP_Link_PreEmp_06 4 bits ; Panel #06 Link Pre-emphasis $eDP_Link_Vswing_06 4 bits ; Panel #06 Link Voltage Swing -$eDP_Link_DataRate_07 4 bits ; Panel #07 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #07 Link Data Rate $eDP_Link_LaneCount_07 4 bits ; Panel #07 Link Lane Count $eDP_Link_PreEmp_07 4 bits ; Panel #07 Link Pre-emphasis $eDP_Link_Vswing_07 4 bits ; Panel #07 Link Voltage Swing -$eDP_Link_DataRate_08 4 bits ; Panel #08 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #08 Link Data Rate $eDP_Link_LaneCount_08 4 bits ; Panel #08 Link Lane Count $eDP_Link_PreEmp_08 4 bits ; Panel #08 Link Pre-emphasis $eDP_Link_Vswing_08 4 bits ; Panel #08 Link Voltage Swing -$eDP_Link_DataRate_09 4 bits ; Panel #09 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #09 Link Data Rate $eDP_Link_LaneCount_09 4 bits ; Panel #09 Link Lane Count $eDP_Link_PreEmp_09 4 bits ; Panel #09 Link Pre-emphasis $eDP_Link_Vswing_09 4 bits ; Panel #09 Link Voltage Swing -$eDP_Link_DataRate_10 4 bits ; Panel #10 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #10 Link Data Rate $eDP_Link_LaneCount_10 4 bits ; Panel #10 Link Lane Count $eDP_Link_PreEmp_10 4 bits ; Panel #10 Link Pre-emphasis $eDP_Link_Vswing_10 4 bits ; Panel #10 Link Voltage Swing -$eDP_Link_DataRate_11 4 bits ; Panel #11 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #11 Link Data Rate $eDP_Link_LaneCount_11 4 bits ; Panel #11 Link Lane Count $eDP_Link_PreEmp_11 4 bits ; Panel #11 Link Pre-emphasis $eDP_Link_Vswing_11 4 bits ; Panel #11 Link Voltage Swing -$eDP_Link_DataRate_12 4 bits ; Panel #12 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #12 Link Data Rate $eDP_Link_LaneCount_12 4 bits ; Panel #12 Link Lane Count $eDP_Link_PreEmp_12 4 bits ; Panel #12 Link Pre-emphasis $eDP_Link_Vswing_12 4 bits ; Panel #12 Link Voltage Swing -$eDP_Link_DataRate_13 4 bits ; Panel #13 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #13 Link Data Rate $eDP_Link_LaneCount_13 4 bits ; Panel #13 Link Lane Count $eDP_Link_PreEmp_13 4 bits ; Panel #13 Link Pre-emphasis $eDP_Link_Vswing_13 4 bits ; Panel #13 Link Voltage Swing -$eDP_Link_DataRate_14 4 bits ; Panel #14 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #14 Link Data Rate $eDP_Link_LaneCount_14 4 bits ; Panel #14 Link Lane Count $eDP_Link_PreEmp_14 4 bits ; Panel #14 Link Pre-emphasis $eDP_Link_Vswing_14 4 bits ; Panel #14 Link Voltage Swing -$eDP_Link_DataRate_15 4 bits ; Panel #15 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #15 Link Data Rate $eDP_Link_LaneCount_15 4 bits ; Panel #15 Link Lane Count $eDP_Link_PreEmp_15 4 bits ; Panel #15 Link Pre-emphasis $eDP_Link_Vswing_15 4 bits ; Panel #15 Link Voltage Swing -$eDP_Link_DataRate_16 4 bits ; Panel #16 Link Data Rate +SKIP 4 bits ; Obsolete. Panel #16 Link Data Rate $eDP_Link_LaneCount_16 4 bits ; Panel #16 Link Lane Count $eDP_Link_PreEmp_16 4 bits ; Panel #16 Link Pre-emphasis $eDP_Link_Vswing_16 4 bits ; Panel #16 Link Voltage Swing @@ -1500,6 +1501,23 @@ $eDP_Dpcd_Backlight_16 4 bytes ; Panel #16 Apical specifi $eDP_Ambient_Light_16 4 bytes ; Panel #16 Apical specific Ambient light $eDP_Backlight_Scale_16 4 bytes ; Panel #16 Apical specific backlight scale value +$eDP_Fast_Link_Training_Data_Rate_01 2 bytes ; Panel #01 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_02 2 bytes ; Panel #02 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_03 2 bytes ; Panel #03 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_04 2 bytes ; Panel #04 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_05 2 bytes ; Panel #05 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_06 2 bytes ; Panel #06 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_07 2 bytes ; Panel #07 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_08 2 bytes ; Panel #08 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_09 2 bytes ; Panel #09 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_10 2 bytes ; Panel #10 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_11 2 bytes ; Panel #11 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_12 2 bytes ; Panel #12 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_13 2 bytes ; Panel #13 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_14 2 bytes ; Panel #14 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_15 2 bytes ; Panel #15 Data Rate for Fast Link Training in unit of 200KHz +$eDP_Fast_Link_Training_Data_Rate_16 2 bytes ; Panel #16 Data Rate for Fast Link Training in unit of 200KHz + ;============================================================================== ; Block 28 - EDID-less EFP support - Panel data ;------------------------------------------------------------------------------ @@ -1529,7 +1547,7 @@ SKIP 30 bytes ; Skip Removed displays ta SKIP 3 bytes ; Skip block ID and size $bmp_Panel_type 1 byte ; Flat panel type -SKIP 1 byte ; Obsoleted +SKIP 1 byte ; Obsolete SKIP 6 bits ; Skip bits 0:5 of bmp_LVDS_Capabilities $bmp_Panel_EDID 1 bit ; LVDS panel EDID enable/disable bit SKIP 1 bit ; Skip bit 7 of bmp_LVDS_Capabilities @@ -1614,6 +1632,23 @@ $LcdVcc_On_During_S0_State_14 1 bit ; Enable flag to keep LCDV $LcdVcc_On_During_S0_State_15 1 bit ; Enable flag to keep LCDVCC on during S0 state bit for panel #15 $LcdVcc_On_During_S0_State_16 1 bit ; Enable flag to keep LCDVCC on during S0 state bit for panel #16 +$Panel_Rotation_01 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_02 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_03 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_04 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_05 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_06 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_07 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_08 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_09 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_10 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_11 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_12 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_13 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_14 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_15 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. +$Panel_Rotation_16 2 bits ; 00 = 0 Degree, 01 = 90 Degree, 10 = 180 Degree, 11 = 270 Degree. + ;============================================================================== ; Block 41 - Flat Panel Data Tables Pointers ;------------------------------------------------------------------------------ @@ -2178,18 +2213,200 @@ $Lfp_Pwm_Controller_Selection_16 4 bits ; Pwm Controller Selection SKIP 3 bytes ; Skip block ID and size -SKIP 1 bit ; Reserved -$BIA_Aggress_Level 3 bits ; Power Conservation Preference level -SKIP 1 bit ; Reserved -$LACE_Enabled_Status 1 bit ; Default Display LACE enabled status -$Display_LACE_Support 1 bit ; Display LACE support -SKIP 1 bit ; ALS Enable +SKIP 1 byte ; Obsolete. + ALIGN $ALS_Response_Data 20 bytes ; ALS Response Data -$Agressiveness_Profile 3 bits ; Display LACE aggressiveness level profile +SKIP 3 bits ; Obsolete. SKIP 5 bits ; Reserved + +$DPST_Enable_01 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #01. +$DPST_Enable_02 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #02. +$DPST_Enable_03 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #03. +$DPST_Enable_04 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #04. +$DPST_Enable_05 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #05. +$DPST_Enable_06 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #06. +$DPST_Enable_07 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #07. +$DPST_Enable_08 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #08. +$DPST_Enable_09 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #09. +$DPST_Enable_10 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #10. +$DPST_Enable_11 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #11. +$DPST_Enable_12 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #12. +$DPST_Enable_13 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #13. +$DPST_Enable_14 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #14. +$DPST_Enable_15 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #15. +$DPST_Enable_16 1 bit ; Intel® Display Power Saving Technology (DPST) Enable/Disable Flag for Panel #16. + +$PSR_Enable_01 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #01. +$PSR_Enable_02 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #02. +$PSR_Enable_03 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #03. +$PSR_Enable_04 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #04. +$PSR_Enable_05 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #05. +$PSR_Enable_06 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #06. +$PSR_Enable_07 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #07. +$PSR_Enable_08 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #08. +$PSR_Enable_09 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #09. +$PSR_Enable_10 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #10. +$PSR_Enable_11 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #11. +$PSR_Enable_12 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #12. +$PSR_Enable_13 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #13. +$PSR_Enable_14 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #14. +$PSR_Enable_15 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #15. +$PSR_Enable_16 1 bit ; Panel Self refresh feature (PSR) Enable/Disable Flag for Panel #16. + +$DRRS_Enable_01 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #01. +$DRRS_Enable_02 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #02. +$DRRS_Enable_03 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #03. +$DRRS_Enable_04 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #04. +$DRRS_Enable_05 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #05. +$DRRS_Enable_06 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #06. +$DRRS_Enable_07 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #07. +$DRRS_Enable_08 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #08. +$DRRS_Enable_09 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #09. +$DRRS_Enable_10 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #10. +$DRRS_Enable_11 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #11. +$DRRS_Enable_12 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #12. +$DRRS_Enable_13 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #13. +$DRRS_Enable_14 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #14. +$DRRS_Enable_15 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #15. +$DRRS_Enable_16 1 bit ; Intel® Display Refresh Rate Switching (DRRS) Enable/Disable Flag for Panel #16. + +$LACE_Enable_01 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #01. +$LACE_Enable_02 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #02. +$LACE_Enable_03 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #03. +$LACE_Enable_04 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #04. +$LACE_Enable_05 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #05. +$LACE_Enable_06 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #06. +$LACE_Enable_07 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #07. +$LACE_Enable_08 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #08. +$LACE_Enable_09 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #09. +$LACE_Enable_10 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #10. +$LACE_Enable_11 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #11. +$LACE_Enable_12 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #12. +$LACE_Enable_13 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #13. +$LACE_Enable_14 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #14. +$LACE_Enable_15 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #15. +$LACE_Enable_16 1 bit ; Display LACE Support Feature Enable/Disable Flag for Panel #16. + + +$ADT_Enable_01 1 bit ; Assertive display technology enable/disable for Panel #01. +$ADT_Enable_02 1 bit ; Assertive display technology enable/disable for Panel #02. +$ADT_Enable_03 1 bit ; Assertive display technology enable/disable for Panel #03. +$ADT_Enable_04 1 bit ; Assertive display technology enable/disable for Panel #04. +$ADT_Enable_05 1 bit ; Assertive display technology enable/disable for Panel #05. +$ADT_Enable_06 1 bit ; Assertive display technology enable/disable for Panel #06. +$ADT_Enable_07 1 bit ; Assertive display technology enable/disable for Panel #07. +$ADT_Enable_08 1 bit ; Assertive display technology enable/disable for Panel #08. +$ADT_Enable_09 1 bit ; Assertive display technology enable/disable for Panel #09. +$ADT_Enable_10 1 bit ; Assertive display technology enable/disable for Panel #10. +$ADT_Enable_11 1 bit ; Assertive display technology enable/disable for Panel #11. +$ADT_Enable_12 1 bit ; Assertive display technology enable/disable for Panel #12. +$ADT_Enable_13 1 bit ; Assertive display technology enable/disable for Panel #13. +$ADT_Enable_14 1 bit ; Assertive display technology enable/disable for Panel #14. +$ADT_Enable_15 1 bit ; Assertive display technology enable/disable for Panel #15. +$ADT_Enable_16 1 bit ; Assertive display technology enable/disable for Panel #16. + +$DMRRS_Enable_01 1 bit ; Dynamic media refresh rate enable/disable for Panel #01. +$DMRRS_Enable_02 1 bit ; Dynamic media refresh rate enable/disable for Panel #02. +$DMRRS_Enable_03 1 bit ; Dynamic media refresh rate enable/disable for Panel #03. +$DMRRS_Enable_04 1 bit ; Dynamic media refresh rate enable/disable for Panel #04. +$DMRRS_Enable_05 1 bit ; Dynamic media refresh rate enable/disable for Panel #05. +$DMRRS_Enable_06 1 bit ; Dynamic media refresh rate enable/disable for Panel #06. +$DMRRS_Enable_07 1 bit ; Dynamic media refresh rate enable/disable for Panel #07. +$DMRRS_Enable_08 1 bit ; Dynamic media refresh rate enable/disable for Panel #08. +$DMRRS_Enable_09 1 bit ; Dynamic media refresh rate enable/disable for Panel #09. +$DMRRS_Enable_10 1 bit ; Dynamic media refresh rate enable/disable for Panel #10. +$DMRRS_Enable_11 1 bit ; Dynamic media refresh rate enable/disable for Panel #11. +$DMRRS_Enable_12 1 bit ; Dynamic media refresh rate enable/disable for Panel #12. +$DMRRS_Enable_13 1 bit ; Dynamic media refresh rate enable/disable for Panel #13. +$DMRRS_Enable_14 1 bit ; Dynamic media refresh rate enable/disable for Panel #14. +$DMRRS_Enable_15 1 bit ; Dynamic media refresh rate enable/disable for Panel #15. +$DMRRS_Enable_16 1 bit ; Dynamic media refresh rate enable/disable for Panel #16. + +$ADB_Enable_01 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #01. +$ADB_Enable_02 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #02. +$ADB_Enable_03 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #03. +$ADB_Enable_04 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #04. +$ADB_Enable_05 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #05. +$ADB_Enable_06 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #06. +$ADB_Enable_07 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #07. +$ADB_Enable_08 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #08. +$ADB_Enable_09 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #09. +$ADB_Enable_10 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #10. +$ADB_Enable_11 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #11. +$ADB_Enable_12 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #12. +$ADB_Enable_13 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #13. +$ADB_Enable_14 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #14. +$ADB_Enable_15 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #15. +$ADB_Enable_16 1 bit ; Intel® Automatic Display Brightness (ADB) Enable/Disable Flag for Panel #16. + +$LACE_Status_01 1 bit ;Default Display LACE Status enable/disable Flag for Panel #01. +$LACE_Status_02 1 bit ;Default Display LACE Status enable/disable Flag for Panel #02. +$LACE_Status_03 1 bit ;Default Display LACE Status enable/disable Flag for Panel #03. +$LACE_Status_04 1 bit ;Default Display LACE Status enable/disable Flag for Panel #04. +$LACE_Status_05 1 bit ;Default Display LACE Status enable/disable Flag for Panel #05. +$LACE_Status_06 1 bit ;Default Display LACE Status enable/disable Flag for Panel #06. +$LACE_Status_07 1 bit ;Default Display LACE Status enable/disable Flag for Panel #07. +$LACE_Status_08 1 bit ;Default Display LACE Status enable/disable Flag for Panel #08. +$LACE_Status_09 1 bit ;Default Display LACE Status enable/disable Flag for Panel #09. +$LACE_Status_10 1 bit ;Default Display LACE Status enable/disable Flag for Panel #10. +$LACE_Status_11 1 bit ;Default Display LACE Status enable/disable Flag for Panel #11. +$LACE_Status_12 1 bit ;Default Display LACE Status enable/disable Flag for Panel #12. +$LACE_Status_13 1 bit ;Default Display LACE Status enable/disable Flag for Panel #13. +$LACE_Status_14 1 bit ;Default Display LACE Status enable/disable Flag for Panel #14. +$LACE_Status_15 1 bit ;Default Display LACE Status enable/disable Flag for Panel #15. +$LACE_Status_16 1 bit ;Default Display LACE Status enable/disable Flag for Panel #16. + +$DPST_Aggressiveness_Profile_01 4 bits ;DPST Aggressiveness profile Input Selection for Panel #01. +$LACE_Aggressiveness_Profile_01 4 bits ;Lace Aggressiveness profile Input Selection for Panel #01. + +$DPST_Aggressiveness_Profile_02 4 bits ;DPST Aggressiveness profile Input Selection for Panel #02. +$LACE_Aggressiveness_Profile_02 4 bits ;Lace Aggressiveness profile Input Selection for Panel #02. + +$DPST_Aggressiveness_Profile_03 4 bits ;DPST Aggressiveness profile Input Selection for Panel #03. +$LACE_Aggressiveness_Profile_03 4 bits ;Lace Aggressiveness profile Input Selection for Panel #03. + +$DPST_Aggressiveness_Profile_04 4 bits ;DPST Aggressiveness profile Input Selection for Panel #04. +$LACE_Aggressiveness_Profile_04 4 bits ;Lace Aggressiveness profile Input Selection for Panel #04. + +$DPST_Aggressiveness_Profile_05 4 bits ;DPST Aggressiveness profile Input Selection for Panel #05. +$LACE_Aggressiveness_Profile_05 4 bits ;Lace Aggressiveness profile Input Selection for Panel #05. + +$DPST_Aggressiveness_Profile_06 4 bits ;DPST Aggressiveness profile Input Selection for Panel #06. +$LACE_Aggressiveness_Profile_06 4 bits ;Lace Aggressiveness profile Input Selection for Panel #06. + +$DPST_Aggressiveness_Profile_07 4 bits ;DPST Aggressiveness profile Input Selection for Panel #07. +$LACE_Aggressiveness_Profile_07 4 bits ;Lace Aggressiveness profile Input Selection for Panel #07. + +$DPST_Aggressiveness_Profile_08 4 bits ;DPST Aggressiveness profile Input Selection for Panel #08. +$LACE_Aggressiveness_Profile_08 4 bits ;Lace Aggressiveness profile Input Selection for Panel #08. + +$DPST_Aggressiveness_Profile_09 4 bits ;DPST Aggressiveness profile Input Selection for Panel #09. +$LACE_Aggressiveness_Profile_09 4 bits ;Lace Aggressiveness profile Input Selection for Panel #09. + +$DPST_Aggressiveness_Profile_10 4 bits ;DPST Aggressiveness profile Input Selection for Panel #10. +$LACE_Aggressiveness_Profile_10 4 bits ;Lace Aggressiveness profile Input Selection for Panel #10. + +$DPST_Aggressiveness_Profile_11 4 bits ;DPST Aggressiveness profile Input Selection for Panel #11. +$LACE_Aggressiveness_Profile_11 4 bits ;Lace Aggressiveness profile Input Selection for Panel #11. + +$DPST_Aggressiveness_Profile_12 4 bits ;DPST Aggressiveness profile Input Selection for Panel #12. +$LACE_Aggressiveness_Profile_12 4 bits ;Lace Aggressiveness profile Input Selection for Panel #12. + +$DPST_Aggressiveness_Profile_13 4 bits ;DPST Aggressiveness profile Input Selection for Panel #13. +$LACE_Aggressiveness_Profile_13 4 bits ;Lace Aggressiveness profile Input Selection for Panel #13. + +$DPST_Aggressiveness_Profile_14 4 bits ;DPST Aggressiveness profile Input Selection for Panel #14. +$LACE_Aggressiveness_Profile_14 4 bits ;Lace Aggressiveness profile Input Selection for Panel #14. + +$DPST_Aggressiveness_Profile_15 4 bits ;DPST Aggressiveness profile Input Selection for Panel #15. +$LACE_Aggressiveness_Profile_15 4 bits ;Lace Aggressiveness profile Input Selection for Panel #15. + +$DPST_Aggressiveness_Profile_16 4 bits ;DPST Aggressiveness profile Input Selection for Panel #16. +$LACE_Aggressiveness_Profile_16 4 bits ;Lace Aggressiveness profile Input Selection for Panel #16. + ;============================================================================== ; Block 46 - Chromaticity Support ;------------------------------------------------------------------------------ @@ -2709,9 +2926,9 @@ List &Inv_Polarity_List Selection 0x01, "Inverted" EndList -List &LVDS_Config_List - Selection 0x00, "No Local Flat Panel" - Selection 0x03, "eDP (LFP Driven by Int-DisplayPort Encoder)" +List &LFP_Config_List + Selection 0x0000, "No Local Flat Panel" + Selection 0x1806, "eDP (LFP Driven by Int-DisplayPort Encoder)" EndList List &No_Yes_List @@ -2741,6 +2958,13 @@ List &eDP_Panel_Color_Depth_List Selection 0x03, "36-bit Color Depth" EndList +List &Panel_Rotation_List + Selection 0x00, " 0 Degree" + ;Selection 0x01, " 90 Degree" + Selection 0x02, "180 Degree" + ;Selection 0x03, "270 Degree" +EndList + List &eDP_Link_DataRate_List Selection 0x00, "1.62 Gbps" Selection 0x01, "2.70 Gbps" @@ -2796,6 +3020,7 @@ List &Panel_List Selection 0x0D, "PANEL #14" Selection 0x0E, "PANEL #15" Selection 0x0F, "PANEL #16" + Selection 0xFF, "PANEL #FF" EndList List &eDP_VSwing_Preemph_table_List @@ -2835,7 +3060,7 @@ EndList List &wait_line_link Selection 0x00, "0 lines to wait" - Selection 0x01, "2 lines to wait" + Selection 0x01, "1 lines to wait" Selection 0x02, "4 lines to wait" Selection 0x03, "8 lines to wait" EndList @@ -2883,7 +3108,6 @@ List &Dp_Port_Trace_Length_List Selection 0x1, "Short trace length" Selection 0x2, "Long trace length" EndList - ;============================================================================== ; Page Definitions ;------------------------------------------------------------------------------ @@ -2898,9 +3122,9 @@ EndInfoBlock ;------------------------------------------------------------------------------ Page "VBT Information" Title "PLATFORM : Skylake/Kabylake" - Title "VBT version: 221" + Title "VBT version: 228" - #IF $LVDS_Config == 3 + #IF ($LFP_Device_Class == 0x1806) Title "Supported LFP type: eDP" #ELSE Title "Supported LFP type: No LFP" @@ -3157,15 +3381,10 @@ Page "Windows Graphics driver Configuration" Help "This feature determines the validity of the following PC Features Control Options.\r\n\r\n" "1. Intel® Rapid Memory Power Management (RMPM)\r\n" "2. Intel® Smart 2D Display Technology (S2DDT)\r\n" - "3. Intel® Display Power Saving Technology (DPST) (Mobile only)\r\n" - "4. DxgkDDI Backlight Control (DxgkDdiBLC) (Mobile only)\r\n" - "5. Intel® Automatic Display Brightness (ADB) (Mobile only)\r\n" - "6. Intel® Display Refresh Rate Switching (DRRS) (Mobile only)\r\n" - "7. Graphics Render Standby (RS)\r\n" - "8. Intel® Turbo Boost Technology\r\n" - "9. Dynamic Frames Per Second (DFPS)\r\n" - "10. Dynamic Media Refresh Rate Switching (DMRRS)\r\n" - "11. Assertive Display Technology (ADT)\r\n\r\n" + "3. DxgkDDI Backlight Control (DxgkDdiBLC) (Mobile only)\r\n" + "4. Graphics Render Standby (RS)\r\n" + "5. Intel® Turbo Boost Technology\r\n" + "6. Dynamic Frames Per Second (DFPS)\r\n" "Note: Enable and Save the changes to display all the PC Features Control Options\r\n" Combo $PM_RMPM_Enable, "\tIntel® Rapid Memory Power Management (RMPM)", &Disabled_Enabled_List, @@ -3174,58 +3393,18 @@ Page "Windows Graphics driver Configuration" Combo $PM_S2DDT_Enable, "\tIntel® Smart 2D Display Technology (S2DDT)", &Disabled_Enabled_List, Help "This feature determines whether Intel® Smart 2D Display Technology (S2DDT) is to be enabled. " - Combo $PM_DPST_Enable, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, - Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " - "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." - "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " - "the LFP is the only active display device." - - Combo $BIA_Aggress_Level, "\t\tDPST Aggressiveness Level (Mobile only)", &Pwr_Pref_List, - Help "This feature defines the Intel® Display Power Saving Technology aggressiveness level if and only if " - "the feature Intel® Display Power Saving Technology is enabled." - "\r\n\r\nThe following are the definitions for each level:" - "\r\n1 - Maximum Quality - shall use no DPST " - "\r\n2 - Provides the user the maximum brightness for their embedded Local Flat Panel (LFP)while DPST is in use" - "\r\n3 - This level defines maximum amount of brightness with minimal power savings" - "\r\n4 - This level defines an intermediate value for brightness amount" - "\r\n5 - This level defines an intermediate value for the brightness amount" - "\r\n6 - Maximum Battery - Provided the user with the minimum amount of " - "brightness capable for their LFP with the maximum power savings" - Combo $PM_BLC_Enable, "\tDxgkDDI Brightness Control Method (Mobile only)", &Disabled_Enabled_List, Help "This option determines whether the Vista, Win7, and future version DxgkDDI LFP Brightness Control method is to be enabled. " - Combo $PM_ADB_Enable, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, - Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " - "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " - "depending on the current ambient light environment. " - "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " - "depending on the ambient environment if and only if the LFP is the only active display. " - "When disabled, the driver will perform no action." - - Link "ADB Response Data (Mobile only)" , "ADB Response Data (Mobile only)" - - Combo $PM_DRRS_Enable, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, - Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." - Combo $PM_RS_Enable, "\tGraphics Render Standby (RS)", &Disabled_Enabled_List, Help "This feature determines whether Graphics Render Standby (RS)is to be enabled." Combo $PM_Turbo_Enable, "\tIntel® Turbo Boost Technology", &Disabled_Enabled_List, Help "This feature determines whether Intel® Turbo Boost Technology is to be enabled." - Combo $Panel_Self_Refresh, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, - Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." - Combo $Dynamic_FPS_Enable, "\tDynamic Frames Per Second (DFPS)", &Disabled_Enabled_List, Help "This feature determines whether Dynamic Frames Per Second is to be enabled." - Combo $DMRRS, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, - Help "This feature determines whether Dynamic media refresh rate switching is to be enabled." - - Combo $ADT, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, - Help "This feature determines whether Assertive display technology is to be enabled. " - Page "ADB Response Data (Mobile only)" Link "Close Table" , ".." @@ -3257,7 +3436,7 @@ Page "Integrated Display Configuration" Page "LFP Configuration" Link "Close Table", ".." - Combo $LVDS_Config , "Active Local Flat Panel Configuration", &LVDS_Config_List, + Combo $LFP_Device_Class , "Active Local Flat Panel Configuration", &LFP_Config_List, Help "This feature is for configuring LFP usage.\r\n" "Note: To enable 4 lane eDP panels, make sure that the EFP4 settings in VBT has no device." @@ -3273,7 +3452,9 @@ Page "Integrated Display Configuration" Title " " Combo $bmp_Panel_type, "Select Panel Type:", &Panel_List, - Help "This feature selects the Local Flat Panel (LFP) the GOP and driver is to enable.\r\n\r\n" + Help "Select the Local Flat Panel (LFP) which display driver will enable.\r\n\r\n" + "If panel type is selected as 0xFF, Graphics Software will populate panel index by comparing actual PNP ID Data from panel to that of PNP ID Data for each panel in VBT." + "The panel index for which PNP ID Data matches with actual connected panel PNP ID Data is used by driver for all further references. EDID Read is assumed to be enabled if panel index is selected as 0xFF." "Default LFP parameter values:\r\n" "\tPANEL #01: 640x480 LFP\r\n" "\tPANEL #02: 800x600 LFP\r\n" @@ -3310,10 +3491,6 @@ Page "Integrated Display Configuration" Help "This field is applicable only if IBoost is enabled for the selected port." "The IBoost magnitude levels supported on SKL/KBL are 0x1, 0x3, 0x7" - Combo $180_Deg_Rotation_Enable, "Enable 180 Degree Rotation:", &No_Yes_List, - Help "This feature when set to yes, will enable 180 Degree rotation " - "otherwise, the rotation functionality will be disabled." - Combo $Int_LFP_Dual_Pipe_Ganged_Enable, "Dual Port Ganged Support for eDP: ", &Disabled_Enabled_List, Help "This feature allows for configuring two different ports to be used for a single eDP panel.\n" "When enabled, the end user can specify a slave port to be connected along with DDI-A to enable a higher resolution eDP panel.\n" @@ -3380,6 +3557,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_01, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_01, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC01, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -3400,7 +3580,6 @@ Page "Integrated Display Configuration" Help "This feature allows OEM to select the Backlight Technology." Title " " - Link "Panel Power Sequencing Parameters Table" , "Panel Power Sequencing" Link "DTD Timings Table" , "DTD Timings" Link "LFP PnP ID Table" , "LFP PnP ID" @@ -3409,6 +3588,7 @@ Page "Integrated Display Configuration" Link "Chromaticity Control" , "Chromaticity Control" Link "PSR feature" , "PSR feature" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -3643,8 +3823,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_01, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_01, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_01, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_01, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -3682,7 +3862,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_01, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -3724,6 +3904,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_01, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_01, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_01, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_01, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_01, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_01, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_01, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_01, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_01, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_01, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_01, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ; Panel #01 ;============================================================================== @@ -3764,6 +3997,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_02, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_02, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC02, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -3792,6 +4028,7 @@ Page "Integrated Display Configuration" Link "Chromaticity Control" , "Chromaticity Control" Link "PSR feature" ,"PSR feature" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -4026,8 +4263,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_02, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_02, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_02, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_02, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -4065,7 +4302,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_02, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -4107,6 +4344,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_02, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_02, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_02, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_02, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_02, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_02, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_02, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_02, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_02, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_02, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_02, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -4147,6 +4437,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_03, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_03, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC03, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -4175,6 +4468,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -4408,8 +4702,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_03, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_03, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_03, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_03, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -4447,7 +4741,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_03, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -4489,6 +4783,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_03, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_03, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_03, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_03, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_03, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_03, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_03, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_03, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_03, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_03, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_03, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -4529,6 +4876,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_04, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_04, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC04, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -4557,6 +4907,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -4791,8 +5142,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_04, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_04, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_04, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_04, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -4830,7 +5181,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_04, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -4872,6 +5223,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_04, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_04, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_04, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_04, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_04, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_04, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_04, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_04, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_04, "\tDefault Display LACE Enabled status :", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_04, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST )\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_04, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Agressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -4912,6 +5316,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_05, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_05, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC05, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -4940,6 +5347,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -5174,8 +5582,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_05, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_05, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_05, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_05, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -5213,7 +5621,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_05, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -5256,6 +5664,59 @@ Page "Integrated Display Configuration" Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_05, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_05, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_05, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_05, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_05, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_05, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_05, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_05, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + + Combo $DPST_Aggressiveness_Profile_05, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_05, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -5296,6 +5757,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_06, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_06, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC06, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -5317,7 +5781,6 @@ Page "Integrated Display Configuration" Title " " Link "PSR feature" ,"PSR feature" - Link "Panel Power Sequencing Parameters Table" , "Panel Power Sequencing" Link "DTD Timings Table" , "DTD Timings" Link "LFP PnP ID Table" , "LFP PnP ID" @@ -5325,6 +5788,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -5558,8 +6022,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_06, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_06, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_06, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_06, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -5597,7 +6061,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_06, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -5639,6 +6103,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_06, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_06, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_06, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_06, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_06, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_06, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_06, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_06, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_06, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_06, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_06, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -5679,6 +6196,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_07, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_07, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC07, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -5707,6 +6227,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -5940,8 +6461,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_07, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_07, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_07, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_07, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -5979,7 +6500,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_07, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -6021,6 +6542,60 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_07, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_07, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_07, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_07, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_07, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_07, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_07, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_07, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_07, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + + Combo $DPST_Aggressiveness_Profile_07, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type. \n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery) " + + Combo $LACE_Aggressiveness_Profile_07, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Agressiveness level for this Panel Type. \n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -6061,6 +6636,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_08, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_08, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC08, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -6089,6 +6667,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -6323,8 +6902,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_08, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_08, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_08, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_08, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -6362,7 +6941,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_08, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -6404,6 +6983,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_08, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_08, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_08, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_08, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_08, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled." + + Combo $ADT_Enable_08, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_08, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_08, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_08, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_08, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_08, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Agressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -6444,6 +7076,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_09, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_09, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC09, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -6472,6 +7107,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -6705,8 +7341,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_09, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_09, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_09, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_09, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -6744,7 +7380,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_09, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -6786,6 +7422,60 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_09, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_09, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_09, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_09, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_09, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_09, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_09, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_09, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_09, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + + Combo $DPST_Aggressiveness_Profile_09, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_09, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Agressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -6826,6 +7516,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_10, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_10, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC10, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -6854,6 +7547,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -7087,8 +7781,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_10, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_10, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_10, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_10, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -7126,7 +7820,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_10, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -7168,6 +7862,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_10, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_10, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_10, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_10, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_10, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_10, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_10, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_10, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_10, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_10, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_10, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -7208,6 +7955,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_11, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_11, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC11, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -7236,6 +7986,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -7469,8 +8220,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_11, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_11, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_11, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_11, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -7508,7 +8259,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_11, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -7550,6 +8301,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_11, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_11, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_11, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_11, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_11, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_11, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_11, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_11, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_11, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_11, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST )\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_11, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -7590,6 +8394,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_12, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_12, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC12, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -7618,6 +8425,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -7852,8 +8660,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_12, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_12, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_12, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_12, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -7891,7 +8699,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_12, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -7933,6 +8741,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_12, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_12, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_12, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_12, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_12, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_12, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_12, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled." + + Combo $ADB_Enable_12, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_12, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_12, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_12, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -7973,6 +8834,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_13, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_13, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC13, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -8001,6 +8865,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -8235,8 +9100,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_13, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_13, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_13, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_13, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -8274,7 +9139,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_13, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -8316,6 +9181,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_13, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_13, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_13, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_13, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_13, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_13, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_13, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_13, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_13, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_13, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_13, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -8356,6 +9274,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_14, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_14, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC14, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -8384,6 +9305,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -8617,8 +9539,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_14, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_14, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_14, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_14, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -8656,7 +9578,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_14, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -8698,6 +9620,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_14, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_14, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_14, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_14, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_14, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_14, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_14, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_14, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_14, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_14, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_14, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Agressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -8738,6 +9713,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_15, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_15, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC15, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -8766,6 +9744,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -9000,8 +9979,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_15, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_15, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_15, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_15, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -9039,7 +10018,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_15, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -9081,6 +10060,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_15, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_15, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_15, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_15, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_15, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_15, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_15, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_15, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_15, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_15, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_15, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ;============================================================================== @@ -9121,6 +10153,9 @@ Page "Integrated Display Configuration" Combo $eDP_Panel_Color_Depth_16, "Panel Color Depth:", &eDP_Panel_Color_Depth_List, Help "This feature specifies the color depth of eDP panel used." + Combo $Panel_Rotation_16, "Panel Rotation:", &Panel_Rotation_List, + Help "This feature specifies the Panel Rotation of eDP panel used." + TitleB "eDP Spread Spectrum Clock Features" Combo $Enable_SSC16, "\teDP Spread Spectrum Clock:", &Disabled_Enabled_List, Help "This feature will allow users to disable/enable Spread Spectrum Clock for eDP." @@ -9149,6 +10184,7 @@ Page "Integrated Display Configuration" Link "eDP Link Training Configuration Parameters" , "eDP Link Training Configuration Parameters" Link "Chromaticity Control" , "Chromaticity Control" Link "Apical Feature" , "Apical Feature" + Link "Power Features" , "Power Features" Page "Panel Power Sequencing" Link "Close Table", ".." @@ -9383,8 +10419,8 @@ Page "Integrated Display Configuration" Combo $eDP_Fast_Link_Training_Supported_16, "\tIs FastLinkTraining Feature Supported:", &No_Yes_List, Help "This feature allows for the selection of the Fast Link Training feature is to be enabled or disabled." - Combo $eDP_Link_DataRate_16, "\tData Rate:", &eDP_Link_DataRate_List, - Help "This feature allows for the selection of the Data Rate for the embedded DP link. " + EditNum $eDP_Fast_Link_Training_Data_Rate_16, "\tData Rate:", DEC, + Help "This field specifies Data Rate to be used for Fast Link Training in unit of 200KHz for the embedded DP link. " "It will be used if the sink indicates that no aux handshake is required during link training." Combo $eDP_Link_LaneCount_16, "\tLane Count:", &eDP_Link_LaneCount_List, @@ -9422,7 +10458,7 @@ Page "Integrated Display Configuration" Combo $PSR_Lines2Wait_B4LinkS3_16, "Lines to wait before link standby:", &wait_line_link, Help "This field determines Lines to wait before link standby \n" " 0 lines to wait (Default)\r\n" - " 2 lines to wait\r\n" + " 1 lines to wait\r\n" " 4 lines to wait\r\n" " 8 lines to wait\r\n" " Others Reserved" @@ -9464,6 +10500,59 @@ Page "Integrated Display Configuration" EditNum $eDP_Backlight_Scale_16, "\tBacklight scale", EHEX, Help "This field specifies the Apical IP specific backlight scale field." EndPage ; Apical Feature + + Page "Power Features" + Link "Close Table" , ".." + + Combo $DPST_Enable_16, "\tIntel® Display Power Saving Technology (DPST) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether the Intel® Display Power Savings Technology (DPST) is enabled or disabled. " + "Intel® DPST is a display power savings technology that changes the intensity of colors in order to conserve backlight power." + "\r\n\r\nNote: This technology is only active when the system is running in battery mode and " + "the LFP is the only active display device." + + Combo $PSR_Enable_16, "\tPanel Self Refresh (PSR)", &Disabled_Enabled_List, + Help "This feature determines whether Panel Self Refresh (PSR) feature is to be enabled." + + Combo $DRRS_Enable_16, "\tIntel® Display Refresh Rate Switching (DRRS) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Display Refresh Rate Switching (DRRS) is to be enabled." + + Combo $LACE_Enable_16, "\tEnable Display Lace Support", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Display Lace Support " + "otherwise, the functionality will be disabled. " + + Combo $ADT_Enable_16, "\tAssertive Display Technology Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Assertive display technology is to be enabled. " + + Combo $DMRRS_Enable_16, "\tDynamic Media Refresh Rate Switching Enable/Disable", &Disabled_Enabled_List, + Help "This feature determines whether Dynamic media refresh rate switching is to be enabled. " + + Combo $ADB_Enable_16, "\tIntel® Automatic Display Brightness (ADB) (Mobile only)", &Disabled_Enabled_List, + Help "This feature determines whether Intel® Automatic Display Brightness is to be enabled. " + "Intel® Automatic Display Brightness adjusts the brightness of the embedded Local Flat Panel (LFP) " + "depending on the current ambient light environment. " + "When enabled, the driver and VBIOS will control the backlight brightness of the LFP " + "depending on the ambient environment if and only if the LFP is the only active display. " + "When disabled, the driver will perform no action." + + Combo $LACE_Status_16, "\tDefault Display LACE Enabled status", &Disabled_Enabled_List, + Help "This feature, when enabled, will set Default Display LACE Enabled status " + "otherwise, the functionality will be disabled." + + Combo $DPST_Aggressiveness_Profile_16, "\tDPST Aggressiveness Level", &Pwr_Pref_List, + Help "This feature allows for the selection of DPST Aggressiveness level for this Panel Type.\n" + "1 (Maximum Quality with No DPST)\n" + "2\n" + "3\n" + "4\n" + "5\n" + "6 (Maximum Battery)" + + Combo $LACE_Aggressiveness_Profile_16, "\tLACE Aggressiveness Level", &Aggressiveness_Level_Profile, + Help "This feature allows for the selection of LACE Aggressiveness level for this Panel Type.\n" + "Minimum 0\n" + "Moderate 1\n" + "High 2" + EndPage ; Power Features EndPage ; "Panel #16 " EndPage ; "LFP Configuration"