This reverts commit 14a10f746d.
This was a workaround and is being removed for appropriate
solution to synchronize time in safe mode for retimer and
TCSS mux.
BUG=b:166300460
BRANCH=none
TEST=none
Change-Id: I6d997caca59942a0bd14a987737997b48a1ede4f
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504477
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Fill in guybrush gpio.inc based on schematic. Add minimal implementation
required to get guybrush to build with gpio.inc filled in.
BUG=b:175056466
TEST=Build guybrush binary
BRANCH=None
Change-Id: I2f66cebb02e174661950ec277175f63f85896c9c
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578256
Reviewed-by: Diana Z <dzigterman@chromium.org>
This CL adds boards specific parts required to enable TCPMv2.0 for
both quiche and gingerbread. TCPMv2 configs are included, though, only
type-c support is being selected.
The reason for this intermediate point is an attempt to have more
manageable amounts of changes for CL reviews.
BUG=b:167601672
BRANCH=None
TEST=verfied type-c attaches properly on quiche
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2a4c3bf4089fb3e167d06921b177d8c4e61a021f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2215424
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
In OCPC, the charger_get_params() function will regularly be calling
charger_get_input_current_limit() with the active charger chip. This
may be CHARGE_PORT_NONE if the board is not currently charging. In
these cases, silently return an invalid status.
BRANCH=None
BUG=None
TEST=on drawcia, confirm no console spam with no active charger chip
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I9a6b85584488f9381b1e1b8d7527b7ebd68a75e0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2580838
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
The existing configuration code assumes that provided addresses are
at least as aligned as the requested size, which is not true on
NPCX797WC (and likely others) where RAM regions are only 64k-aligned
but have larger sizes (like 256k).
Use a new greedy approach to configuring the MPU which handles these
situations corrently: for any given request take the largest possible
chunk from the bottom of the memory region (subject to size and address
alignment). Maximize the space by aggressively using MPU subregions-
this means that in many well-aligned situations this algorithm selects a
larger region than the requested size and enables one subregion, but in
more difficult situations it is capable of enabling subregions with more
exotic positions.
BUG=b:169276765
BRANCH=zork
TEST=With a test harness to print out computed configurations, manually
verified the correctness of a variety taken from real chip
configurations (request first, MPU region(s) indented):
0x20000000 size 0x1000 # stm32f03x
0x20000000 size 0x8000 srd fe
0x20000000 size 0x2000 # stm32f03x
0x20000000 size 0x10000 srd fe
0x20000000 size 0x2800 # stm32l100
0x20000000 size 0x4000 srd e0
0x20000000 size 0x4000 # stm32f412
0x20000000 size 0x20000 srd fe
0x80000 size 0xc000 # it8320
0x80000 size 0x20000 srd f8
0xff200000 size 0xa0000 # ish5p4
0xff200000 size 0x100000 srd e0
0x200b0000 size 0x20000 # npcx797wb
0x20080000 size 0x80000 srd e7
0x10070000 size 0x40000 # npcx797wb
0x10000000 size 0x80000 srd 7f
0x10080000 size 0x80000 srd f8
0x200c0000 size 0x10000 # npcx796f
0x20080000 size 0x80000 srd ef
0x10090000 size 0x30000 # npcx796f
0x10080000 size 0x80000 srd f1
0x10090000 size 0x20
0x10090000 size 0x100 srd fe
Further verified MPU configuration with the new algorithm succeeds
on Dalboz, and test/mpu.c passes on Dragonclaw.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I71d8e2b37c7e20fc7a39166b90eea0b7f7ebcf43
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434601
Reviewed-by: Edward Hill <ecgh@chromium.org>
Fix a typo that crept into the Kconfig.
BRANCH=none
BUG=none
TEST=build for volteer
Change-Id: I57634da26ca94aba3b80d5f4c10d75b250a9ea2c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585064
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
berknip dali sku will control HPD to mst when detect USB-C device has DP
function, but when EC get attention command from device, HPD will
not set high or low as attention required, so mst hub will not
update display information when attach/de-attach display device
from hub/dock/dongle.
BUG=b:175163382
BRANCH=zork
TEST=verify OS will update display information when remove
display on hub/dock/dongle side.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I468692be11b41e914c66f6101f62a9c2a8a46262
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2581124
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Note that this CL updates the battery config on lantis. Also, we update
the comment in that lantis was initialed with drawcia's EC image.
BUG=b:175184763
BRANCH=dedede
TEST=Make sure battery charging, battery cutoff works.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: Id8ca23b3c17a09680fd1267624f7a1fc06fbfaf2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2581159
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Stub out returns of 0 and NULL for the source and sink cap pd_ APIs if
a board is not using the PE layer.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I32e74f3f29aacdf47aca9bc9d0664a4d799da3b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585749
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
If the partner reports it is dual-role in source capabilities, report
this to the charge manager so the UI may display it as a type-c charging
option, even if we're currently not sinking from this partner.
BRANCH=dedede
BUG=b:173166474
TEST=on waddledoo, DUT-DUT connections consistently result in the UI
presenting the USB-C charging option in the power menu
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I25f43c34a319961ffd49f040901b3dadd0c10d5e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2577834
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
The TC flags for the fixed PDO data are redundant with the stored PDOs
we have for both sources and sinks. Remove these and their callers.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If242d7f9b9210bccdcafedc97dbf89dd581797d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2576454
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Have the pd_ functions which query fixed PDO flags retrieve the fixed
PDO themselves, rather than going through stored TC flags. This reduces
the liklihood of problems with the flags getting out of sync, and
reflects our future goal of being able to provide the AP with the PDOs
directly for decision-making.
BRANCH=dedede
BUG=b:173166474
TEST=on waddledoo, perform many DUT-DUT connections and verify that the
other DUT will always show up as DR power and data in the "ectool usbpd"
output
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I4dd46f5ef4156377d11169545a541b11e60a2cf4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2576453
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Set up checking for interrupt line wedging, which may occur when
interrupts from the charger/TCPC occur with similar timing to the BC 1.2
interrupts.
BRANCH=dedede
BUG=b:143166332
TEST=on waddledoo, test multiple DUT-DUT connections and ensure neither
system wedges its interrupt line low
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id36de654c6af5c22801e3dee9446e35bf32cf63e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2576452
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
long-term, we need to pull this into hdctools, rather than reimplement
everything twice. Short term, this is a fine solution. It essentially
makes sure that
1. we only keep one pty/stm32uart/stm32usb object around for
communication
2. we always reset it properly when it could need a reset e.g. when the
stm32 is rebooting, or a new firmware was flashed
3. it expands the timeout for the chip to come back to 2s
the tiny_servod will eventually also land in hdctools, though for now it
just ensures that we can reset the pyusb communication without larger
issues and a larger refactor.
BUG=chromium:1152838
BRANCH=None
// Timeout before change, runs after change
TEST=sudo servo_updater --board servo_micro
// Timeout before change, runs after change
TEST=sudo servo_updater --board sweetberry
// Timeout before change, runs after change
TEST=sudo servo_updater --board servo_micro --force
// to show the serialname support. This is a fake serial, and it gets
stuck waiting
TEST=sudo servo_updater -s MICRO-S-2009020022 --board servo_micro
// to show the serialname support. This is a real serial and it proceeds
TEST=sudo servo_updater -s MICRO-S-2009020022 --board servo_micro
Change-Id: I747ca69881c13c1aadd8e90a35badecbf4e6a09e
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2580854
Reviewed-by: Otabek Kasimov <otabek@google.com>
Reviewed-by: Garry Wang <xianuowang@chromium.org>
Since the TCSS mux ignores the USB2.0, set it to 0
BUG=b:175119818
BRANCH=None
TEST=Able to set the USB2.0 bit to 0 in the BB retimer config register
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ia76ede10f9bdbf746a400816017e7d36b0790764
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2580455
Reviewed-by: Keith Short <keithshort@chromium.org>
Configure BB retimer first and then TCSS mux for the following boards
1. Adlrvpp
2. Boldar
3. Copano
4. Drobit
5. Halvor
6. Lingcod
7. Malefor
8. Terrador
9. Tglrvpu/y
10.Todor
11.Trondo
12.Volteer
13.Voxel
BUG=b:166300460
BRANCH=None
TEST=Able to configure the BB retimer before the TCSS mux
Change-Id: Ife3074e3f45f00d3263eb0c5c2bea713db67541b
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2506629
Reviewed-by: Keith Short <keithshort@chromium.org>
Sort the cmake file list by the config option name.
BRANCH=none
BUG=none
TEST=build and boot on volteer
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I0c66524b990bcc24ac3d19b260daf7ff070861cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582279
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
If cable supports TBT_SS_U32_GEN1 i.e. 10Gbps per lane, enable
entering USB4 mode
BUG=b:175139039
BRANCH=None
TEST=Able to enter into USB4 mode with Thunderbolt Gen 1 cables
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: I10684f96e8d6e67b1086fbc560ec372e7f5b6cba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2580851
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
This CL fixes an implicit config option assumption where a call from
the type C layer would expect a power role swap function to exist.
BUG=b:169299049
BRANCH=none
TEST=verify that can build with usbc support only enabled.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I0a674beb0f68d4a767303fee5e48221e205e0887
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2581886
Tested-by: Scott Collyer <scollyer@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
This reverts commit 92f55b092e.
Reason for revert: This breaks "pd X dev Y" console command
Original change's description:
> asurada: set input voltage to 9V when S5 with full battery
>
> The data in b:162467514#comment3 shows that 9V input has lowest
> power consumption in S5.
>
> This CL forces PD to select 9V when S5 with full battery.
>
> BUG=b:162467514
> TEST=Verify dut chooses 9V when in S5 and battery full, and
> chooses 15V in other states.
> BRANCH=none
>
> Signed-off-by: Ting Shen <phoenixshen@google.com>
> Change-Id: I36106f773ec4648bd0d9d5a75d75c8cbc7ee5c43
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2470378
> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
> Tested-by: Ting Shen <phoenixshen@chromium.org>
> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Bug: b:162467514
Change-Id: I6941ccc4827bc9ab8a8eb167c5d88ebaf8686694
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582434
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Exposes PMU-related functions so that we can call the functions to study
some part of cache performance.
BRANCH=none
BUG=b:172988651
TEST=make BOARD=asurada_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: I27182e3d2af52d8761f45359f3627d70c5acf28c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567517
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
This patch makes PCHG send EC_HOST_EVENT_DEVICE on every state
machine cycle. The host is expected to retrieve the device
event mask through EC_CMD_DEVICE_EVENT and updates port status
if the mask has EC_DEVICE_EVENT_WLC.
BUG=b:173235954
BRANCH=Trogdor
TEST=Enabled and disabled EC_DEVICE_EVENT_WLC via deviceevent
command and verified the sysfs node is updated.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I9dece6bc35599db3d6ae30452fd8e97bbaeab9af
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2579722
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch adds a host command to get the peripheral charge port
count and status.
$ ectool pchg
1
$ ectool pchg 0
State: CHARGING (4)
Battery: 50%
Flags: 0x0
$ ectool pchg 0 foo
Invalid parameter count
Usage1: pchg
Usage2: pchg <port>
Usage1 prints the number of ports.
Usage2 prints the status of a port.
$ ectool pchg 100
Bad port index
BUG=b:173235954
BRANCH=Trogdor
TEST=Done on CoachZ. See the description above.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I33f261e48b16d5933b6f3ca9f3c12fec476edda3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555628
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Base on schematics, update charger IC and TCPC setting.
BUG=b:173343043
BRANCH=none
TEST=make BOARD=galtic
Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com>
Change-Id: Ie47e296d7c653805acc2c14f94c26376a99a718d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2543570
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Create a base_gpio.inc and base_ec.tasklist. Move nearly all the
implementation to the baseboard. Parts of the implementation can be
moved to the boards as needed.
BUG=None
TEST=Build
BRANCH=None
Change-Id: I3b6ae7539b152d8078f8ef49d7da143a6283d8d4
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2579647
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
On OCPC systems, when charging from an auxiliary charge port, we
should not unconditionally touch the primary charger as the charger
drivers may have configured the primary charger in a specific way
depending on the charging phase occurring.
This commit simply has the charger task not always touch the primary
charger when a charge_request comes in on OCPC systems.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawcia, discharge battery until DFET is
disabled, plug in 45W charger on sub-board, verify that precharge
currents are applied and when the battery requests a fast charge
current, the current is maintained at the precharge current level for
a few seconds.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I9d74bd8369ca0c5f6434ac5ec2c22bbbb2c11560
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575838
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
This commit adds an explicit precharge phase to the OCPC algorithm.
This allows the OCPC module to take advantage of the linear charging
feature available on the supported charger ICs. With linear charging,
the charger IC can control the BFET in the linear region to provide
low precharge currents while maintaining a high VSYS in order to
prevent brownounts in the system.
The precharge phase is active when the battery voltage is less than
the minimum battery voltage, or the voltage is less than the nominal
voltage and the desired charge current is less than or equal to the
defined precharge current.
BUG=b:174683659
BRANCH=dedede
TEST=Build and flash drawcia. Drain battery until DFET is disabled.
Plug in a charger on the sub board, verify that battery is able to be
revived, battery is able to charge at precharge current limits without
exceeding, and battery is able to transition to the fast charge
portion of the charge curve without excessively exceeding the target
current limit.
TEST=Cutoff battyey, plug in charger, verify that battery is able to
be revived from the sub board.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I59b119bac8ed9266889aace63d58d5da63e382f3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2570939
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
The SM5803 supports manipulating the BFET in the linear region. This
will be used for the precharge portion of the charge curve in OCPC
systems. This commit adds support for the linear charge feature for
the charger IC.
BUG=b:174683659
BRANCH=dedede
TEST=With other changes, build and flash drawcia, charge from subboard
on depleted battery and verify that linear charging is taking place
according to precharge current limits.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ib3c7f14e127b89301cccc6e93848da9249232678
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2570938
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
This commit adds a driver method for enabling linear charging. Some
charger ICs have the ability to manipulate the BFET in the linear
region. This commit just adds that method and an API for use by the
rest of the system.
BUG=b:174683659
BRANCH=dedede
TEST=`make -j buildall`
Change-Id: I1660c0598a402b1f3f82300052b7cd72b8154a31
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2570937
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
This commit improves the CV charging phase by setting the target
charge current to the current currently entering the battery as
opposed to simply keeping VSYS as the max voltage and allowing the
current to asymptotically reach the target.
BUG=b:167913892
BRANCH=dedede
TEST=Build and flash drawlat, charge battery to completion, verify
that voltage remains roughly constant in the CV phase.
Change-Id: Ifa5925e6f5e9e5ba83f6265bff16decaa514e762
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568567
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
In order to prevent overshoots, this commit makes the OCPC PID loop
much more conservative by limiting upward transitions of VSYS by 10mV.
A 10mV VSYS increase can equate to a 100mA charging current increase
assuming combined resistance of 100mOhm. Downward transitions still
remain uninhibited in order to correct overshoot quickly.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat. Discharge battery to 1%, charge from sub
board, verify that no overshoots are seen up to 7% SOC.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia5ba76412333d86f9aa9b4868b8e1b85fdec33d3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568566
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Some charger ICs have the capability to report if the input current
has been reached. Thus far, it seems to be more precise compared to
the values returned via the charger ICs ADCs. This commit has the
OCPC module use that functionality if available. If the feature is
not available, the fallback will be what exists today, which is simply
seeing if the instnantaneous input current limit is 95%+ of the set
input current limit.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat. Charge from sub board, verify that
input current is reached prior to that reported from the onboard ADCs.
Change-Id: I3dfb579fd4617b13dfdbed3cb9c7cc2c2f70b93a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568565
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
The SM5803A has a more precise and faster way to determine if the
input current limit is being reached. This commit registers that
method with the common charger driver framework for use by the system.
BUG=b:174167890
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I5f96e86f37294b6cbd4bcc57827bd0ffa845b7da
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568564
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Some charger ICs have the capability to report whether they have
reached the set input current limit. This commit simply exposes an
API for use by the rest of the system to determine if the input
current limit is reached.
BUG=b:174167890
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ic0e00a54c53c985104cf400f0ce36b7a090ca5f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568563
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
This commit updates the PID constants for drawcia to help minimize the
overshoot and to decrease steady state error more quickly.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat; verify that at low SOC, charging from
the sub board results in lower overshoot and reduced time to correct
steady state error.
TEST=Cutoff battery, verify that battery is able to be revived from
sub board.
TEST=Verify DUT can still boot off of AC only.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Id15c226f9ac7bf85f4b427348640419565253d45
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567036
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
We add a bit of hysteresis when determining our error for the OCPC PID
loop equivalent to charger IC's "step" in regulating current. We had
set the band above and below the target for the full step. In order
to reduce overshoot, this commit centers the band around the current
target.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat; verify that steady state now settles
around a shorter band and overshoot is reduced.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I8f8c7305c3973fb5cedecdd14e5466f11a0e85a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567035
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Metaknight_legacy is running out of space. This commit simply enables
CONFIG_DEBUG_ASSERT_BRIEF in order to free up some flash space.
BUG=None
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Icfb16548913a271d571c993d1fefbe1cea9c3403
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582593
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Magolor_legacy is running out of space. This commit simply enables
CONFIG_DEBUG_ASSERT_BRIEF in order to free up some flash space.
BUG=None
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ic2b70c7048099d0dd4d71161c42acd55ee685574
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582592
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This enables CONFIG_HOSTCMD_ESPI when we have ESPI and host commands
enabled (the case with volteer).
There were two functions stubbed out that we will leave to Nuvoton to
implement.
BUG=b:175217186,b:172678200
BRANCH=none
TEST=boot volteer
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I9b6a8c7c60d1a1018292a207a61c583fd171e546
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582445
Commit-Queue: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Zephyr integration includes KConfig support. Reduce the minimum
length description.
BUG=none
BRANCH=none
TEST=Run 'pre-upload.py` against KConfig change with 1 line description.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I4f22e828e420d7e80c58d10eb767a6e72a058463
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582278
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
This CL doesn't change the flow, just fail fast.
need a refactoring.
BUG=none
TEST=make buildall
BRANCH=none
Change-Id: I896e46a67722d6e8ffc7db5dffebc60da0b7fc5c
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578617
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Divya Sasidharan