Compilers predefine system-specific macros which carry information about
compiler, target architecture and operating system. It provides basic
compiler-dependent information like size of types, their maximal and
minimal values, etc. It allows to write common libc headers for multiple
architectures and operating systems.
These macros allow code to always determine what is the target operating
system. This is a problem when compiling code of modules that supports
multiple operating systems (e.g. cryptography libraries).
To avoid confusion we shouldn't leak host operating system macros (e.g.
__linux__, __linux, linux, etc.) when compiling for native_sim board.
Unfortunately, there is no single universal switch that disables all
operating system macros:
- '-undef' removes also architecture-related macros
- '--target' is only available for Clang compiler
This patch uses '-include' option to include file that undefines all
well-known operating system macros.
Run 'gcc -dM -E - < /dev/null | sort' to get full list of predefined
macros.
Signed-off-by: Patryk Duda <patrykd@google.com>
Found via static analysis. In fault path when checking for stack
overflows, if CONFIG_MULTITHREADING is not set, `guard_end` is left
uninitialized and is subsequently used in a comparison.
The solution is to simply return `false` in this configuration as stack
guards are not configured in the first place.
Signed-off-by: François Baldassari <francois@memfault.com>
When duplicating a page table, we don't need to copy
the mapping to the kernel l1 page table virtual address.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
`CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET` shoud be taken into
account in `arch_irq_connect_dynamic`, same as it is done in
`ARCH_IRQ_CONNECT` macro.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This also fixes a typo in `z_arm_switch_to_main_no_multithreading` making
it unlock irq instead of locking them when main returns.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
Replace the global CSTD property with the CSTD kconfig option to select
at least C11 standard.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Influenced heavily by the RISCV64 stack unwinding
implementation in the Linux kernel.
`CONFIG_RISCV_EXCEPTION_STACK_TRACE` can be enabled by
configuring the following Kconfigs:
```prj.conf
CONFIG_DEBUG_INFO=y
CONFIG_EXCEPTION_STACK_TRACE=y
CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT=y
CONFIG_OMIT_FRAME_POINTER=n
```
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This mistake was introduced when converting from ASM to C.
This change also restores the associated comment from the ASM source.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
This is a fix for #61761 where a cooperative task is switched from at the
end of an exception. A cooperative thread should only be switched from if
the thread exists the ready state.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.
This change significantly enhances the maintainability & portability of the
code at the expanse of an indirection (1 outlined function).
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.
This change reduces the need for core specific conditional compilation and
unifies irq locking code.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
# Conflicts:
# soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h
Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.
This change reduces the need for core specific conditional compilation.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.
This is a first step in reducing the amount of ASM in arch/arm/cortex_m
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
v* register aliases are uncommon and it can be surprising to find them.
This change makes use of r* register names for a more consistent
experience of reading assembly.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
This method has special ABI requirement that requires the use of ASM.
This change documents why this is required & adds reference to the
related specification.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
A workaround to avoid icache corruption was added in commit be881d4cf2
("arch: xtensa: add isync to interrupt vector").
This patch implements a different workaround by adding custom logic to
idle entry on affected Intel ADSP platforms. To safely enter "waiti"
when clock gating is enabled, we need to ensure icache is both unlocked
and invalidated upon entry.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Only request the linker to link ASAN in the final stage, not
during the partial linking stage.
This fixes a link issue when building with llvm.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If the CONFIG_ASAN_RECOVER option is set, also pass
-fsanitize-recover=all to the build of the native simulator
built files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Currently LLEXT on Xtensa supports relocatable extensions, linked for
a specific address range, while relocation itself takes place in a
temporary buffer. For this section addresses have to be set correctly
by the linker for their target locations.
This commit adds support for relocatable extensions, built without
using specific memory addresses and run at the same addresses, where
they are loaded.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Adds support for all relocation type produced by GCC
on ARM platform using partial linking (-r flag) or
shared link (-fpic and -shared flag).
Signed-off-by: Cedric Lescop <cedric.lescop@se.com>
This adds the necessary bits to enable memory mapping thread
stacks on both x86 and x86_64. Note that currently these do
not support multi level mappings (e.g. demand paging and
running in virtual address space: qemu_x86/atom/virt board)
as the mapped stacks require actual physical addresses.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces support for memory mapped thread stacks,
where each thread stack is mapped into virtual memory
address space with two guard pages to catch
under-/over-flowing the stack. This is just on the kernel
side. Additional architecture code is required to fully
support this feature.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Previous commit changed the privileged stack size to be using
kconfig CONFIG_PRIVILEGED_STACK_SIZE instead of simply
CONFIG_MMU_PAGE_SIZE. However, the stack bound check function
was still using the MMU page size, so fix that.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most places use CONFIG_X86_STACK_PROTECTION, but there are some
places using CONFIG_HW_STACK_PROTECTION. So synchronize all
to use CONFIG_X86_STACK_PROTECTION instead.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some toolchains cannot create shared objects for Xtensa, with them we
have to use relocatable objects. Add support for them to llext.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This commit removes the `Kconfig.core` file. It's been largely unused, and
the only symbol it provides (`RISCV_CORE_E31`) overlaps with the SoC-layer
provided `SOC_SERIES_SIFIVE_FREEDOM_FE300`.
As of date, the only SoC that uses the E31 core in Zephyr is the FE310 SoC.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
When thread stack is defined as an array, K_THREAD_STACK_LEN()
is used to calculate the size for each stack in the array.
However, standalone thread stack has its size calculated by
Z_THREAD_STACK_SIZE_ADJUST() instead. Depending on the arch
alignment requirement, they may not be the same... which
could cause some confusions. So align them both to use
K_THREAD_STACK_LEN().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When kernel stack is defined as an array, K_KERNEL_STACK_LEN()
is used to calculate the size for each stack in the array.
However, standalone kernel stack has its size calculated by
Z_KERNEL_STACK_SIZE_ADJUST() instead. Depending on the arch
alignment requirement, they may not be the same... which
could cause some confusions. So align them both to use
K_KERNEL_STACK_LEN().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Simple rename to align the kernel naming scheme. This is being
used throughout the tree, especially in the architecture code.
As this is not a private API internal to kernel, prefix it
appropriately with K_.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Simple rename to align the kernel naming scheme. This is being
used throughout the tree, especially in the architecture code.
As this is not a private API internal to kernel, prefix it
appropriately with K_.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This call is used by syscalls machinery, and needs to be available for
extensions that use syscalls on ARM.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
arch_interface.h is for architecture and should not be
under sys/. So move it under include/zephyr/arch/.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There was old code to exit the simulator when there is a fatal
error. This updates the #ifdef and the function name so that
it can be used to exit both QEMU and simulator when a fatal
error occurs. This should help with twister runs as this will
fail immediately instead of having wait for timeout.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The #pragma to ignore array bounds for xtensa_soc_mmu_ranges[]
was a remnant before code refactoring during review. Since
this array is no longer declared __weak and as a zero length
array, the #pragma to ignore array bounds is no longer needed.
So remove them.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
During early boot in assembly, the function parameter to
z_x86_early_tls_update_gdt() should be the pointer to
the interrupt stack. However, what was passed instead
was the pointer to the x86_cpuboot struct. So fix it to
actually pass the stack pointer (which is stashed inside
the x86_cpuboot struct).
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
- spill windows in the current context (before switching task) since
it will be erased.
- Remove unnucessary load/mov
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
According to RISC-V Instruction Set Manual Chapter 3.3.2:
"The operation of WFI must be unaffected by the global interrupt
bits in mstatus
[...]
WFI is also required to resume execution for locally enabled
interrupts pending at any privilege level,
regardless of the global interrupt enable at each privilege level."
Disabling interrupts before executing `wfi` prevents a corner case
where an IRQ is presented just before executing `wfi`,
which would cause it to return directly into `wfi` and potentially
get stuck in sleep, instead of continuing to background processing.
When execution is resumed, interrupts are reenabled
and appropriate IRQ Handlers should be executed.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Hess Nathan