soc: k64f MPU configured to always allow ENET
Because NXP MPU's regions are dynamically enabled/disabled, ENET device's access maybe restricted when switching out of a task. Background DMA transfers from RAM to MAC/PHY may happen during MPU region reconfiguration or core idling. Enabled ENET (Kinetis MPU Master 3) to always have access to RAM address space. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
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@ -118,6 +118,12 @@
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#define REGION_USER_RO_ATTR {(MPU_REGION_READ | \
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#define REGION_USER_RO_ATTR {(MPU_REGION_READ | \
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MPU_REGION_SU)}
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MPU_REGION_SU)}
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/* ENET device (Master 3) will not be able to access RAM when
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ram region is dynamically disabled in NXP MPU.
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DEBUGGER (Master 1) can't be disabled in Region 0. */
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#define REGION_DEBUGGER_AND_DEVICE_ATTR {((MPU_REGION_SU) | \
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((UM_READ | UM_WRITE) << BM3_UM_SHIFT))}
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#define REGION_DEBUG_ATTR {MPU_REGION_SU}
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#define REGION_DEBUG_ATTR {MPU_REGION_SU}
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#define REGION_BACKGROUND_ATTR {MPU_REGION_SU_RW}
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#define REGION_BACKGROUND_ATTR {MPU_REGION_SU_RW}
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@ -8,10 +8,13 @@
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static const struct nxp_mpu_region mpu_regions[] = {
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static const struct nxp_mpu_region mpu_regions[] = {
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/* Region 0 */
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/* Region 0 */
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/* Debugger access can't be disabled; ENET devices will not be able to
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* access RAM when it's region is dynamically disabled in NXP MPU.
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*/
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MPU_REGION_ENTRY("DEBUGGER_0",
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MPU_REGION_ENTRY("DEBUGGER_0",
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0,
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0,
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0xFFFFFFFF,
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0xFFFFFFFF,
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REGION_DEBUG_ATTR),
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REGION_DEBUGGER_AND_DEVICE_ATTR),
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/* The NXP MPU does not give precedence to memory regions like the ARM
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/* The NXP MPU does not give precedence to memory regions like the ARM
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* MPU, which means that if one region grants access then another
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* MPU, which means that if one region grants access then another
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