Add S32K146 device definitions and overlays in order to reuse
existing MCUX SDK drivers on this SoC.
Drivers enabled: SYSMPU, GPIO, PORT, LPUART.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Configuration generated with S32 Design Studio for S32 Platform,
including Real-Time Drivers package for S32K1xx.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Relocate uninitialized non-cacheable variables
into .nocache (NOLOAD) section defined by Zephyr.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Device headers are instructing CMSIS to configure the MPU,
but S32k1xx devices have an NXP SYSMPU and not an standard Arm MPU.
Defining `__MPU_PRESENT` to 0 so that SYSMPU driver can be used.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Based on S32K1_S32M24_-_R21-11_RTD_2_0_0_D2308.
Components included: device headers, OSIF, Mcu/Clock.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
S32K1xx uses the same pin control driver as the Kinetis family.
The SoC pinmux headers were generated using gen_soc_headers.py
and NXP Real-Time Drivers for S32K1xx package. The script was
slightly modified locally in order to work with RTD, as follows:
- proc_root = pathlib.Path(temp_dir.name) / 'processors'
- search_pattern = "*/ksdk2_0/*/signal_configuration.xml"
+ proc_root = pathlib.Path(temp_dir.name)
+ / 'tools' / 's32ct' / 'processors'
+ search_pattern = "*/*/*/signal_configuration.xml"
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Relocate uninitialized non-cacheable variables of Lcu and Trgmux Mcl
drivers into .nocache (NOLOAD) section defined by Zephyr
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
This commit adds S32DS generated headers to Lcu and Trgmux RTDs
to support Quadrature decoder
Co-authored-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
"instance" variable is only used if SoC has reset driver
OR the i3c driver is allowed to control clock. Add missing
guards to avoid warnings when compile.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Rename the PIT struct from TIMER to CHANNEL so that
the MCUX PIT driver can be reused for S32Z.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Remove 'u' suffix from macros so that they
can be used with LISTIFY in shim drivers.
Set the number of UART LINFlexD instances configured
that bases on the number of devicetree UART nodes enabled.
Set the number of SPI instances configured that bases
on the number of devicetree SPI nodes enabled.
Enable SPI slave support bases on CONFIG_SPI_SLAVE.
Wrap the defined macros of each MRU instance base on
devicetree MRU node so that it is built when node enabled.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Shim drivers use these macros with LISTIFY.
Remove 'u' suffix from macros so that they
can be used with LISTIFY.
Base on commit 3731aefd
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Relocate uninitialized non-cacheable variables
into .nocache (NOLOAD) section defined by Zephyr.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
In mcux-sdk, MCUX_DEVICE is defined followed by CPU Core for
the platforms with multiple different CPU Cores, but in hal_nxp,
the CPU Core name is removed from MCUX_DEVICE, so let's
unify the macro definition with mcux-sdk, and use
a new macro MCUX_DEVICE_PATH to define device PATH name.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Switch to use `CONFIG_SOC` to define the device name and CPU name
needed to build MCUX drivers and device sources.
The SoC part number for S32 now makes reference to the actual
part number of device as defined in datasheets and should't be
used to define the CPU name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Generated *pinctrl.dtsi file for i.MX93 using offline data downloaded
from mcuxpresso.nxp.com. Add copyright notice.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
This commit adds support for compiling the SCFW API
in Zephyr for i.MX8QM and i.MX8QXP's DSP core.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Currently, the core interrupts are CM-specific (e.g: INTID 0
is said to be NMI but, in fact, is tied low on the DSP). As
such, remove the core interrupts altogether.
Also, this commit introduces the MU13 and IRQSTEER interrupt
IDs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the DSP core is now also supported, we need to include
the generic fsl_device_registers.h instead of "MIMX8QX6_cm4.h".
This will assure that the appropriate headers are included
based on the used core.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Currently, if the core is not supported the compilation will
fail because of the "#error" statement in CLOCK_GetCoreSysClkFreq.
To overcome this, instead of causing a compilation error, the
function will report a NULL frequency as if the IPC call failed.
This way, we can avoid having to define macros for each of the
cores just to make CLOCK_GetCoreSysClkFreq() happy.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit adds the definition for the LPUART_RX_TX_IRQS
macro. For now, this macro resolves to an empty array because
the DSP core is only used with Zephyr on which we do the
IRQ management using the Zephyr support.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Currently, the core interrupts are CM-specific (e.g: INTID 0
is said to be NMI but, in fact, is tied low on the DSP). As
such, remove the core interrupts altogether.
Also, this commit introduces the MU13 and IRQSTEER interrupt
IDs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
As a prerequisite to refactor all those shim drivers to use the
instance-based DT macros and to obtain the peripheral instance index
at compile time as done in f809614136, remove the `u` prefix from
the HAL instance count macros so that they can be used with `LISTIFY`.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Remove CONFIG_IPM_IMX_REV2, as this Kconfig has been removed from Zephyr
in favor of CONFIG_IPM_IMX (since both Kconfigs handled the same IP
block)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Copyright was not included when script was initially run to generate
these files. Add a copyright to all generated files.
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
This adds specific code for emios icu code which generated
from S32 Design Studio for S32 platform
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
If a channel configured to be use in SAIC, means that the PWM
channel will be used for capture mode which is managed by
eMIOS ICU, do not consider it as used by eMIOS PWM driver
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Generated *pinctrl.dtsi file for i.MX93 using offline data downloaded
from mcuxpresso.nxp.com. Add copyright notice.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Add missing guards to avoid compilation warnings when building with SDK
clock control driver disabled.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Manuel Argüelles