326 lines
11 KiB
ReStructuredText
326 lines
11 KiB
ReStructuredText
.. _96b_meerkat96:
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96Boards Meerkat96
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##################
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Overview
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********
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96Boards Meerkat96 board is based on NXP i.MX7 Hybrid multi-core processor,
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composed of a dual Cortex®-A7 and a single Cortex®-M4 core.
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Zephyr OS is ported to run on the Cortex®-M4 core.
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- Board features:
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- RAM: 512 Mbyte
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- Storage:
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- microSD Socket
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- Wireless:
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- WiFi: 2.4GHz IEEE 802.11b/g/n
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- Bluetooth: v4.1 (BR/EDR)
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- USB:
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- Host - 2x type A
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- OTG: - 1x type micro-B
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- HDMI
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- Connectors:
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- 40-Pin Low Speed Header
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- 60-Pin High Speed Header
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- LEDs:
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- 4x Green user LEDs
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- 1x Blue Bluetooth LED
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- 1x Yellow WiFi LED
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.. image:: img/96b_meerkat96.jpg
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:align: center
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:alt: 96Boards Meerkat96
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More information about the board can be found at the
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`96Boards website`_.
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Hardware
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********
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The i.MX7 SoC provides the following hardware capabilities:
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- Dual Cortex A7 (800MHz/1.0GHz) core and Single Cortex M4 (200MHz) core
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- Memory
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- External DDR memory up to 1 Gbyte
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- Internal RAM -> A7: 256KB SRAM
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- Internal RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
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- Display
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- RGB 1920x1080x24bpp
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- 4-wire Resistive touch
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- Multimedia
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- 1x Camera Parallel Interface
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- 1x Analog Audio Line in (Stereo)
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- 1x Analog Audio Mic in (Mono)
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- 1x Analog Audio Headphone out (Stereo)
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- Connectivity
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- USB 2.0 OTG (High Speed)
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- USB 2.0 host (High Speed)
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- 10/100 Mbit/s Ethernet PHY
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- 4x I2C
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- 4x SPI
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- 7x UART
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- 1x IrDA
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- 20x PWM
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- Up to 125 GPIO
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- 4x Analog Input (12 Bit)
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- 2x SDIO/SD/MMC (8 Bit)
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- 2x CAN
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More information about the i.MX7 SoC can be found here:
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- `i.MX 7 Series Website`_
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- `i.MX 7 Dual Datasheet`_
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- `i.MX 7 Dual Reference Manual`_
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Supported Features
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==================
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The Zephyr 96b_meerkat96 board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/96b_meerkat96/96b_meerkat96_defconfig``
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Other hardware features are not currently supported by the port.
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Connections and IOs
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===================
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96Boards Meerkat96 board was tested with the following pinmux controller
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configuration.
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+---------------+-----------------+---------------------------+
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| Board Name | SoC Name | Usage |
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+===============+=================+===========================+
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| UART_1 RXD | UART1_TXD | UART Console |
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+---------------+-----------------+---------------------------+
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| UART_1 TXD | UART1_RXD | UART Console |
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+---------------+-----------------+---------------------------+
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| LED_R1 | GPIO1_IO04 | LED0 |
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+---------------+-----------------+---------------------------+
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| LED_R2 | GPIO1_IO05 | LED1 |
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+---------------+-----------------+---------------------------+
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| LED_R3 | GPIO1_IO06 | LED2 |
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+---------------+-----------------+---------------------------+
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| LED_R4 | GPIO1_IO07 | LED3 |
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+---------------+-----------------+---------------------------+
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System Clock
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============
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The M4 Core is configured to run at a 200 MHz clock speed.
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Serial Port
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===========
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The iMX7D SoC has seven UARTs. UART_1 is configured for the console and
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the remaining are not used/tested.
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Programming and Debugging
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*************************
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The 96Boards Meerkat96 board doesn't have QSPI flash for the M4 and it needs
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to be started by the A7 core. The A7 core is responsible to load the M4 binary
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application into the RAM, put the M4 in reset, set the M4 Program Counter and
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Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at
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bootloader level or after the Linux system has booted.
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The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4:
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| Region | Cortex-A7 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size |
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+============+=======================+========================+=======================+======================+
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| DDR | 0x80000000-0xFFFFFFFF | 0x80000000-0xDFFFFFFF | 0x10000000-0x1FFEFFFF | 2048MB (less for M4) |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| OCRAM | 0x00900000-0x0091FFFF | 0x20200000-0x2021FFFF | 0x00900000-0x0091FFFF | 128KB |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| TCMU | 0x00800000-0x00807FFF | 0x20000000-0x20007FFF | | 32KB |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| TCML | 0x007F8000-0x007FFFFF | | 0x1FFF8000-0x1FFFFFFF | 32KB |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00000000-0x00007FFF | 32KB |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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| QSPI Flash | | | 0x08000000-0x0BFFFFFF | 64MB |
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+------------+-----------------------+------------------------+-----------------------+----------------------+
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For more information about memory mapping see the
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`i.MX 7 Dual Reference Manual`_ (section 2.1.2 and 2.1.3), and the
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`Toradex Wiki`_.
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At compilation time you have to choose which RAM will be used. This
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configuration is done in the file ``boards/arm/96b_meerkat96/96b_meerkat96.dts``
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with "zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties.
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The available configurations are:
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.. code-block:: none
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"zephyr,flash"
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- &ddr_code
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- &tcml_code
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- &ocram_code
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- &ocram_s_code
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- &ocram_pxp_code
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- &ocram_epdc_code
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"zephyr,sram"
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- &ddr_sys
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- &tcmu_sys
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- &ocram_sys
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- &ocram_s_sys
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- &ocram_pxp_sys
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- &ocram_epdc_sys
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Below you will find the instructions to load and run Zephyr on M4 from
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A7 using u-boot.
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Copy the compiled zephyr.bin to the first FAT partition of the SD card and
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plug into the board. Power it up and stop the u-boot execution.
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Set the u-boot environment variables and run the zephyr.bin from the
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appropriated memory configured in the Zephyr compilation:
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.. code-block:: console
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setenv bootm4 'fatload mmc 0:1 $m4addr $m4fw && dcache flush && bootaux $m4addr'
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# TCML
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setenv m4tcml 'setenv m4fw zephyr.bin; setenv m4addr 0x007F8000'
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setenv bootm4tcml 'run m4tcml && run bootm4'
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run bootm4tcml
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# TCMU
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setenv m4tcmu 'setenv m4fw zephyr.bin; setenv m4addr 0x00800000'
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setenv bootm4tcmu 'run m4tcmu && run bootm4'
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run bootm4tcmu
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# OCRAM
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setenv m4ocram 'setenv m4fw zephyr.bin; setenv m4addr 0x00900000'
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setenv bootm4ocram 'run m4ocram && run bootm4'
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run bootm4ocram
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# OCRAM_S
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setenv m4ocrams 'setenv m4fw zephyr.bin; setenv m4addr 0x00180000'
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setenv bootm4ocrams 'run m4ocrams && run bootm4'
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run bootm4ocrams
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# DDR
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setenv m4ddr 'setenv m4fw zephyr.bin; setenv m4addr 0x80000000'
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setenv bootm4ddr 'run m4ddr && run bootm4'
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run bootm4ddr
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Debugging
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=========
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96Boards Meerkat96 board can be debugged by connecting an external JLink
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JTAG debugger to the J4 debug connector. Then download and install
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`J-Link Tools`_ and `NXP iMX7D Connect CortexM4.JLinkScript`_.
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To run Zephyr Binary using J-Link create the following script in order to
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get the Program Counter and Stack Pointer from zephyr.bin.
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get-pc-sp.sh:
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.. code-block:: console
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#!/bin/sh
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firmware=$1
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pc=$(od -An -N 8 -t x4 $firmware | awk '{print $2;}')
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sp=$(od -An -N 8 -t x4 $firmware | awk '{print $1;}')
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echo pc=$pc
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echo sp=$sp
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Get the SP and PC from firmware binary: ``./get-pc-sp.sh zephyr.bin``
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.. code-block:: console
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pc=00900f01
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sp=00905020
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Plug in the J-Link into the board and PC and run the J-Link command line tool:
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.. code-block:: console
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/usr/bin/JLinkExe -device Cortex-M4 -if JTAG -speed 4000 -autoconnect 1 -jtagconf -1,-1 -jlinkscriptfile iMX7D_Connect_CortexM4.JLinkScript
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The following steps are necessary to run the zephyr.bin:
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1. Put the M4 core in reset
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2. Load the binary in the appropriate addr (TMCL, TCMU, OCRAM, OCRAM_S or DDR)
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3. Set PC (Program Counter)
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4. Set SP (Stack Pointer)
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5. Get the M4 core out of reset
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Issue the following commands inside J-Link commander:
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.. code-block:: console
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w4 0x3039000C 0xAC
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loadfile zephyr.bin,0x00900000
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w4 0x00180000 00900f01
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w4 0x00180004 00905020
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w4 0x3039000C 0xAA
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With these mechanisms, applications for the ``96b_meerkat96`` board
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configuration can be built and debugged in the usual way (see
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:ref:`build_an_application` and :ref:`application_run` for more details).
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References
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==========
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- `Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors`_
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- `J-Link iMX7D Instructions`_
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.. _96Boards website:
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https://www.96boards.org/product/imx7-96/
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.. _i.MX 7 Series Website:
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https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-7-processors:IMX7-SERIES?fsrch=1&sr=1&pageNum=1
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.. _i.MX 7 Dual Datasheet:
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https://www.nxp.com/docs/en/data-sheet/IMX7DCEC.pdf
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.. _i.MX 7 Dual Reference Manual:
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https://www.nxp.com/webapp/Download?colCode=IMX7DRM
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.. _J-Link Tools:
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https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack
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.. _NXP iMX7D Connect CortexM4.JLinkScript:
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https://wiki.segger.com/images/8/86/NXP_iMX7D_Connect_CortexM4.JLinkScript
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.. _Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors:
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https://www.nxp.com/docs/en/application-note/AN5317.pdf
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.. _J-Link iMX7D Instructions:
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https://wiki.segger.com/IMX7D
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.. _Toradex Wiki:
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https://developer.toradex.com/knowledge-base/freertos-on-the-cortex-m4-of-a-colibri-imx7#Memory_areas
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