300 lines
3.3 KiB
Plaintext
300 lines
3.3 KiB
Plaintext
#
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# Copyright (c) 2014 Wind River Systems, Inc.
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# Copyright (c) 2015-2016 Intel Corporation
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_QUARK_SE_C1000_SS
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config SOC
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default quark_se_c1000_ss
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports only 2 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
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default 2
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config NUM_IRQS
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# must be > the highest interrupt number used
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default 68
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config RGF_NUM_BANKS
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default 2
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32000000
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config HARVARD
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def_bool n
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config FLASH_BASE_ADDRESS
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default 0x40000000
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config FLASH_SIZE
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default 152
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config SRAM_BASE_ADDRESS
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default 0x4000 if NSIM
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default 0xa8000400
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config SRAM_SIZE
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default 16 if NSIM
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default 24
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config ICCM_BASE_ADDRESS
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default 0xFFFFFFFF
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config ICCM_SIZE
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default 0
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config DCCM_BASE_ADDRESS
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default 0x80000000
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config DCCM_SIZE
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default 8
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config QMSI
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def_bool y
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config QMSI_BUILTIN
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def_bool y
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if RTC
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config RTC_QMSI
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def_bool y
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config RTC_0_IRQ_PRI
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default 2
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endif # RTC
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if PWM
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config PWM_QMSI
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def_bool y
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endif # PWM
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if GPIO
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config GPIO_QMSI
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def_bool y
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if GPIO_QMSI
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config GPIO_QMSI_0
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def_bool y
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if GPIO_QMSI_0
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config GPIO_QMSI_0_IRQ_PRI
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default 1
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endif # GPIO_QMSI_0
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config GPIO_QMSI_1
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def_bool y
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if GPIO_QMSI_1
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config GPIO_QMSI_1_IRQ_PRI
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default 1
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endif # GPIO_QMSI_1
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endif # GPIO_QMSI
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config GPIO_QMSI_SS
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def_bool y
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if GPIO_QMSI_SS
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config GPIO_QMSI_SS_0
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def_bool y
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if GPIO_QMSI_SS_0
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config GPIO_QMSI_SS_0_IRQ_PRI
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default 1
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endif # GPIO_QMSI_SS_0
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config GPIO_QMSI_SS_1
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def_bool y
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if GPIO_QMSI_SS_1
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config GPIO_QMSI_SS_1_IRQ_PRI
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default 1
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endif # GPIO_QMSI_SS_1
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endif # GPIO_QMSI_SS
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endif # GPIO
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if I2C
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config I2C_QMSI
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def_bool y
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config I2C_0
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def_bool y
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config I2C_0_IRQ_PRI
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default 1
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config I2C_0_DEFAULT_CFG
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default 0x12
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config I2C_1
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def_bool y
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config I2C_1_IRQ_PRI
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default 1
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config I2C_1_DEFAULT_CFG
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default 0x12
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config I2C_SDA_SETUP
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default 2
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config I2C_SDA_TX_HOLD
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default 16
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config I2C_SDA_RX_HOLD
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default 24
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config I2C_QMSI_SS
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def_bool y
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config I2C_SS_0
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def_bool y
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config I2C_SS_0_DEFAULT_CFG
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default 0x12
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config I2C_SS_1
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def_bool y
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config I2C_SS_1_DEFAULT_CFG
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default 0x12
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config I2C_SS_SDA_SETUP
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default 2
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config I2C_SS_SDA_HOLD
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default 10
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endif # I2C
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if ADC
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config ADC_QMSI_SS
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def_bool y
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endif
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if UART_QMSI
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config UART_QMSI_0
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def_bool y
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if UART_QMSI_0
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config UART_QMSI_0_IRQ_PRI
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default 3
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endif # UART_QMSI_0
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config UART_QMSI_1
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def_bool y
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if UART_QMSI_1
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config UART_QMSI_1_IRQ_PRI
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default 3
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endif # UART_QMSI_1
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endif # UART_QMSI
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if UART_CONSOLE
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config UART_CONSOLE_ON_DEV_NAME
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default "UART_1"
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endif
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if SPI
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config SPI_QMSI
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def_bool y
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config SPI_0
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def_bool y
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config SPI_0_IRQ_PRI
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default 1
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config SPI_1
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def_bool y
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config SPI_1_IRQ_PRI
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default 1
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config SPI_QMSI_SS
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def_bool y
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config SPI_SS_0
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def_bool y
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config SPI_SS_0_IRQ_PRI
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default 1
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config SPI_SS_1
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def_bool y
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config SPI_SS_1_IRQ_PRI
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default 1
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endif # SPI
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if AIO_COMPARATOR
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config AIO_COMPARATOR_QMSI
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def_bool y
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endif # AIO_COMPARATOR
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if WATCHDOG
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config WDT_QMSI
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def_bool y
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config WDT_0_IRQ_PRI
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default 2
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endif # WATCHDOG
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if DMA
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config DMA_QMSI
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def_bool y
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endif # DMA
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if COUNTER
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config AON_COUNTER_QMSI
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def_bool y
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config AON_TIMER_QMSI
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def_bool y
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config AON_TIMER_IRQ_PRI
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default 2
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endif # COUNTER
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endif #SOC_QUARK_SE_C1000_SS
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