151 lines
5.1 KiB
C
151 lines
5.1 KiB
C
/* systemPic.c - system module for variants with PIC */
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/*
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* Copyright (c) 2013-2015, Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module provides routines to initialize and support board-level hardware
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for the pentium4 and minuteia variants of the generic_pc BSP.
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*/
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#include "board.h"
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#include <nanokernel.h>
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#include <nanokernel/cpu.h>
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#include <drivers/pic.h>
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/* Handle possible stray or spurious interrupts on the master and slave PICs */
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extern void _masterStrayIntStub(void);
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extern void _slaveStrayIntStub(void);
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SYS_INT_REGISTER(_masterStrayIntStub, PIC_MASTER_STRAY_INT_LVL, 0);
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SYS_INT_REGISTER(_slaveStrayIntStub, PIC_SLAVE_STRAY_INT_LVL, 0);
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/*******************************************************************************
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*
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* _SysIntVecAlloc - allocate interrupt vector
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*
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* This BSP provided routine supports the irq_connect() API. This
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* routine performs the following functions:
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*
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* a) Allocates a vector satisfying the requested priority, where possible.
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* When the <irq> argument is not equal to NANO_SOFT_IRQ, the vector assigned
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* to the <irq> during interrupt controller initialization is returned,
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* which may or may not have the desired prioritization. (Prioritization of
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* such vectors is fixed by the 8259 interrupt controllers, and cannot be
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* programmed on an IRQ basis; for example, IRQ0 is always the highest
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* priority interrupt no matter which interrupt vector was assigned to IRQ0.)
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* b) Provides End of Interrupt (EOI) and Beginning of Interrupt (BOI) related
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* information to be used when generating the interrupt stub code.
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*
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* The pcPentium4 board virtualizes IRQs as follows:
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*
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* - IRQ0 to IRQ7 are provided by the master i8259 PIC
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* - IRQ8 to IRQ15 are provided by the slave i8259 PIC
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*
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* RETURNS: the allocated interrupt vector
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*
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* INTERNAL
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* For debug kernels, this routine will return -1 for invalid <priority> or
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* <irq> parameter values.
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*/
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int _SysIntVecAlloc(
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unsigned int irq, /* virtualized IRQ */
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unsigned int priority, /* get vector from <priority> group */
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NANO_EOI_GET_FUNC * boiRtn, /* ptr to BOI routine; NULL if none */
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NANO_EOI_GET_FUNC * eoiRtn, /* ptr to EOI routine; NULL if none */
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void **boiRtnParm, /* BOI routine parameter, if any */
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void **eoiRtnParm, /* EOI routine parameter, if any */
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unsigned char *boiParamRequired, /* BOI routine parameter req? */
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unsigned char *eoiParamRequired /* BOI routine parameter req? */
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)
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{
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int vector;
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ARG_UNUSED(boiRtnParm);
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ARG_UNUSED(eoiRtnParm);
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#if defined(DEBUG)
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if ((priority > 15) || (irq > 15) && (irq != NANO_SOFT_IRQ))
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return -1;
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#endif
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/* The PIC BOI does not require a parameter */
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*boiParamRequired = 0;
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/* Assume BOI is not required */
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*boiRtn = (NANO_EOI_GET_FUNC)NULL;
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if (irq != NANO_SOFT_IRQ) {
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/* convert interrupt 'vector' to an interrupt controller IRQ
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* number */
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vector = INT_VEC_IRQ0 + irq;
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/* mark vector as allocated */
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_IntVecMarkAllocated(vector);
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/* vector not handled by PIC, thus don't specify an EOI handler
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*/
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if (irq >= N_PIC_IRQS) {
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*eoiRtn = (NANO_EOI_GET_FUNC)NULL;
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return vector;
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}
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if (irq == PIC_MASTER_STRAY_INT_LVL) {
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*boiRtn = (NANO_EOI_GET_FUNC)_i8259_boi_master;
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} else if (irq == PIC_SLAVE_STRAY_INT_LVL) {
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*boiRtn = (NANO_EOI_GET_FUNC)_i8259_boi_slave;
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}
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if (irq <= PIC_MASTER_STRAY_INT_LVL)
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*eoiRtn = (NANO_EOI_GET_FUNC)_i8259_eoi_master;
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else
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*eoiRtn = (NANO_EOI_GET_FUNC)_i8259_eoi_slave;
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*eoiParamRequired = 0;
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} else {
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/*
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* Use the nanokernel utility function _IntVecAlloc() to
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* allocate
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* a vector for software generated interrupts.
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*/
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vector = _IntVecAlloc(priority);
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*eoiRtn = (NANO_EOI_GET_FUNC)NULL;
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}
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return vector;
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}
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