253 lines
8.1 KiB
C
253 lines
8.1 KiB
C
/* systemApic.c - system module for variants with LOAPIC */
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/*
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* Copyright (c) 2013-2015, Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module provides routines to initialize and support board-level hardware
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for the atom_n28xx variant of generic_pc BSP.
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*/
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#include <misc/__assert.h>
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#include "board.h"
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#include <nanokernel.h>
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#include <nanokernel/cpu.h>
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#include <drivers/ioapic.h>
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#include <drivers/loapic.h>
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/*******************************************************************************
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*
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* _SysIntVecAlloc - allocate interrupt vector
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*
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* This BSP provided routine supports the irq_connect() API. This
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* routine is required to perform the following 3 functions:
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*
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* a) Allocate a vector satisfying the requested priority. The utility routine
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* _IntVecAlloc() provided by the nanokernel will be used to perform the
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* the allocation since the local APIC prioritizes interrupts as assumed
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* by _IntVecAlloc().
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* b) Return End of Interrupt (EOI) and Beginning of Interrupt (BOI) related
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* information to be used when generating the interrupt stub code, and
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* c) If an interrupt vector can be allocated, and the <irq> argument is not
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* equal to NANO_SOFT_IRQ, the IOAPIC redirection table (RED) or the
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* LOAPIC local vector table (LVT) will be updated with the allocated
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* interrupt vector.
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*
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* The board virtualizes IRQs as follows:
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*
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* - The first IOAPIC_NUM_RTES IRQs are provided by the IOAPIC
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* - The remaining IRQs are provided by the LOAPIC.
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*
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* Thus, for example, if the IOAPIC supports 24 IRQs:
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*
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* - IRQ0 to IRQ23 map to IOAPIC IRQ0 to IRQ23
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* - IRQ24 to IRQ29 map to LOAPIC LVT entries as follows:
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*
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* IRQ24 -> LOAPIC_TIMER
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* IRQ25 -> LOAPIC_THERMAL
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* IRQ26 -> LOAPIC_PMC
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* IRQ27 -> LOAPIC_LINT0
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* IRQ28 -> LOAPIC_LINT1
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* IRQ29 -> LOAPIC_ERROR
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*
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* The IOAPIC_NUM_RTES macro is provided by board.h, and it specifies the number
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* of IRQs supported by the on-board I/O APIC device.
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*
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* RETURNS: the allocated interrupt vector
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*
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* INTERNAL
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* For debug kernels, this routine will return -1 if there are no vectors
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* remaining in the specified <priority> level, or if the <priority> or <irq>
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* parameters are invalid.
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*/
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int _SysIntVecAlloc(
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unsigned int irq, /* virtualized IRQ */
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unsigned int priority, /* get vector from <priority> group */
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NANO_EOI_GET_FUNC * boiRtn, /* ptr to BOI routine; NULL if none */
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NANO_EOI_GET_FUNC * eoiRtn, /* ptr to EOI routine; NULL if none */
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void **boiRtnParm, /* BOI routine parameter, if any */
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void **eoiRtnParm, /* EOI routine parameter, if any */
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unsigned char *boiParamRequired, /* BOI routine parameter req? */
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unsigned char *eoiParamRequired /* BOI routine parameter req? */
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)
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{
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int vector;
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ARG_UNUSED(boiRtnParm);
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ARG_UNUSED(boiParamRequired);
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#if defined(DEBUG)
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if ((priority > 15) ||
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((irq > (IOAPIC_NUM_RTES + 5)) && (irq != NANO_SOFT_IRQ)))
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return -1;
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#endif
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/*
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* Use the nanokernel utility function _IntVecAlloc(). A value of
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* -1 will be returned if there are no free vectors in the requested
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* priority.
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*/
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vector = _IntVecAlloc(priority);
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__ASSERT(vector != -1, "No free vectors in the requested priority");
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/*
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* Set up the appropriate interrupt controller to generate the allocated
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* interrupt vector for the specified IRQ. Also, provide the required
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* EOI and BOI related information for the interrupt stub code
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*generation
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* step.
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*
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* For software interrupts (NANO_SOFT_IRQ), skip the interrupt
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*controller
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* programming step, and indicate that a BOI and EOI handler is not
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* required.
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*
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* Skip both steps if a vector could not be allocated.
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*/
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*boiRtn = (NANO_EOI_GET_FUNC)NULL; /* a BOI handler is never required */
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*eoiRtn = (NANO_EOI_GET_FUNC)NULL; /* assume NANO_SOFT_IRQ */
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#if defined(DEBUG)
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if ((vector != -1) && (irq != NANO_SOFT_IRQ))
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#else
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if (irq != NANO_SOFT_IRQ)
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#endif
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{
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if (irq < IOAPIC_NUM_RTES) {
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_ioapic_int_vec_set(irq, vector);
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/*
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* query IOAPIC driver to obtain EOI handler information
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* for the
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* interrupt vector that was just assigned to the
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* specified IRQ
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*/
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*eoiRtn = (NANO_EOI_GET_FUNC)_ioapic_eoi_get(
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irq, (char *)eoiParamRequired, eoiRtnParm);
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} else {
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_loapic_int_vec_set(irq - IOAPIC_NUM_RTES, vector);
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/* specify that the EOI handler in loApicIntr.c driver
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* be invoked */
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*eoiRtn = (NANO_EOI_GET_FUNC)_loapic_eoi;
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*eoiParamRequired = 0;
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}
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}
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return vector;
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}
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/*******************************************************************************
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*
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* _SysIntVecProgram - program interrupt controller
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*
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* This BSP provided routine programs the appropriate interrupt controller
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* with the given vector based on the given IRQ parameter.
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*
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* Drivers call this routine instead of irq_connect() when interrupts are
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* configured statically.
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*
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* The Clanton board virtualizes IRQs as follows:
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*
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* - The first IOAPIC_NUM_RTES IRQs are provided by the IOAPIC so the IOAPIC
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* is programmed for these IRQs
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* - The remaining IRQs are provided by the LOAPIC and hence the LOAPIC is
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* programmed.
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*
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* The IOAPIC_NUM_RTES macro is provided by board.h, and it specifies the number
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* of IRQs supported by the on-board I/O APIC device.
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*
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*/
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void _SysIntVecProgram(unsigned int vector, /* vector number */
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unsigned int irq /* virtualized IRQ */
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)
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{
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if (irq < IOAPIC_NUM_RTES) {
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_ioapic_int_vec_set(irq, vector);
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} else {
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_loapic_int_vec_set(irq - IOAPIC_NUM_RTES, vector);
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}
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}
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/*******************************************************************************
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*
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* irq_enable - enable an individual interrupt (IRQ)
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*
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* The public interface for enabling/disabling a specific IRQ for the IA-32
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* architecture is defined as follows in include/nanokernel/x86/arch.h
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*
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* extern void irq_enable (unsigned int irq);
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* extern void irq_disable (unsigned int irq);
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*
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* The irq_enable() routine is provided by the BSP due to the
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* IRQ virtualization that is performed by this BSP. See the comments
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* in _SysIntVecAlloc() for more information regarding IRQ virtualization.
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*
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* RETURNS: N/A
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*/
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void irq_enable(unsigned int irq)
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{
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if (irq < IOAPIC_NUM_RTES) {
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_ioapic_irq_enable(irq);
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} else {
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_loapic_irq_enable(irq - IOAPIC_NUM_RTES);
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}
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}
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/*******************************************************************************
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*
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* irq_disable - disable an individual interrupt (IRQ)
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*
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* The irq_disable() routine is provided by the BSP due to the
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* IRQ virtualization that is performed by this BSP. See the comments
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* in _SysIntVecAlloc() for more information regarding IRQ virtualization.
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*
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* RETURNS: N/A
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*/
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void irq_disable(unsigned int irq)
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{
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if (irq < IOAPIC_NUM_RTES) {
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_ioapic_irq_disable(irq);
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} else {
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_loapic_irq_disable(irq - IOAPIC_NUM_RTES);
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}
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}
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