66 lines
2.6 KiB
C
66 lines
2.6 KiB
C
/* irq_init.c - ARM Cortex-M interrupt initialization */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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The ARM Cortex-M architecture provides its own fiber_abort() to deal with
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different CPU modes (handler vs thread) when a fiber aborts. When its entry
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point returns or when it aborts itself, the CPU is in thread mode and must
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call _Swap() (which triggers a service call), but when in handler mode, the
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CPU must exit handler mode to cause the context switch, and thus must queue
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the PendSV exception.
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*/
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#include <toolchain.h>
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#include <sections.h>
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#include <nanokernel.h>
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#include <nanokernel/cpu.h>
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/*******************************************************************************
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*
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* _IntLibInit - initialize interrupts
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*
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* Ensures all interrupts have their priority set to _EXC_IRQ_DEFAULT_PRIO and
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* not 0, which they have it set to when coming out of reset. This ensures that
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* interrupt locking via BASEPRI works as expected.
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*
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* RETURNS: N/A
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*/
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void _IntLibInit(void)
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{
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int irq = 0;
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for (; irq < CONFIG_NUM_IRQS; irq++) {
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_NvicIrqPrioSet(irq, _EXC_IRQ_DEFAULT_PRIO);
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}
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}
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