94 lines
3.2 KiB
ArmAsm
94 lines
3.2 KiB
ArmAsm
/* reset_s.s - reset handler */
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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Reset handler that prepares the system for running C code.
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*/
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#define _ASMLANGUAGE
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#include <board.h>
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#include <toolchain.h>
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#include <sections.h>
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#include <nanokernel/cpu.h>
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#include "vector_table.h"
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_ASM_FILE_PROLOGUE
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GTEXT(__reset)
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/*******************************************************************************
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*
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* __reset - reset vector
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*
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* Ran when the system comes out of reset. The processor is in thread mode with
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* privileged level. At this point, the main stack pointer (MSP) is already
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* pointing to a valid area in SRAM.
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*
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* Locking interrupts prevents anything but NMIs and hard faults from
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* interrupting the CPU. A default NMI handler is already in place in the
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* vector table, and the boot code should not generate hard fault, or we're in
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* deep trouble.
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*
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* We want to use the process stack pointer (PSP) instead of the MSP, since the
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* MSP is to be set up to point to the one-and-only interrupt stack during later
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* boot. That would not be possible if in use for running C code.
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*
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* When these steps are completed, jump to _PrepC(), which will finish setting
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* up the system for running C code.
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*
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* RETURNS: N/A
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*/
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SECTION_FUNC(TEXT,__reset)
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/* lock interrupts: will get unlocked when switch to main task */
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movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
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msr BASEPRI, r0
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/*
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* Set PSP and use it to boot without using MSP, so that it
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* gets set to _InterruptStack during nanoInit().
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*/
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ldr r0, =__CORTEXM_BOOT_PSP
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msr PSP, r0
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movs.n r0, #2 /* switch to using PSP (bit1 of CONTROL reg) */
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msr CONTROL, r0
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#ifdef CONFIG_WDOG_INIT
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/* board-specific watchdog initialization is necessary */
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bl _WdogInit
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#endif
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b _PrepC
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