248 lines
7.2 KiB
C
248 lines
7.2 KiB
C
/* arcv2_timer0.c - ARC timer 0 device driver */
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/*
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* Copyright (c) 2014-2015 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module implements a VxMicro device driver for the ARCv2 processor timer 0
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and provides the standard "system clock driver" interfaces.
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\INTERNAL IMPLEMENTATION DETAILS
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The ARCv2 processor timer provides a 32-bit incrementing, wrap-to-zero counter.
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*/
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#include <nanokernel.h>
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#include <nanokernel/cpu.h>
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#include <toolchain.h>
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#include <sections.h>
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#include <misc/__assert.h>
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#include <nanokernel/arc/v2/aux_regs.h>
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#include <clock_vars.h>
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#include <drivers/system_timer.h>
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/*
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* A board support package's board.h header must provide definitions for the
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* following constants:
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*
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* CONFIG_ARCV2_TIMER0_CLOCK_FREQ
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*
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* This is the sysTick input clock frequency.
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*/
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#include <board.h>
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#define _ARC_V2_TMR_CTRL_IE 0x1 /* interrupt enable */
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#define _ARC_V2_TMR_CTRL_NH 0x2 /* count only while not halted */
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#define _ARC_V2_TMR_CTRL_W 0x4 /* watchdog mode enable */
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#define _ARC_V2_TMR_CTRL_IP 0x8 /* interrupt pending flag */
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/* running total of timer count */
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static uint32_t accumulatedCount = 0;
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/*******************************************************************************
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*
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* enable - enable the timer with the given limit/countup value
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*
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* This routine sets up the timer for operation by:
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* - setting value to which the timer will count up to;
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* - setting the timer's start value to zero; and
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* - enabling interrupt generation.
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*
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* RETURNS: N/A
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*
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* \NOMANUAL
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*/
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static ALWAYS_INLINE void enable(
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uint32_t count /* interrupt triggers when up-counter reaches this value */
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)
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{
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_LIMIT, count); /* write limit value */
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/* count only when not halted for debug and enable interrupts */
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL,
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_ARC_V2_TMR_CTRL_NH | _ARC_V2_TMR_CTRL_IE);
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, 0); /* write the start value */
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}
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/*******************************************************************************
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*
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* count_get - get the current counter value
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*
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* This routine gets the value from the timer's count register. This
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* value is the 'time' elapsed from the starting count (assumed to be 0).
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*
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* RETURNS: the current counter value
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*
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* \NOMANUAL
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*/
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static ALWAYS_INLINE uint32_t count_get(void)
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{
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return _arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
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}
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/*******************************************************************************
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*
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* limit_get - get the limit/countup value
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*
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* This routine gets the value from the timer's limit register, which is the
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* value to which the timer will count up to.
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*
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* RETURNS: the limit value
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*
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* \NOMANUAL
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*/
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static ALWAYS_INLINE uint32_t limit_get(void)
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{
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return _arc_v2_aux_reg_read(_ARC_V2_TMR0_LIMIT);
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}
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/*******************************************************************************
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*
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* _timer_int_handler - system clock periodic tick handler
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*
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* This routine handles the system clock periodic tick interrupt. A TICK_EVENT
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* event is pushed onto the microkernel stack.
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*
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* RETURNS: N/A
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*
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* \NOMANUAL
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*/
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void _timer_int_handler(void *unused)
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{
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uint32_t zero_ip_bit = _ARC_V2_TMR_CTRL_NH | _ARC_V2_TMR_CTRL_IE;
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ARG_UNUSED(unused);
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/* clear the interrupt by writing 0 to IP bit of the control register */
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, zero_ip_bit);
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accumulatedCount += sys_clock_hw_cycles_per_tick;
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nanoTicks++;
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if (nanoTimerList) {
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nanoTimerList->ticks--;
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while (nanoTimerList && (!nanoTimerList->ticks)) {
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struct nano_timer *expired = nanoTimerList;
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struct nano_lifo *lifo = &expired->lifo;
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nanoTimerList = expired->link;
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nano_fiber_lifo_put(lifo, expired->userData);
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}
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}
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}
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/*******************************************************************************
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*
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* timer_driver - initialize and enable the system clock
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*
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* This routine is used to program the ARCv2 timer to deliver interrupts at the
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* rate specified via the 'sys_clock_us_per_tick' global variable.
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*
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* RETURNS: N/A
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*/
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void timer_driver(
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int priority /* priority parameter ignored by this driver */
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)
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{
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int irq = CONFIG_ARCV2_TIMER0_INT_LVL;
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int prio = CONFIG_ARCV2_TIMER0_INT_PRI;
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ARG_UNUSED(priority);
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/* ensure that the timer will not generate interrupts */
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, 0);
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, 0); /* clear the count value */
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(void)irq_connect(irq, prio, _timer_int_handler, 0);
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/*
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* Set the reload value to achieve the configured tick rate, enable the
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* counter and interrupt generation.
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*/
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enable(sys_clock_hw_cycles_per_tick - 1);
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/* everything has been configured: safe to enable the interrupt */
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irq_enable(CONFIG_ARCV2_TIMER0_INT_LVL);
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}
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/*******************************************************************************
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*
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* timer_read - read the BSP timer hardware
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*
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* This routine returns the current time in terms of timer hardware clock cycles.
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*
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* RETURNS: up counter of elapsed clock cycles
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*/
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uint32_t timer_read(void)
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{
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return (accumulatedCount + count_get());
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}
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#if defined(CONFIG_SYSTEM_TIMER_DISABLE)
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/*******************************************************************************
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*
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* timer_disable - stop announcing ticks into the kernel
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*
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* This routine disables timer interrupt generation and delivery.
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* Note that the timer's counting cannot be stopped by software.
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*
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* RETURNS: N/A
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*/
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void timer_disable(void)
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{
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unsigned int key; /* interrupt lock level */
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uint32_t ctrl_val; /* timer control register value */
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key = irq_lock();
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/* disable interrupt generation */
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ctrl_val = _arc_v2_aux_reg_read(_ARC_V2_TMR0_CONTROL);
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_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, ctrl_val & ~_ARC_V2_TMR_CTRL_IE);
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irq_unlock(key);
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/* disable interrupt in the interrupt controller */
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irq_disable(CONFIG_ARCV2_TIMER0_INT_LVL);
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}
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#endif /* CONFIG_SYSTEM_TIMER_DISABLE */
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