104 lines
3.6 KiB
C
104 lines
3.6 KiB
C
/* arcv2_irq_unit.c - ARCv2 Interrupt Unit device driver */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* DESCRIPTION
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* The ARCv2 interrupt unit has 16 allocated exceptions associated with
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* vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
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* The interrupt unit is optional in the ARCv2-based processors. When
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* building a processor, you can configure the processor to include an
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* interrupt unit. The ARCv2 interrupt unit is highly programmable.
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*/
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#include <nanokernel.h>
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#include <nanokernel/cpu.h>
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#include <board.h>
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/*
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* _arc_v2_irq_unit_init - initialize the interrupt unit device driver
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*
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* Initializes the interrupt unit device driver and the device
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* itself.
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*
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* Interrupts are still locked at this point, so there is no need to protect
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* the window between a write to IRQ_SELECT and subsequent writes to the
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* selected IRQ's registers.
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*
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* RETURNS: N/A
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*/
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void _arc_v2_irq_unit_init(void)
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{
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int irq; /* the interrupt index */
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for (irq = 16; irq < 256; irq++) {
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, 1);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, _ARC_V2_INT_DISABLE);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, _ARC_V2_INT_LEVEL);
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}
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}
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/*
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* _arc_v2_irq_unit_int_eoi - send EOI signal to interrupt unit
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*
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* This routine sends an EOI (End Of Interrupt) signal to the interrupt unit
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* to clear a pulse-triggered interrupt.
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*
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* Interrupts must be locked or the ISR operating at P0 when invoking this
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* function.
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*
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* RETURNS: N/A
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*/
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void _arc_v2_irq_unit_int_eoi(int irq)
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{
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_PULSE_CANCEL, 1);
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}
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/*
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* _arc_v2_irq_unit_int_trigger_set - sets an IRQ line to level/pulse trigger
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*
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* Sets the IRQ line <irq> to trigger an interrupt based on the level or the
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* edge of the signal. Valid values for <trigger> are _ARC_V2_INT_LEVEL and
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* _ARC_V2_INT_PULSE.
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*
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* RETURNS: N/A
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*/
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void _arc_v2_irq_unit_trigger_set(int irq, unsigned int trigger)
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{
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, trigger);
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}
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