2012-01-15 01:02:43 +01:00
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// Standard VGA IO port access
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//
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// Copyright (C) 2012 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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2012-01-28 05:09:02 +01:00
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#include "farptr.h" // GET_FARVAR
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2016-08-05 17:48:20 +02:00
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#include "stdvga.h" // VGAREG_PEL_MASK
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2013-09-19 03:41:48 +02:00
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#include "x86.h" // inb
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2012-01-15 01:02:43 +01:00
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u8
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stdvga_pelmask_read(void)
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{
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return inb(VGAREG_PEL_MASK);
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}
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void
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stdvga_pelmask_write(u8 value)
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{
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outb(value, VGAREG_PEL_MASK);
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}
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u8
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stdvga_misc_read(void)
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{
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return inb(VGAREG_READ_MISC_OUTPUT);
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}
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void
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stdvga_misc_write(u8 value)
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{
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outb(value, VGAREG_WRITE_MISC_OUTPUT);
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}
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void
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stdvga_misc_mask(u8 off, u8 on)
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{
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stdvga_misc_write((stdvga_misc_read() & ~off) | on);
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}
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u8
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stdvga_sequ_read(u8 index)
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{
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outb(index, VGAREG_SEQU_ADDRESS);
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return inb(VGAREG_SEQU_DATA);
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}
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void
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stdvga_sequ_write(u8 index, u8 value)
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{
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outw((value<<8) | index, VGAREG_SEQU_ADDRESS);
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}
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void
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stdvga_sequ_mask(u8 index, u8 off, u8 on)
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{
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outb(index, VGAREG_SEQU_ADDRESS);
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u8 v = inb(VGAREG_SEQU_DATA);
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outb((v & ~off) | on, VGAREG_SEQU_DATA);
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}
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u8
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stdvga_grdc_read(u8 index)
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{
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outb(index, VGAREG_GRDC_ADDRESS);
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return inb(VGAREG_GRDC_DATA);
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}
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void
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stdvga_grdc_write(u8 index, u8 value)
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{
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outw((value<<8) | index, VGAREG_GRDC_ADDRESS);
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}
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void
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stdvga_grdc_mask(u8 index, u8 off, u8 on)
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{
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outb(index, VGAREG_GRDC_ADDRESS);
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u8 v = inb(VGAREG_GRDC_DATA);
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outb((v & ~off) | on, VGAREG_GRDC_DATA);
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}
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u8
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stdvga_crtc_read(u16 crtc_addr, u8 index)
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{
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outb(index, crtc_addr);
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return inb(crtc_addr + 1);
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}
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void
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stdvga_crtc_write(u16 crtc_addr, u8 index, u8 value)
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{
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outw((value<<8) | index, crtc_addr);
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}
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void
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stdvga_crtc_mask(u16 crtc_addr, u8 index, u8 off, u8 on)
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{
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outb(index, crtc_addr);
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u8 v = inb(crtc_addr + 1);
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outb((v & ~off) | on, crtc_addr + 1);
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}
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u8
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stdvga_attr_read(u8 index)
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{
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inb(VGAREG_ACTL_RESET);
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u8 orig = inb(VGAREG_ACTL_ADDRESS);
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outb(index, VGAREG_ACTL_ADDRESS);
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u8 v = inb(VGAREG_ACTL_READ_DATA);
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inb(VGAREG_ACTL_RESET);
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outb(orig, VGAREG_ACTL_ADDRESS);
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return v;
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}
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void
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stdvga_attr_write(u8 index, u8 value)
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{
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inb(VGAREG_ACTL_RESET);
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u8 orig = inb(VGAREG_ACTL_ADDRESS);
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outb(index, VGAREG_ACTL_ADDRESS);
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outb(value, VGAREG_ACTL_WRITE_DATA);
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outb(orig, VGAREG_ACTL_ADDRESS);
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}
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void
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stdvga_attr_mask(u8 index, u8 off, u8 on)
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{
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inb(VGAREG_ACTL_RESET);
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u8 orig = inb(VGAREG_ACTL_ADDRESS);
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outb(index, VGAREG_ACTL_ADDRESS);
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u8 v = inb(VGAREG_ACTL_READ_DATA);
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outb((v & ~off) | on, VGAREG_ACTL_WRITE_DATA);
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outb(orig, VGAREG_ACTL_ADDRESS);
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}
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u8
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stdvga_attrindex_read(void)
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{
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inb(VGAREG_ACTL_RESET);
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return inb(VGAREG_ACTL_ADDRESS);
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}
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void
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stdvga_attrindex_write(u8 value)
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{
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inb(VGAREG_ACTL_RESET);
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outb(value, VGAREG_ACTL_ADDRESS);
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}
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2024-04-01 19:44:58 +02:00
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struct vbe_palette_entry
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stdvga_dac_read(u8 color)
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2012-01-15 01:02:43 +01:00
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{
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2024-04-01 19:44:58 +02:00
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outb(color, VGAREG_DAC_READ_ADDRESS);
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u8 r = inb(VGAREG_DAC_DATA);
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u8 g = inb(VGAREG_DAC_DATA);
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u8 b = inb(VGAREG_DAC_DATA);
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return (struct vbe_palette_entry){ .red=r, .green=g, .blue=b };
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2012-01-15 01:02:43 +01:00
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}
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void
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2024-04-01 19:44:58 +02:00
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stdvga_dac_write(u8 color, struct vbe_palette_entry rgb)
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{
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outb(color, VGAREG_DAC_WRITE_ADDRESS);
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outb(rgb.red, VGAREG_DAC_DATA);
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outb(rgb.green, VGAREG_DAC_DATA);
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outb(rgb.blue, VGAREG_DAC_DATA);
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2012-01-15 01:02:43 +01:00
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}
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