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seabios
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Remove ioport.h; disperse its contents to other header files. 

Move the inb(), insb(), etc. code from ioport.h to x86.h.  Move the
PORT_* definitions to their appropriate hardware files.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2013-09-18 21:41:48 -04:00
parent 7b9f29736a
commit 4ade523a9d
36 changed files with 179 additions and 179 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/apm.c
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@ -10,10 +10,10 @@
#include "bregs.h" // struct bregs
#include "config.h" // CONFIG_*
#include "fw/paravirt.h" // runningOnQEMU
#include "ioport.h" // outb
#include "output.h" // dprintf
#include "stacks.h" // yield_toirq
#include "util.h" // apm_shutdown
#include "x86.h" // outb
static void
out_str(const char *str_cs)

2
src/farptr.h
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@ -6,7 +6,7 @@
#ifndef __FARPTR_H
#define __FARPTR_H
#include "ioport.h" // insb
#include "x86.h" // insb
// Dummy definitions used to make sure gcc understands dependencies
// between SET_SEG and GET/READ/WRITE_SEG macros.

1
src/fw/acpi.c
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@ -11,7 +11,6 @@
#include "hw/pci.h" // pci_find_init_device
#include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL
#include "hw/pci_regs.h" // PCI_INTERRUPT_LINE
#include "ioport.h" // inl
#include "malloc.h" // free
#include "output.h" // dprintf
#include "paravirt.h" // RamSize

1
src/fw/paravirt.c
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@ -13,7 +13,6 @@
#include "hw/pci.h" // create_pirtable
#include "hw/pci_regs.h" // PCI_DEVICE_ID
#include "hw/rtc.h" // CMOS_*
#include "ioport.h" // outw
#include "malloc.h" // malloc_tmp
#include "memmap.h" // add_e820
#include "output.h" // dprintf

9
src/fw/paravirt.h
View File

@ -24,6 +24,15 @@ static inline int runningOnKVM(void) {
return CONFIG_QEMU && GET_GLOBAL(PlatformRunningOn) & PF_KVM;
}
// Common paravirt ports.
#define PORT_SMI_CMD 0x00b2
#define PORT_SMI_STATUS 0x00b3
#define PORT_QEMU_CFG_CTL 0x0510
#define PORT_QEMU_CFG_DATA 0x0511
#define PORT_ACPI_PM_BASE 0xb000
#define PORT_SMB_BASE 0xb100
#define PORT_BIOS_APM 0x8900
void qemu_preinit(void);
void qemu_platform_setup(void);
void qemu_cfg_init(void);

3
src/fw/pciinit.c
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@ -7,10 +7,10 @@
#include "config.h" // CONFIG_*
#include "dev-q35.h" // Q35_HOST_BRIDGE_PCIEXBAR_ADDR
#include "hw/ata.h" // PORT_ATA1_CMD_BASE
#include "hw/pci.h" // pci_config_readl
#include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL
#include "hw/pci_regs.h" // PCI_COMMAND
#include "ioport.h" // PORT_ATA1_CMD_BASE
#include "list.h" // struct hlist_node
#include "malloc.h" // free
#include "memmap.h" // add_e820
@ -18,6 +18,7 @@
#include "paravirt.h" // RamSize
#include "string.h" // memset
#include "util.h" // pci_setup
#include "x86.h" // outb
#define PCI_DEVICE_MEM_MIN 0x1000
#define PCI_BRIDGE_IO_MIN 0x1000

2
src/fw/smm.c
View File

@ -10,8 +10,8 @@
#include "hw/pci.h" // pci_config_writel
#include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL
#include "hw/pci_regs.h" // PCI_DEVICE_ID
#include "ioport.h" // outb
#include "output.h" // dprintf
#include "paravirt.h" // PORT_SMI_STATUS
#include "string.h" // memcpy
#include "util.h" // smm_setup
#include "x86.h" // wbinvd

2
src/hw/ahci.c
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@ -8,7 +8,6 @@
#include "ata.h" // ATA_CB_STAT
#include "biosvar.h" // GET_GLOBAL
#include "blockcmd.h" // CDB_CMD_READ_10
#include "ioport.h" // inb
#include "malloc.h" // free
#include "output.h" // dprintf
#include "pci.h" // foreachpci
@ -18,6 +17,7 @@
#include "std/disk.h" // DISK_RET_SUCCESS
#include "string.h" // memset
#include "util.h" // timer_calc
#include "x86.h" // inb
#define AHCI_REQUEST_TIMEOUT 32000 // 32 seconds max for IDE ops
#define AHCI_RESET_TIMEOUT 500 // 500 miliseconds

2
src/hw/ata.c
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@ -10,7 +10,6 @@
#include "block.h" // struct drive_s
#include "blockcmd.h" // CDB_CMD_READ_10
#include "byteorder.h" // be16_to_cpu
#include "ioport.h" // inb
#include "malloc.h" // malloc_fseg
#include "output.h" // dprintf
#include "pci.h" // foreachpci
@ -21,6 +20,7 @@
#include "std/disk.h" // DISK_RET_SUCCESS
#include "string.h" // memset
#include "util.h" // timer_calc
#include "x86.h" // inb
#define IDE_TIMEOUT 32000 //32 seconds max for IDE ops

5
src/hw/ata.h
View File

@ -29,6 +29,11 @@ int atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize);
void ata_setup(void);
int process_ata_op(struct disk_op_s *op);
#define PORT_ATA2_CMD_BASE 0x0170
#define PORT_ATA1_CMD_BASE 0x01f0
#define PORT_ATA2_CTRL_BASE 0x0374
#define PORT_ATA1_CTRL_BASE 0x03f4
// Global defines -- ATA register and register bits.
// command block & control block regs
#define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0

13
src/hw/dma.c
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@ -5,8 +5,19 @@
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "ioport.h" // PORT_DMA1_MASK_REG
#include "util.h" // dma_setup
#include "x86.h" // outb
#define PORT_DMA_ADDR_2 0x0004
#define PORT_DMA_CNT_2 0x0005
#define PORT_DMA1_MASK_REG 0x000a
#define PORT_DMA1_MODE_REG 0x000b
#define PORT_DMA1_CLEAR_FF_REG 0x000c
#define PORT_DMA1_MASTER_CLEAR 0x000d
#define PORT_DMA_PAGE_2 0x0081
#define PORT_DMA2_MASK_REG 0x00d4
#define PORT_DMA2_MODE_REG 0x00d6
#define PORT_DMA2_MASTER_CLEAR 0x00da
// Setup the DMA controller for a floppy transfer.
int

6
src/hw/floppy.c
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@ -21,6 +21,12 @@
#include "string.h" // memset
#include "util.h" // timer_calc
#define PORT_FD_BASE 0x03f0
#define PORT_FD_DOR 0x03f2
#define PORT_FD_STATUS 0x03f4
#define PORT_FD_DATA 0x03f5
#define PORT_FD_DIR 0x03f7
#define FLOPPY_SIZE_CODE 0x02 // 512 byte sectors
#define FLOPPY_DATALEN 0xff // Not used - because size code is 0x02
#define FLOPPY_MOTOR_TICKS 37 // ~2 seconds

1
src/hw/pci.c
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@ -7,7 +7,6 @@
#include "config.h" // CONFIG_*
#include "farptr.h" // MAKE_FLATPTR
#include "ioport.h" // outl
#include "malloc.h" // malloc_tmp
#include "output.h" // dprintf
#include "pci.h" // pci_config_writel

4
src/hw/pci.h
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@ -4,6 +4,10 @@
#include "types.h" // u32
#include "list.h" // hlist_node
#define PORT_PCI_CMD 0x0cf8
#define PORT_PCI_REBOOT 0x0cf9
#define PORT_PCI_DATA 0x0cfc
#define PCI_ROM_SLOT 6
#define PCI_NUM_REGIONS 7
#define PCI_BRIDGE_NUM_REGIONS 2

7
src/hw/pic.h
View File

@ -7,7 +7,12 @@
#ifndef __PIC_H
#define __PIC_H
#include "ioport.h" // PORT_PIC*
#include "x86.h" // outb
#define PORT_PIC1_CMD 0x0020
#define PORT_PIC1_DATA 0x0021
#define PORT_PIC2_CMD 0x00a0
#define PORT_PIC2_DATA 0x00a1
// PORT_PIC1 bitdefs
#define PIC1_IRQ0 (1<<0)

2
src/hw/ps2port.c
View File

@ -6,13 +6,13 @@
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "biosvar.h" // GET_LOW
#include "ioport.h" // inb
#include "output.h" // dprintf
#include "pic.h" // pic_eoi1
#include "ps2port.h" // ps2_kbd_command
#include "romfile.h" // romfile_loadint
#include "stacks.h" // yield
#include "util.h" // udelay
#include "x86.h" // inb
/****************************************************************

14
src/hw/ps2port.h
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@ -2,7 +2,13 @@
#ifndef __PS2PORT_H
#define __PS2PORT_H
#include "types.h" // u8
#define PORT_PS2_DATA 0x0060
#define PORT_PS2_CTRLB 0x0061
#define PORT_PS2_STATUS 0x0064
#define PORT_A20 0x0092
// PORT_A20 bitdefs
#define A20_ENABLE_BIT 0x02
// Standard commands.
#define I8042_CMD_CTL_RCTR 0x0120
@ -54,10 +60,16 @@
#define I8042_CTR_AUXDIS 0x20
#define I8042_CTR_XLATE 0x40
#ifndef __ASSEMBLY__
#include "types.h" // u8
// functions
void i8042_reboot(void);
int ps2_kbd_command(int command, u8 *param);
int ps2_mouse_command(int command, u8 *param);
void ps2port_setup(void);
#endif // !__ASSEMBLY__
#endif // ps2port.h

2
src/hw/rtc.c
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@ -6,10 +6,10 @@
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "biosvar.h" // GET_LOW
#include "ioport.h" // inb
#include "rtc.h" // rtc_read
#include "stacks.h" // yield
#include "util.h" // timer_calc
#include "x86.h" // inb
u8
rtc_read(u8 index)

6
src/hw/rtc.h
View File

@ -1,6 +1,12 @@
#ifndef __RTC_H
#define __RTC_H
#define PORT_CMOS_INDEX 0x0070
#define PORT_CMOS_DATA 0x0071
// PORT_CMOS_INDEX nmi disable bit
#define NMI_DISABLE_BIT 0x80
// Standard BIOS RTC chip entries
#define CMOS_RTC_SECONDS 0x00
#define CMOS_RTC_SECONDS_ALARM 0x01

21
src/hw/serialio.h Normal file
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@ -0,0 +1,21 @@
#ifndef __SERIALIO_H
#define __SERIALIO_H
#define PORT_LPT2 0x0278
#define PORT_SERIAL4 0x02e8
#define PORT_SERIAL2 0x02f8
#define PORT_LPT1 0x0378
#define PORT_SERIAL3 0x03e8
#define PORT_SERIAL1 0x03f8
// Serial port offsets
#define SEROFF_DATA 0
#define SEROFF_DLL 0
#define SEROFF_IER 1
#define SEROFF_DLH 1
#define SEROFF_IIR 2
#define SEROFF_LCR 3
#define SEROFF_LSR 5
#define SEROFF_MSR 6
#endif // serialio.h

9
src/hw/timer.c
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@ -1,4 +1,4 @@
// Internal timer support.
// Internal timer and Intel 8253 Programmable Interrupt Timer (PIT) support.
//
// Copyright (C) 2008-2013 Kevin O'Connor <kevin@koconnor.net>
//
@ -6,12 +6,17 @@
#include "biosvar.h" // GET_LOW
#include "config.h" // CONFIG_*
#include "ioport.h" // PORT_PIT_MODE
#include "output.h" // dprintf
#include "ps2port.h" // PORT_PS2_CTRLB
#include "stacks.h" // yield
#include "util.h" // timer_setup
#include "x86.h" // cpuid
#define PORT_PIT_COUNTER0 0x0040
#define PORT_PIT_COUNTER1 0x0041
#define PORT_PIT_COUNTER2 0x0042
#define PORT_PIT_MODE 0x0043
// Bits for PORT_PIT_MODE
#define PM_SEL_TIMER0 (0<<6)
#define PM_SEL_TIMER1 (1<<6)

1
src/hw/usb-ehci.c
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@ -6,7 +6,6 @@
#include "biosvar.h" // GET_LOWFLAT
#include "config.h" // CONFIG_*
#include "ioport.h" // outw
#include "output.h" // dprintf
#include "malloc.h" // free
#include "pci.h" // pci_bdf_to_bus

2
src/hw/usb-uhci.c
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@ -6,7 +6,6 @@
#include "biosvar.h" // GET_LOWFLAT
#include "config.h" // CONFIG_*
#include "ioport.h" // outw
#include "malloc.h" // free
#include "output.h" // dprintf
#include "pci.h" // pci_bdf_to_bus
@ -15,6 +14,7 @@
#include "usb.h" // struct usb_s
#include "usb-uhci.h" // USBLEGSUP
#include "util.h" // msleep
#include "x86.h" // outw
struct usb_uhci_s {
struct usb_s usb;

2
src/hw/virtio-pci.h
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@ -1,7 +1,7 @@
#ifndef _VIRTIO_PCI_H
#define _VIRTIO_PCI_H
#include "ioport.h" // inl
#include "x86.h" // inl
/* A 32-bit r/o bitmask of the features supported by the host */
#define VIRTIO_PCI_HOST_FEATURES 0

136
src/ioport.h
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@ -1,136 +0,0 @@
// Definitions for X86 IO port access.
//
// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#ifndef __IOPORT_H
#define __IOPORT_H
#define PORT_DMA_ADDR_2 0x0004
#define PORT_DMA_CNT_2 0x0005
#define PORT_DMA1_MASK_REG 0x000a
#define PORT_DMA1_MODE_REG 0x000b
#define PORT_DMA1_CLEAR_FF_REG 0x000c
#define PORT_DMA1_MASTER_CLEAR 0x000d
#define PORT_PIC1_CMD 0x0020
#define PORT_PIC1_DATA 0x0021
#define PORT_PIT_COUNTER0 0x0040
#define PORT_PIT_COUNTER1 0x0041
#define PORT_PIT_COUNTER2 0x0042
#define PORT_PIT_MODE 0x0043
#define PORT_PS2_DATA 0x0060
#define PORT_PS2_CTRLB 0x0061
#define PORT_PS2_STATUS 0x0064
#define PORT_CMOS_INDEX 0x0070
#define PORT_CMOS_DATA 0x0071
#define PORT_DIAG 0x0080
#define PORT_DMA_PAGE_2 0x0081
#define PORT_A20 0x0092
#define PORT_PIC2_CMD 0x00a0
#define PORT_PIC2_DATA 0x00a1
#define PORT_SMI_CMD 0x00b2
#define PORT_SMI_STATUS 0x00b3
#define PORT_DMA2_MASK_REG 0x00d4
#define PORT_DMA2_MODE_REG 0x00d6
#define PORT_DMA2_MASTER_CLEAR 0x00da
#define PORT_MATH_CLEAR 0x00f0
#define PORT_ATA2_CMD_BASE 0x0170
#define PORT_ATA1_CMD_BASE 0x01f0
#define PORT_LPT2 0x0278
#define PORT_SERIAL4 0x02e8
#define PORT_SERIAL2 0x02f8
#define PORT_ATA2_CTRL_BASE 0x0374
#define PORT_LPT1 0x0378
#define PORT_SERIAL3 0x03e8
#define PORT_ATA1_CTRL_BASE 0x03f4
#define PORT_FD_BASE 0x03f0
#define PORT_FD_DOR 0x03f2
#define PORT_FD_STATUS 0x03f4
#define PORT_FD_DATA 0x03f5
#define PORT_HD_DATA 0x03f6
#define PORT_FD_DIR 0x03f7
#define PORT_SERIAL1 0x03f8
#define PORT_PCI_CMD 0x0cf8
#define PORT_PCI_REBOOT 0x0cf9
#define PORT_PCI_DATA 0x0cfc
#define PORT_BIOS_DEBUG 0x0402
#define PORT_QEMU_CFG_CTL 0x0510
#define PORT_QEMU_CFG_DATA 0x0511
#define PORT_ACPI_PM_BASE 0xb000
#define PORT_SMB_BASE 0xb100
#define PORT_BIOS_APM 0x8900
// Serial port offsets
#define SEROFF_DATA 0
#define SEROFF_DLL 0
#define SEROFF_IER 1
#define SEROFF_DLH 1
#define SEROFF_IIR 2
#define SEROFF_LCR 3
#define SEROFF_LSR 5
#define SEROFF_MSR 6
// PORT_A20 bitdefs
#define A20_ENABLE_BIT 0x02
// PORT_CMOS_INDEX nmi disable bit
#define NMI_DISABLE_BIT 0x80
#ifndef __ASSEMBLY__
#include "types.h" // u8
static inline void outb(u8 value, u16 port) {
__asm__ __volatile__("outb %b0, %w1" : : "a"(value), "Nd"(port));
}
static inline void outw(u16 value, u16 port) {
__asm__ __volatile__("outw %w0, %w1" : : "a"(value), "Nd"(port));
}
static inline void outl(u32 value, u16 port) {
__asm__ __volatile__("outl %0, %w1" : : "a"(value), "Nd"(port));
}
static inline u8 inb(u16 port) {
u8 value;
__asm__ __volatile__("inb %w1, %b0" : "=a"(value) : "Nd"(port));
return value;
}
static inline u16 inw(u16 port) {
u16 value;
__asm__ __volatile__("inw %w1, %w0" : "=a"(value) : "Nd"(port));
return value;
}
static inline u32 inl(u16 port) {
u32 value;
__asm__ __volatile__("inl %w1, %0" : "=a"(value) : "Nd"(port));
return value;
}
static inline void insb(u16 port, u8 *data, u32 count) {
asm volatile("rep insb (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insw(u16 port, u16 *data, u32 count) {
asm volatile("rep insw (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insl(u16 port, u32 *data, u32 count) {
asm volatile("rep insl (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
// XXX - outs not limited to es segment
static inline void outsb(u16 port, u8 *data, u32 count) {
asm volatile("rep outsb %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsw(u16 port, u16 *data, u32 count) {
asm volatile("rep outsw %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsl(u16 port, u32 *data, u32 count) {
asm volatile("rep outsl %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
#endif // !__ASSEMBLY__
#endif // ioport.h

2
src/misc.c
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@ -12,6 +12,8 @@
#include "stacks.h" // call16_int
#include "string.h" // memset
#define PORT_MATH_CLEAR 0x00f0
/****************************************************************
* Misc 16bit ISRs

1
src/output.c
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@ -11,6 +11,7 @@
#include "config.h" // CONFIG_*
#include "biosvar.h" // GET_GLOBAL
#include "fw/paravirt.h" // PlatformRunningOn
#include "hw/serialio.h" // SEROFF_IER
#include "malloc.h" // malloc_tmp
#include "output.h" // dprintf
#include "stacks.h" // call16_int

1
src/resume.c
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@ -11,7 +11,6 @@
#include "hw/pic.h" // pic_eoi2
#include "hw/ps2port.h" // i8042_reboot
#include "hw/rtc.h" // rtc_read
#include "ioport.h" // outb
#include "output.h" // dprintf
#include "stacks.h" // farcall16big
#include "std/bda.h" // struct bios_data_area_s

8
src/romlayout.S
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@ -5,12 +5,12 @@
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "config.h" // CONFIG_*
#include "ioport.h" // PORT_A20
#include "x86.h" // CR0_*
#include "hw/rtc.h" // CMOS_RESET_CODE
#include "asm-offsets.h" // BREGS_*
#include "config.h" // CONFIG_*
#include "entryfuncs.S" // ENTRY_*
#include "hw/ps2port.h" // PORT_A20
#include "hw/rtc.h" // CMOS_RESET_CODE
#include "x86.h" // CR0_*
/****************************************************************

1
src/serial.c
View File

@ -7,6 +7,7 @@
#include "biosvar.h" // SET_BDA
#include "bregs.h" // struct bregs
#include "hw/serialio.h" // SEROFF_IER
#include "output.h" // debug_enter
#include "stacks.h" // yield
#include "util.h" // serial_setup

3
src/system.c
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@ -8,12 +8,13 @@
#include "biosvar.h" // GET_GLOBAL
#include "bregs.h" // struct bregs
#include "hw/pic.h" // pic_reset
#include "ioport.h" // inb
#include "hw/ps2port.h" // PORT_A20
#include "malloc.h" // LegacyRamSize
#include "memmap.h" // E820_RAM
#include "output.h" // debug_enter
#include "string.h" // memcpy_far
#include "util.h" // handle_1553
#include "x86.h" // inb
// Use PS2 System Control port A to set A20 enable
static inline u8

51
src/x86.h
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@ -120,6 +120,57 @@ static inline u32 getesp(void) {
return esp;
}
static inline void outb(u8 value, u16 port) {
__asm__ __volatile__("outb %b0, %w1" : : "a"(value), "Nd"(port));
}
static inline void outw(u16 value, u16 port) {
__asm__ __volatile__("outw %w0, %w1" : : "a"(value), "Nd"(port));
}
static inline void outl(u32 value, u16 port) {
__asm__ __volatile__("outl %0, %w1" : : "a"(value), "Nd"(port));
}
static inline u8 inb(u16 port) {
u8 value;
__asm__ __volatile__("inb %w1, %b0" : "=a"(value) : "Nd"(port));
return value;
}
static inline u16 inw(u16 port) {
u16 value;
__asm__ __volatile__("inw %w1, %w0" : "=a"(value) : "Nd"(port));
return value;
}
static inline u32 inl(u16 port) {
u32 value;
__asm__ __volatile__("inl %w1, %0" : "=a"(value) : "Nd"(port));
return value;
}
static inline void insb(u16 port, u8 *data, u32 count) {
asm volatile("rep insb (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insw(u16 port, u16 *data, u32 count) {
asm volatile("rep insw (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insl(u16 port, u32 *data, u32 count) {
asm volatile("rep insl (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
// XXX - outs not limited to es segment
static inline void outsb(u16 port, u8 *data, u32 count) {
asm volatile("rep outsb %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsw(u16 port, u16 *data, u32 count) {
asm volatile("rep outsw %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsl(u16 port, u32 *data, u32 count) {
asm volatile("rep outsl %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void writel(void *addr, u32 val) {
*(volatile u32 *)addr = val;
}

12
vgasrc/bochsvga.c
View File

@ -15,6 +15,7 @@
#include "std/vbe.h" // VBE_CAPABILITY_8BIT_DAC
#include "stdvga.h" // VGAREG_SEQU_ADDRESS
#include "vgabios.h" // struct vbe_modeinfo
#include "x86.h" // outw
/****************************************************************
@ -130,6 +131,17 @@ bochsvga_list_modes(u16 seg, u16 *dest, u16 *last)
* Helper functions
****************************************************************/
static inline u16 dispi_read(u16 reg)
{
outw(reg, VBE_DISPI_IOPORT_INDEX);
return inw(VBE_DISPI_IOPORT_DATA);
}
static inline void dispi_write(u16 reg, u16 val)
{
outw(reg, VBE_DISPI_IOPORT_INDEX);
outw(val, VBE_DISPI_IOPORT_DATA);
}
int
bochsvga_get_window(struct vgamode_s *vmode_g, int window)
{

12
vgasrc/bochsvga.h
View File

@ -2,7 +2,6 @@
#define __BOCHSVGA_H
#include "types.h" // u8
#include "ioport.h" // outw
#define VBE_DISPI_BANK_ADDRESS 0xA0000
#define VBE_DISPI_BANK_SIZE_KB 64
@ -41,17 +40,6 @@
#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
static inline u16 dispi_read(u16 reg)
{
outw(reg, VBE_DISPI_IOPORT_INDEX);
return inw(VBE_DISPI_IOPORT_DATA);
}
static inline void dispi_write(u16 reg, u16 val)
{
outw(reg, VBE_DISPI_IOPORT_INDEX);
outw(val, VBE_DISPI_IOPORT_DATA);
}
struct vgamode_s *bochsvga_find_mode(int mode);
void bochsvga_list_modes(u16 seg, u16 *dest, u16 *last);
int bochsvga_get_window(struct vgamode_s *vmode_g, int window);

8
vgasrc/stdvga.c
View File

@ -5,12 +5,12 @@
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "vgabios.h" // struct vgamode_s
#include "stdvga.h" // stdvga_setup
#include "ioport.h" // outb
#include "farptr.h" // SET_FARVAR
#include "biosvar.h" // GET_GLOBAL
#include "farptr.h" // SET_FARVAR
#include "stdvga.h" // stdvga_setup
#include "string.h" // memset_far
#include "vgabios.h" // struct vgamode_s
#include "x86.h" // outb
/****************************************************************

4
vgasrc/stdvgaio.c
View File

@ -4,9 +4,9 @@
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "stdvga.h" // stdvga_pelmask_read
#include "farptr.h" // GET_FARVAR
#include "ioport.h" // inb
#include "stdvga.h" // stdvga_pelmask_read
#include "x86.h" // inb
u8
stdvga_pelmask_read(void)