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Jason-ch Chen d13ba18eb0 soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10
The SRCLKENA0 is not pulled down when suspending. The root cause is that
26MHz clock is not disabled when suspending, so we update SPM firmware
to fix this issue.

TEST=verify 26MHz clock off using the oscilloscope.
BUG=b:215639203

Signed-off-by: Jason-ch Chen <jason-ch.chen@mediatek.com>
Change-Id: Iccaea858ff37cc3934c9a9a64bce7edf7cb0fbf1
2022-02-24 18:59:00 +08:00
cpu cpu/amd/model_10xx: Drop unused microcode 2020-11-11 17:38:12 +00:00
mainboard mb/google/guybrush: Add SPL table 2022-02-14 21:14:23 +08:00
northbridge systemagent-r6.bin: Relocate the DACHE_RAM_BASE 2019-06-06 11:42:21 +02:00
pi/amd pi/amd/00660F01/FP4/AGESA.bin: Remove execute file mode bit 2020-10-17 14:38:22 +02:00
soc soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10 2022-02-24 18:59:00 +08:00
southbridge/amd 3rdparty/blobs/soc/amd: Create stoneyridge 2017-12-18 09:55:41 -07:00
README.md README.md: Make contents Markdown-friendlier 2020-05-30 15:44:03 +02:00

README.md

coreboot binary policy v1.0

While coreboot attempts to be binary free, some coreboot mainboards require vendor binaries to support silicon and features. It is an unfortunate fact, as silicon has become more complicated, vendors are using more binaries to support their silicon. The coreboot community can not control the vendors, nor completely eliminate binaries, but it can set standards and expectations for vendor participation. coreboot needs policies and guidelines to meet GPL licence requirements and to organize and maintain standards within coreboot.

To accept binaries in coreboot 3rdparty/blobs repository, the binary must meet the following:

1. A publicly available (published) ABI

  • In case of non-ISA binary, documented usage conventions are required

  • Examples:

    • The Intel® Firmware Support Package: External Architecture Specification v.1.0
    • The PCI firmware specification is the ABI for a standard PCI video BIOS.
    • Vendor microcode loading and placement instructions

2. Appropriate license (redistributable)

The binary must be accompanied by a distribution license. The license must allow unlimited redistribution to allow coreboot contributors to create coreboot images for third parties which contain this and other blobs.

3. Linking

Source code linked into coreboot may not be committed to the binary repository. Such source code and header files must be committed to the coreboot repository instead.

4. Binary version

The binary must contain the version and how to extract the version must be published in the ABI

5. Release notes - updated with each version

Each binary release must be accompanied by a release note that contains all of the following (if a field is unknown or unavailable, mark it as unknown or N/A):

* version
* release date
* supported silicon
* instructions, requirements, and dependencies
* changes since the last version
* errata, known issues
* toolchain version(s), if applicable
* ABI version and link to the published ABI (in the binary repository)

6. Good commit message

The commit message should summarize the release note and contain any additional information that might be specific to coreboot. It is helpful to indicate how the binary was tested within coreboot and list any known exceptions or errata.