x86: always build the page fault handler
Previously, this was only built if CONFIG_EXCEPTION_DEBUG was enabled, but CONFIG_USERSPACE needs it too for validating strings sent in from user mode. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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@ -308,7 +308,7 @@ static void dump_entry_flags(x86_page_entry_data_t flags)
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"Writable" : "Read-only",
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flags & (x86_page_entry_data_t)MMU_ENTRY_USER ?
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"User" : "Supervisor");
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#endif
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#endif /* CONFIG_X86_PAE_MODE */
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}
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static void dump_mmu_flags(void *addr)
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@ -323,34 +323,16 @@ static void dump_mmu_flags(void *addr)
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printk("PTE: ");
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dump_entry_flags(pte_flags);
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}
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#endif
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#endif /* CONFIG_X86_MMU */
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#ifdef CONFIG_USERSPACE
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Z_EXC_DECLARE(z_arch_user_string_nlen);
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static const struct z_exc_handle exceptions[] = {
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Z_EXC_HANDLE(z_arch_user_string_nlen)
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};
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#endif
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void page_fault_handler(NANO_ESF *pEsf)
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static void dump_page_fault(NANO_ESF *esf)
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{
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u32_t err, cr2;
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#ifdef CONFIG_USERSPACE
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for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
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if ((void *)pEsf->eip >= exceptions[i].start &&
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(void *)pEsf->eip < exceptions[i].end) {
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pEsf->eip = (unsigned int)(exceptions[i].fixup);
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return;
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}
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}
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#endif
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/* See Section 6.15 of the IA32 Software Developer's Manual vol 3 */
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__asm__ ("mov %%cr2, %0" : "=r" (cr2));
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err = pEsf->errorCode;
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err = esf->errorCode;
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printk("***** CPU Page Fault (error code 0x%08x)\n", err);
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printk("%s thread %s address 0x%08x\n",
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@ -361,12 +343,37 @@ void page_fault_handler(NANO_ESF *pEsf)
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#ifdef CONFIG_X86_MMU
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dump_mmu_flags((void *)cr2);
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#endif
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}
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#endif /* CONFIG_EXCEPTION_DEBUG */
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_NanoFatalErrorHandler(_NANO_ERR_CPU_EXCEPTION, pEsf);
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#ifdef CONFIG_USERSPACE
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Z_EXC_DECLARE(z_arch_user_string_nlen);
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static const struct z_exc_handle exceptions[] = {
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Z_EXC_HANDLE(z_arch_user_string_nlen)
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};
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#endif
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void page_fault_handler(NANO_ESF *esf)
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{
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#ifdef CONFIG_USERSPACE
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int i;
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for (i = 0; i < ARRAY_SIZE(exceptions); i++) {
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if ((void *)esf->eip >= exceptions[i].start &&
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(void *)esf->eip < exceptions[i].end) {
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esf->eip = (unsigned int)(exceptions[i].fixup);
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return;
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}
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}
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#endif
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#ifdef CONFIG_EXCEPTION_DEBUG
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dump_page_fault(esf);
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#endif
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_NanoFatalErrorHandler(_NANO_ERR_CPU_EXCEPTION, esf);
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CODE_UNREACHABLE;
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}
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_EXCEPTION_CONNECT_CODE(page_fault_handler, IV_PAGE_FAULT);
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#endif /* CONFIG_EXCEPTION_DEBUG */
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#ifdef CONFIG_X86_ENABLE_TSS
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static __noinit volatile NANO_ESF _df_esf;
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