scripts: mpu align for ro section of new memory region on non-XIP system
on non-XIP system, SRAM is the default region, and relocated .data section and .bss section of SRAM shouldn't be inserted between _image_rom_start and _image_rom_end, because the memory region between _image_rom_start and _image_rom_end will construct the mpu ro region. Also for the newly added memory region on non-XIP system, the relocated .text secition and .rodata section should also be mpu aligned. Fixes: #16090. Signed-off-by: Wentong Wu <wentong.wu@intel.com>
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@ -853,6 +853,10 @@ endif()
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if(CONFIG_CODE_DATA_RELOCATION)
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set(MEM_RELOCATAION_LD "${PROJECT_BINARY_DIR}/include/generated/linker_relocate.ld")
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set(MEM_RELOCATAION_SRAM_DATA_LD
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"${PROJECT_BINARY_DIR}/include/generated/linker_sram_data_relocate.ld")
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set(MEM_RELOCATAION_SRAM_BSS_LD
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"${PROJECT_BINARY_DIR}/include/generated/linker_sram_bss_relocate.ld")
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set(MEM_RELOCATAION_CODE "${PROJECT_BINARY_DIR}/code_relocation.c")
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add_custom_command(
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@ -864,6 +868,8 @@ if(CONFIG_CODE_DATA_RELOCATION)
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-d ${APPLICATION_BINARY_DIR}
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-i '$<TARGET_PROPERTY:code_data_relocation_target,COMPILE_DEFINITIONS>'
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-o ${MEM_RELOCATAION_LD}
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-s ${MEM_RELOCATAION_SRAM_DATA_LD}
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-b ${MEM_RELOCATAION_SRAM_BSS_LD}
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-c ${MEM_RELOCATAION_CODE}
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DEPENDS app kernel ${ZEPHYR_LIBS_PROPERTY}
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)
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@ -410,6 +410,10 @@ SECTIONS
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*(COMMON)
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*(".kernel_bss.*")
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#ifdef CONFIG_CODE_DATA_RELOCATION
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#include <linker_sram_bss_relocate.ld>
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#endif
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/*
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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@ -447,6 +451,10 @@ SECTIONS
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#ifdef CONFIG_CUSTOM_RWDATA_LD
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/* Located in project source directory */
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#include <custom-rwdata.ld>
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#endif
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#ifdef CONFIG_CODE_DATA_RELOCATION
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#include <linker_sram_data_relocate.ld>
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#endif
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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@ -29,6 +29,7 @@
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#define _SRAM2_DATA_SECTION_NAME .sram2_data
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#define _SRAM2_BSS_SECTION_NAME .sram2_bss
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#define _SRAM2_TEXT_SECTION_NAME .sram2_text
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#define SRAM2_ADDR (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2)
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#endif
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#define RAM_SIZE2 (CONFIG_SRAM_SIZE * 512)
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@ -42,6 +42,19 @@ SECTION_LOAD_MEMORY_SEQ = """
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LOAD_ADDRESS_LOCATION_FLASH = "GROUP_DATA_LINK_IN({0}, FLASH)"
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LOAD_ADDRESS_LOCATION_BSS = "GROUP_LINK_IN({0})"
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MPU_RO_REGION_START = """
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_{0}_mpu_ro_region_start = {1}_ADDR;
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"""
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MPU_RO_REGION_END = """
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MPU_ALIGN(_{0}_mpu_ro_region_end - _{0}_mpu_ro_region_start);
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_{0}_mpu_ro_region_end = .;
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"""
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# generic section creation format
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LINKER_SECTION_SEQ = """
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@ -193,12 +206,15 @@ def string_create_helper(region, memory_type,
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# Create a complete list of funcs/ variables that goes in for this
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# memory type
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tmp = print_linker_sections(full_list_of_sections[region])
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linker_string += LINKER_SECTION_SEQ.format(memory_type.lower(), region,
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if memory_type == 'SRAM' and (region == 'data' or region == 'bss'):
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linker_string += tmp
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else:
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linker_string += LINKER_SECTION_SEQ.format(memory_type.lower(), region,
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memory_type.upper(), region.upper(),
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tmp, load_address_string)
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if load_address_in_flash:
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linker_string += SECTION_LOAD_MEMORY_SEQ.format(memory_type.lower(),
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if load_address_in_flash:
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linker_string += SECTION_LOAD_MEMORY_SEQ.format(memory_type.lower(),
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region,
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memory_type.upper(),
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region.upper())
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@ -206,18 +222,44 @@ def string_create_helper(region, memory_type,
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return linker_string
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def generate_linker_script(linker_file, complete_list_of_sections):
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def generate_linker_script(linker_file, sram_data_linker_file,
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sram_bss_linker_file, complete_list_of_sections):
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gen_string = ''
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gen_string_sram_data = ''
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gen_string_sram_bss = ''
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for memory_type, full_list_of_sections in complete_list_of_sections.items():
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gen_string += string_create_helper("text", memory_type, full_list_of_sections, 1)
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gen_string += string_create_helper("rodata", memory_type, full_list_of_sections, 1)
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gen_string += string_create_helper("data", memory_type, full_list_of_sections, 1)
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gen_string += string_create_helper("bss", memory_type, full_list_of_sections, 0)
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if memory_type != "SRAM":
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gen_string += MPU_RO_REGION_START.format(memory_type.lower(),
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memory_type.upper())
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gen_string += string_create_helper("text",
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memory_type, full_list_of_sections, 1)
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gen_string += string_create_helper("rodata",
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memory_type, full_list_of_sections, 1)
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if memory_type != "SRAM":
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gen_string += MPU_RO_REGION_END.format(memory_type.lower())
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if memory_type == 'SRAM':
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gen_string_sram_data += string_create_helper("data",
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memory_type, full_list_of_sections, 1)
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gen_string_sram_bss += string_create_helper("bss",
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memory_type, full_list_of_sections, 0)
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else:
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gen_string += string_create_helper("data",
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memory_type, full_list_of_sections, 1)
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gen_string += string_create_helper("bss",
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memory_type, full_list_of_sections, 0)
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#finally writting to the linker file
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with open(linker_file, "a+") as file_desc:
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file_desc.write(gen_string)
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with open(sram_data_linker_file, "a+") as file_desc:
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file_desc.write(gen_string_sram_data)
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with open(sram_bss_linker_file, "a+") as file_desc:
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file_desc.write(gen_string_sram_bss)
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def generate_memcpy_code(memory_type, full_list_of_sections, code_generation):
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all_sections = True
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@ -237,13 +279,16 @@ def generate_memcpy_code(memory_type, full_list_of_sections, code_generation):
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#add all the regions that needs to be copied on boot up
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for mtype in ["text", "rodata", "data"]:
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if memory_type == "SRAM" and mtype == "data":
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continue
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if full_list_of_sections[mtype] and generate_section[mtype]:
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code_generation["copy_code"] += MEMCPY_TEMPLATE.format(memory_type.lower(), mtype)
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code_generation["extern"] += EXTERN_LINKER_VAR_DECLARATION.format(
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memory_type.lower(), mtype)
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# add for all the bss data that needs to be zeored on boot up
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if full_list_of_sections["bss"] and generate_section["bss"]:
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if full_list_of_sections["bss"] and generate_section["bss"] and memory_type != "SRAM":
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code_generation["zero_code"] += MEMSET_TEMPLATE.format(memory_type.lower())
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code_generation["extern"] += EXTERN_LINKER_VAR_DECLARATION.format(
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memory_type.lower(), "bss")
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@ -281,6 +326,10 @@ def parse_args():
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parser.add_argument("-i", "--input_rel_dict", required=True,
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help="input src:memory type(sram2 or ccm or aon etc) string")
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parser.add_argument("-o", "--output", required=False, help="Output ld file")
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parser.add_argument("-s", "--output_sram_data", required=False,
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help="Output sram data ld file")
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parser.add_argument("-b", "--output_sram_bss", required=False,
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help="Output sram bss ld file")
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parser.add_argument("-c", "--output_code", required=False,
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help="Output relocation code header file")
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parser.add_argument("-v", "--verbose", action="count", default=0,
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@ -330,6 +379,8 @@ def main():
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parse_args()
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searchpath = args.directory
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linker_file = args.output
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sram_data_linker_file = args.output_sram_data
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sram_bss_linker_file = args.output_sram_bss
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rel_dict = create_dict_wrt_mem()
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complete_list_of_sections = {}
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@ -354,7 +405,8 @@ def main():
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full_list_of_sections,
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complete_list_of_sections)
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generate_linker_script(linker_file, complete_list_of_sections)
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generate_linker_script(linker_file, sram_data_linker_file,
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sram_bss_linker_file, complete_list_of_sections)
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for mem_type, list_of_sections in complete_list_of_sections.items():
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code_generation = generate_memcpy_code(mem_type,
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list_of_sections, code_generation)
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