boards/arm: Adding support for nRF9160 InnBlue21 Board.

Adding support for nRF9160 based InnBlue board V2.1. Supports both
Secure and Non-Secure configurations along with various sensors
(lis2dh12 / hts221) and devices(i2c / pwm).

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
This commit is contained in:
Bilal Wasim 2020-03-30 00:59:27 +05:00 committed by Carles Cufí
parent 53b5bae41b
commit 0f557deae3
15 changed files with 643 additions and 0 deletions

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# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_sources(innblue21_board_init.c)
zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)

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# nRF9160 innblue V2.1 board configuration
# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF9160_SICA
config BOARD_NRF9160_INNBLUE21
bool "nRF9160 innblue v2.1"
config BOARD_NRF9160_INNBLUE21NS
bool "nRF9160 innblue v2.1 non-secure"
endif # SOC_NRF9160_SICA

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# nRF9160 innblue V2.1 board configuration
# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF9160_INNBLUE21 || BOARD_NRF9160_INNBLUE21NS
config BOARD
default "nrf9160_innblue21"
config PWM_0
default y
depends on PWM
# For the secure version of the board the firmware is linked at the beginning
# of the flash, or into the code-partition defined in DT if it is intended to
# be loaded by MCUboot. If the secure firmware is to be combined with a non-
# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
# be restricted to the size of its code partition.
# For the non-secure version of the board, the firmware
# must be linked into the code-partition (non-secure) defined in DT, regardless.
# Apply this configuration below by setting the Kconfig symbols used by
# the linker according to the information extracted from DT partitions.
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
if BOARD_NRF9160_INNBLUE21 && TRUSTED_EXECUTION_SECURE
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
endif # BOARD_NRF9160_INNBLUE21 && TRUSTED_EXECUTION_SECURE
if BOARD_NRF9160_INNBLUE21NS
config FLASH_LOAD_OFFSET
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
endif # BOARD_NRF9160_INNBLUE21NS
endif # BOARD_NRF9160_INNBLUE21 || BOARD_NRF9160_INNBLUE21NS

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# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
board_runner_args(nrfjprog "--nrf-family=NRF91")
board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

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.. _nrf9160_innblue21:
nRF9160 INNBLUE21
#################
Overview
********
The nRF9160 innblue21 is a cellular IoT sensor development board, which
is based on the nRF9160 SiP, and features NB-IoT and LTE-M connectivity.
.. figure:: img/nrf9160_innblue21.png
:width: 716px
:align: center
:alt: nRF9160 innblue21
nRF9160 innblue21 (Credit: innblue)
Hardware
********
The following parts are built into the board:
* Accelerometer: ST LIS2DH12
* CryptoElement: Atmel ATECC608a
* Humidity Sensor: ST HTS221
* Qi charger: TI BQ51013
* Battery fuel gauge: TI BQ27421
Supported Features
==================
The nrf9160_innblue21 board configuration supports the following
hardware (as of nRF9160) features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPU | on-chip | system protection |
+-----------+------------+----------------------+
| UARTE | on-chip | serial |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Connections and IOs
===================
LED
---
* LED1 ( red ) = P0.7
* LED2 (green) = P0.6
* LED3 ( blue) = P0.5
* LED4 ( red ) = P0.4
Push buttons and Switches
-------------------------
* BUTTON1 = P0.31
Security components
===================
- Implementation Defined Attribution Unit. The IDAU is implemented
with the System Protection Unit and is used to define secure and non-secure
memory maps. By default, all of the memory space (Flash, SRAM, and
peripheral address space) is defined to be secure accessible only.
- Secure boot.
Programming and Debugging
*************************
nrf9160_innblue21 supports the Armv8m Security Extension, and by default boots
in the Secure state.
Building Secure/Non-Secure Zephyr applications
==============================================
The process requires the following steps:
1. Build the Secure Zephyr application using ``-DBOARD=nrf9160_innblue21`` and
``CONFIG_TRUSTED_EXECUTION_SECURE=y`` in the the application project configuration file.
2. Build the Non-Secure Zephyr application using ``-DBOARD=nrf9160_innblue21ns``.
3. Merge the two binaries together.
When building a Secure/Non-Secure application, the Secure application will
have to set the IDAU (SPU) configuration to allow Non-Secure access to all
CPU resources utilized by the Non-Secure application firmware. SPU
configuration shall take place before jumping to the Non-Secure application.
Building a Secure only application
==================================
Build the Zephyr app in the usual way (see :ref:`build_an_application`
and :ref:`application_run`), using ``-DBOARD=nrf9160_innblue21``.
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the nRF9160 innblue21
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf9160_innblue21
:goals: build flash
Debugging
=========
Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
Segger IC.

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/*
* Copyright (c) 2020 InnBlue
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <init.h>
#include <drivers/gpio.h>
#define VDD_3V3_PWR_CTRL_GPIO_PIN 12 /* ENABLE_3V3_SENSOR --> i2c sensors */
#define VDD_5V0_PWR_CTRL_GPIO_PIN 21 /* ENABLE_5V0_BOOST --> speed sensor */
/* Configures the pin as output and sets them high. */
static void config_pin(struct device *gpio, int pin)
{
int err;
/* Configure this pin as output. */
err = gpio_pin_configure(gpio, pin, GPIO_OUTPUT_ACTIVE);
if (err == 0) {
/* Write "1" to this pin. */
err = gpio_pin_set(gpio, pin, 1);
}
/* Wait for the rail to come up and stabilize. */
k_sleep(K_MSEC(10));
}
static int pwr_ctrl_init(struct device *dev)
{
struct device *gpio;
/* Get handle of the GPIO device. */
gpio = device_get_binding(DT_LABEL(DT_NODELABEL(gpio0)));
/* Valid handle? */
if (gpio != NULL) {
/* Configure the gpio pin. */
config_pin(gpio, VDD_3V3_PWR_CTRL_GPIO_PIN);
config_pin(gpio, VDD_5V0_PWR_CTRL_GPIO_PIN);
}
return 0;
}
SYS_INIT(pwr_ctrl_init, POST_KERNEL, 70);

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/*
* Copyright (c) 2020 InnBlue
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf9160_sica.dtsi>
#include "nrf9160_innblue21_common.dts"
/ {
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
};

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identifier: nrf9160_innblue21
name: nRF9160-INNBLUE21
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
ram: 64
flash: 256
supported:
- i2c
- pwm
- watchdog

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/*
* Copyright (c) 2020 InnBlue
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
model = "innblue v21 Dev Kit";
compatible = "innblue,innblue21",
"nordic,nrf9160-sica", "nordic,nrf9160";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
};
leds {
compatible = "gpio-leds";
red_led: led_1 {
gpios = <&gpio0 7 0>;
label = "RGB red channel";
};
green_led: led_2 {
gpios = <&gpio0 6 0>;
label = "RGB green channel";
};
blue_led: led_3 {
gpios = <&gpio0 5 0>;
label = "RGB blue channel";
};
mode_led: led_4 {
gpios = <&gpio0 4 0>;
label = "mode red channel";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 31 GPIO_PUD_PULL_UP>;
label = "Button 0";
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
led3 = &mode_led;
sw0 = &button0;
rgb-pwm = &pwm0;
mode-pwm = &pwm1;
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
tx-pin = <29>;
rx-pin = <30>;
};
&uart1 {
status = "okay";
current-speed = <115200>;
tx-pin = <14>;
rx-pin = <15>;
};
&uart2 {
current-speed = <115200>;
tx-pin = <18>;
rx-pin = <19>;
};
&i2c2 {
compatible = "nordic,nrf-twim";
status = "okay";
sda-pin = <25>;
scl-pin = <26>;
clock-frequency = <I2C_BITRATE_FAST>;
lis2dh12-accel@19 {
compatible = "st,lis2dh";
reg = <0x19>;
irq-gpios = <&gpio0 0 0>, <&gpio0 1 0>;
label = "LIS2DH12-ACCEL";
};
hts221@5f {
compatible = "st,hts221";
reg = <0x5f>;
drdy-gpios = <&gpio0 3 GPIO_INT_ACTIVE_HIGH>;
label = "HTS221";
};
lps22hb-press@5c {
compatible = "st,lps22hb-press";
reg = <0x5c>;
label = "LPS22HB";
};
ccs811: ccs811@5a {
compatible = "ams,ccs811";
reg = <0x5a>;
label = "CCS811";
};
bme680@76 {
compatible = "bosch,bme680";
label = "BME680";
reg = <0x76>;
};
};
&pwm0 {
status = "okay";
ch0-pin = <5>;
ch1-pin = <6>;
ch2-pin = <7>;
ch0-inverted;
ch1-inverted;
ch2-inverted;
};
&pwm1 {
status = "okay";
ch0-pin = <4>;
ch0-inverted;
ch1-pin = <9>;
ch1-inverted;
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&flash0 {
/*
* For more information, see:
* http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x10000>;
};
slot0_partition: partition@10000 {
label = "image-0";
};
slot0_ns_partition: partition@40000 {
label = "image-0-nonsecure";
};
slot1_partition: partition@80000 {
label = "image-1";
};
slot1_ns_partition: partition@b0000 {
label = "image-1-nonsecure";
};
scratch_partition: partition@f0000 {
label = "image-scratch";
reg = <0x000f0000 0xa000>;
};
storage_partition: partition@fa000 {
label = "storage";
reg = <0x000fa000 0x00006000>;
};
};
};
/ {
/* SRAM allocated and used by the BSD library */
sram0_bsd: memory@20010000 {
device_type = "memory";
compatible = "mmio-sram";
};
/* SRAM allocated to the Non-Secure image */
sram0_ns: memory@20020000 {
device_type = "memory";
compatible = "mmio-sram";
};
};
/* Include partition configuration file */
#include "nrf9160_innblue21_partition_conf.dts"

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# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
# SOC / Board
CONFIG_SOC_SERIES_NRF91X=y
CONFIG_SOC_NRF9160_SICA=y
CONFIG_BOARD_NRF9160_INNBLUE21=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y
# enable GPIO
CONFIG_GPIO=y
# Enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

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/*
* Copyright (c) 2020 InnBlue
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Default Flash planning for nRF9160_innblue21.
*
* Zephyr build for nRF9160 with ARM TrustZone-M support,
* implies building Secure and Non-Secure Zephyr images.
*
* Secure image will be placed, by default, in flash0
* (or in slot0, if MCUboot is present).
* Secure image will use sram0 for system memory.
*
* Non-Secure image will be placed in slot0_ns, and use
* sram0_ns for system memory.
*
* Note that the Secure image only requires knowledge of
* the beginning of the Non-Secure image (not its size).
*/
&slot0_partition {
reg = <0x00010000 0x30000>;
};
&slot0_ns_partition {
reg = <0x00040000 0x40000>;
};
&slot1_partition {
reg = <0x00080000 0x30000>;
};
&slot1_ns_partition {
reg = <0x000b0000 0x40000>;
};
/* Default SRAM planning when building for nRF9160 with
* ARM TrustZone-M support
* - Lowest 64 kB SRAM allocated to Secure image (sram0).
* - 64 kB SRAM reserved for and used by the BSD socket
* library.
* - Upper 128 kB allocated to Non-Secure image (sram0_ns).
*/
&sram0 {
reg = <0x20000000 DT_SIZE_K(64)>;
};
&sram0_bsd {
reg = <0x20010000 DT_SIZE_K(64)>;
};
&sram0_ns {
reg = <0x20020000 DT_SIZE_K(128)>;
};

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/*
* Copyright (c) 2020 InnBlue
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf9160ns_sica.dtsi>
#include "nrf9160_innblue21_common.dts"
/ {
chosen {
zephyr,flash = &flash0;
zephyr,sram = &sram0_ns;
zephyr,code-partition = &slot0_ns_partition;
};
};

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identifier: nrf9160_innblue21ns
name: nRF9160-INNBLUE21-Non-Secure
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
ram: 128
flash: 256
supported:
- i2c
- pwm
- watchdog

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# Copyright (c) 2020 InnBlue
# SPDX-License-Identifier: Apache-2.0
# SOC / Board
CONFIG_SOC_SERIES_NRF91X=y
CONFIG_SOC_NRF9160_SICA=y
CONFIG_BOARD_NRF9160_INNBLUE21NS=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y
# This Board implies building Non-Secure firmware
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
# enable GPIO
CONFIG_GPIO=y
# Enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y