6ccc1ddc1f
The following patches are applied to the headers in order to make them compatible with MCUX FlexCAN driver: - Substitute regex pattern \bFLEXCAN_ with CAN_ - Replace message buffer RAMn array with a struct for 64-byte payloads (the only paylod length supported at the moment in MCUX FlexCAN driver). - Replace macros for RAM array bytes with macros for message buffer fields CS, ID, WORD0 and WORD1. - Define MCR_WAKSRC, MCR_SLFWAK, MCR_WAKMSK and ESR1_WAKINT register access macros to be able to build with MCUX driver. These fields are reserved in S32K1xx and not used. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com> |
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| s32k1 | ||
| s32k3 | ||
| s32ze | ||