719 lines
25 KiB
C
719 lines
25 KiB
C
/******************************************************************************
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* Filename: interrupt.h
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* Revised: 2020-02-14 11:30:20 +0100 (Fri, 14 Feb 2020)
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* Revision: 56760
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*
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* Description: Defines and prototypes for the NVIC Interrupt Controller
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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//*****************************************************************************
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//
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//! \addtogroup system_cpu_group
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//! @{
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//! \addtogroup interrupt_api
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//! @{
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//
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//*****************************************************************************
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#ifndef __INTERRUPT_H__
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#define __INTERRUPT_H__
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdbool.h>
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#include <stdint.h>
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#include "../inc/hw_ints.h"
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#include "../inc/hw_types.h"
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#include "../inc/hw_nvic.h"
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#include "debug.h"
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#include "cpu.h"
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//*****************************************************************************
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//
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// Support for DriverLib in ROM:
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// This section renames all functions that are not "static inline", so that
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// calling these functions will default to implementation in flash. At the end
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// of this file a second renaming will change the defaults to implementation in
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// ROM for available functions.
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//
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// To force use of the implementation in flash, e.g. for debugging:
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// - Globally: Define DRIVERLIB_NOROM at project level
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// - Per function: Use prefix "NOROM_" when calling the function
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//
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//*****************************************************************************
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#if !defined(DOXYGEN)
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#define IntRegister NOROM_IntRegister
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#define IntUnregister NOROM_IntUnregister
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#define IntPriorityGroupingSet NOROM_IntPriorityGroupingSet
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#define IntPriorityGroupingGet NOROM_IntPriorityGroupingGet
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#define IntPrioritySet NOROM_IntPrioritySet
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#define IntPriorityGet NOROM_IntPriorityGet
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#define IntEnable NOROM_IntEnable
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#define IntDisable NOROM_IntDisable
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#define IntPendSet NOROM_IntPendSet
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#define IntPendGet NOROM_IntPendGet
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#define IntPendClear NOROM_IntPendClear
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#endif
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//*****************************************************************************
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//
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// Macro to generate an interrupt priority mask based on the number of bits
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// of priority supported by the hardware. For CC26xx the number of priority
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// bit is 3 as defined in <tt>hw_types.h</tt>. The priority mask is
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// defined as
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//
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// INT_PRIORITY_MASK = ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
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//
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//*****************************************************************************
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#define INT_PRIORITY_MASK 0x000000E0
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#define INT_PRI_LEVEL0 0x00000000
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#define INT_PRI_LEVEL1 0x00000020
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#define INT_PRI_LEVEL2 0x00000040
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#define INT_PRI_LEVEL3 0x00000060
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#define INT_PRI_LEVEL4 0x00000080
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#define INT_PRI_LEVEL5 0x000000A0
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#define INT_PRI_LEVEL6 0x000000C0
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#define INT_PRI_LEVEL7 0x000000E0
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//*****************************************************************************
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//
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// API Functions and prototypes
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \brief Registers a function as an interrupt handler in the dynamic vector table.
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//!
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//! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
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//!
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//! This function writes a function pointer to the dynamic interrupt vector table
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//! in SRAM to register the function as an interrupt handler (ISR). When the corresponding
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//! interrupt occurs, and it has been enabled (see \ref IntEnable()), the function
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//! pointer is fetched from the dynamic vector table, and the System CPU will
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//! execute the interrupt handler.
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//!
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//! \note The first call to this function (directly or indirectly via a peripheral
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//! driver interrupt register function) copies the interrupt vector table from
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//! Flash to SRAM. NVIC uses the static vector table (in Flash) until this function
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//! is called.
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//!
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//! \param ui32Interrupt specifies the index in the vector table to modify.
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//! - System exceptions (vectors 0 to 15):
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//! - INT_NMI_FAULT
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//! - INT_HARD_FAULT
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//! - INT_MEMMANAGE_FAULT
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//! - INT_BUS_FAULT
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//! - INT_USAGE_FAULT
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//! - INT_SVCALL
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//! - INT_DEBUG
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//! - INT_PENDSV
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//! - INT_SYSTICK
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//! - Interrupts (vectors >15):
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//! - INT_AON_GPIO_EDGE
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//! - INT_I2C_IRQ
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//! - INT_RFC_CPE_1
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//! - INT_PKA_IRQ
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//! - INT_AON_RTC_COMB
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//! - INT_UART0_COMB
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//! - INT_AUX_SWEV0
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//! - INT_SSI0_COMB
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//! - INT_SSI1_COMB
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//! - INT_RFC_CPE_0
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//! - INT_RFC_HW_COMB
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//! - INT_RFC_CMD_ACK
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//! - INT_I2S_IRQ
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//! - INT_AUX_SWEV1
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//! - INT_WDT_IRQ
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//! - INT_GPT0A
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//! - INT_GPT0B
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//! - INT_GPT1A
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//! - INT_GPT1B
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//! - INT_GPT2A
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//! - INT_GPT2B
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//! - INT_GPT3A
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//! - INT_GPT3B
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//! - INT_CRYPTO_RESULT_AVAIL_IRQ
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//! - INT_DMA_DONE_COMB
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//! - INT_DMA_ERR
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//! - INT_FLASH
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//! - INT_SWEV0
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//! - INT_AUX_COMB
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//! - INT_AON_PROG0
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//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister())
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//! - INT_AUX_COMPA
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//! - INT_AUX_ADC_IRQ
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//! - INT_TRNG_IRQ
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//! - INT_OSC_COMB
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//! - INT_AUX_TIMER2_EV0
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//! - INT_UART1_COMB
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//! - INT_BATMON_COMB
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//! \param pfnHandler is a pointer to the function to register as interrupt handler.
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//!
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//! \return None.
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//!
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//! \sa \ref IntUnregister(), \ref IntEnable()
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//
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//*****************************************************************************
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extern void IntRegister(uint32_t ui32Interrupt, void (*pfnHandler)(void));
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//*****************************************************************************
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//
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//! \brief Unregisters an interrupt handler in the dynamic vector table.
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//!
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//! This function removes an interrupt handler from the dynamic vector table and
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//! replaces it with the default interrupt handler \ref IntDefaultHandler().
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//!
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//! \note Remember to disable the interrupt before removing its interrupt handler
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//! from the vector table.
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//!
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//! \param ui32Interrupt specifies the index in the vector table to modify.
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//! - See \ref IntRegister() for list of valid arguments.
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//!
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//! \return None.
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//!
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//! \sa \ref IntRegister(), \ref IntDisable()
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//
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//*****************************************************************************
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extern void IntUnregister(uint32_t ui32Interrupt);
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//*****************************************************************************
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//
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//! \brief Sets the priority grouping of the interrupt controller.
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//!
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//! This function specifies the split between preemptable priority levels and
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//! subpriority levels in the interrupt priority specification.
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//!
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//! Three bits are available for hardware interrupt prioritization thus priority
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//! grouping values of three through seven have the same effect.
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//!
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//! \param ui32Bits specifies the number of bits of preemptable priority.
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//! - 0 : No pre-emption priority, eight bits of subpriority.
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//! - 1 : One bit of pre-emption priority, seven bits of subpriority
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//! - 2 : Two bits of pre-emption priority, six bits of subpriority
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//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority
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//!
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//! \return None
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//!
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//! \sa \ref IntPrioritySet()
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//
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//*****************************************************************************
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extern void IntPriorityGroupingSet(uint32_t ui32Bits);
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//*****************************************************************************
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//
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//! \brief Gets the priority grouping of the interrupt controller.
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//!
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//! This function returns the split between preemptable priority levels and
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//! subpriority levels in the interrupt priority specification.
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//!
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//! \return Returns the number of bits of preemptable priority.
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//! - 0 : No pre-emption priority, eight bits of subpriority.
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//! - 1 : One bit of pre-emption priority, seven bits of subpriority
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//! - 2 : Two bits of pre-emption priority, six bits of subpriority
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//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority
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//
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//*****************************************************************************
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extern uint32_t IntPriorityGroupingGet(void);
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//*****************************************************************************
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//
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//! \brief Sets the priority of an interrupt.
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//!
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//! This function sets the priority of an interrupt, including system exceptions.
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//! When multiple interrupts are asserted simultaneously, the ones with the highest
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//! priority are processed before the lower priority interrupts. Smaller numbers
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//! correspond to higher interrupt priorities thus priority 0 is the highest
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//! interrupt priority.
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//!
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//! \warning This function does not support setting priority of interrupt vectors
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//! one through three which are:
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//! - 1: Reset handler
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//! - 2: NMI handler
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//! - 3: Hard fault handler
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//!
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//! \param ui32Interrupt specifies the index in the vector table to change priority for.
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//! - System exceptions:
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//! - INT_MEMMANAGE_FAULT
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//! - INT_BUS_FAULT
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//! - INT_USAGE_FAULT
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//! - INT_SVCALL
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//! - INT_DEBUG
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//! - INT_PENDSV
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//! - INT_SYSTICK
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//! - Interrupts:
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//! - INT_AON_GPIO_EDGE
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//! - INT_I2C_IRQ
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//! - INT_RFC_CPE_1
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//! - INT_PKA_IRQ
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//! - INT_AON_RTC_COMB
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//! - INT_UART0_COMB
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//! - INT_AUX_SWEV0
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//! - INT_SSI0_COMB
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//! - INT_SSI1_COMB
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//! - INT_RFC_CPE_0
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//! - INT_RFC_HW_COMB
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//! - INT_RFC_CMD_ACK
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//! - INT_I2S_IRQ
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//! - INT_AUX_SWEV1
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//! - INT_WDT_IRQ
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//! - INT_GPT0A
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//! - INT_GPT0B
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//! - INT_GPT1A
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//! - INT_GPT1B
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//! - INT_GPT2A
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//! - INT_GPT2B
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//! - INT_GPT3A
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//! - INT_GPT3B
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//! - INT_CRYPTO_RESULT_AVAIL_IRQ
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//! - INT_DMA_DONE_COMB
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//! - INT_DMA_ERR
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//! - INT_FLASH
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//! - INT_SWEV0
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//! - INT_AUX_COMB
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//! - INT_AON_PROG0
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//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister())
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//! - INT_AUX_COMPA
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//! - INT_AUX_ADC_IRQ
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//! - INT_TRNG_IRQ
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//! - INT_OSC_COMB
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//! - INT_AUX_TIMER2_EV0
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//! - INT_UART1_COMB
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//! - INT_BATMON_COMB
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//! \param ui8Priority specifies the priority of the interrupt.
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//! - \ref INT_PRI_LEVEL0 : Highest priority.
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//! - \ref INT_PRI_LEVEL1
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//! - \ref INT_PRI_LEVEL2
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//! - \ref INT_PRI_LEVEL3
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//! - \ref INT_PRI_LEVEL4
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//! - \ref INT_PRI_LEVEL5
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//! - \ref INT_PRI_LEVEL6
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//! - \ref INT_PRI_LEVEL7 : Lowest priority.
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//!
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//! \return None
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//!
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//! \sa \ref IntPriorityGroupingSet()
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//
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//*****************************************************************************
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extern void IntPrioritySet(uint32_t ui32Interrupt, uint8_t ui8Priority);
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//*****************************************************************************
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//
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//! \brief Gets the priority of an interrupt.
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//!
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//! This function gets the priority of an interrupt.
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//!
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//! \warning This function does not support getting priority of interrupt vectors
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//! one through three which are:
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//! - 1: Reset handler
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//! - 2: NMI handler
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//! - 3: Hard fault handler
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//!
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//! \param ui32Interrupt specifies the index in the vector table to read priority of.
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//! - See \ref IntPrioritySet() for list of valid arguments.
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//!
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//! \return Returns the interrupt priority:
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//! - \ref INT_PRI_LEVEL0 : Highest priority.
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//! - \ref INT_PRI_LEVEL1
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//! - \ref INT_PRI_LEVEL2
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//! - \ref INT_PRI_LEVEL3
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//! - \ref INT_PRI_LEVEL4
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//! - \ref INT_PRI_LEVEL5
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//! - \ref INT_PRI_LEVEL6
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//! - \ref INT_PRI_LEVEL7 : Lowest priority.
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//
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//*****************************************************************************
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extern int32_t IntPriorityGet(uint32_t ui32Interrupt);
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//*****************************************************************************
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//
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//! \brief Enables an interrupt or system exception.
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//!
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//! This function enables the specified interrupt in the interrupt controller.
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//!
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//! \note If a fault condition occurs while the corresponding system exception
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//! is disabled, the fault is treated as a Hard Fault.
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//!
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//! \param ui32Interrupt specifies the index in the vector table to enable.
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//! - System exceptions:
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//! - INT_MEMMANAGE_FAULT
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//! - INT_BUS_FAULT
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//! - INT_USAGE_FAULT
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//! - INT_SYSTICK
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//! - Interrupts:
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//! - INT_AON_GPIO_EDGE
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//! - INT_I2C_IRQ
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//! - INT_RFC_CPE_1
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//! - INT_PKA_IRQ
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//! - INT_AON_RTC_COMB
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//! - INT_UART0_COMB
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//! - INT_AUX_SWEV0
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//! - INT_SSI0_COMB
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//! - INT_SSI1_COMB
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//! - INT_RFC_CPE_0
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//! - INT_RFC_HW_COMB
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//! - INT_RFC_CMD_ACK
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//! - INT_I2S_IRQ
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//! - INT_AUX_SWEV1
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//! - INT_WDT_IRQ
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//! - INT_GPT0A
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//! - INT_GPT0B
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//! - INT_GPT1A
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//! - INT_GPT1B
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//! - INT_GPT2A
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//! - INT_GPT2B
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//! - INT_GPT3A
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//! - INT_GPT3B
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//! - INT_CRYPTO_RESULT_AVAIL_IRQ
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//! - INT_DMA_DONE_COMB
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//! - INT_DMA_ERR
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//! - INT_FLASH
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//! - INT_SWEV0
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//! - INT_AUX_COMB
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//! - INT_AON_PROG0
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//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister())
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//! - INT_AUX_COMPA
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//! - INT_AUX_ADC_IRQ
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//! - INT_TRNG_IRQ
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//! - INT_OSC_COMB
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//! - INT_AUX_TIMER2_EV0
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//! - INT_UART1_COMB
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//! - INT_BATMON_COMB
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//!
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//! \return None
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//!
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//! \sa \ref IntDisable()
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//
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//*****************************************************************************
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extern void IntEnable(uint32_t ui32Interrupt);
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//*****************************************************************************
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//
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//! \brief Disables an interrupt or system exception.
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//!
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//! This function disables the specified interrupt in the interrupt controller.
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//!
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//! \param ui32Interrupt specifies the index in the vector table to disable.
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//! - See \ref IntEnable() for list of valid arguments.
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//!
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//! \return None
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//!
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//! \sa \ref IntEnable()
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//
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//*****************************************************************************
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extern void IntDisable(uint32_t ui32Interrupt);
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//*****************************************************************************
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//
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//! \brief Pends an interrupt.
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//!
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//! This function pends the specified interrupt in the interrupt controller.
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//! This causes the interrupt controller to execute the corresponding interrupt
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//! handler at the next available time, based on the current interrupt state
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//! priorities.
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//!
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//! This interrupt controller automatically clears the pending interrupt once the
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//! interrupt handler is executed.
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//!
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//! \param ui32Interrupt specifies the index in the vector table to pend.
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//! - System exceptions:
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//! - INT_NMI_FAULT
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//! - INT_PENDSV
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//! - INT_SYSTICK
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//! - Interrupts:
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//! - INT_AON_GPIO_EDGE
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//! - INT_I2C_IRQ
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//! - INT_RFC_CPE_1
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//! - INT_PKA_IRQ
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//! - INT_AON_RTC_COMB
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//! - INT_UART0_COMB
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//! - INT_AUX_SWEV0
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//! - INT_SSI0_COMB
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//! - INT_SSI1_COMB
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//! - INT_RFC_CPE_0
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//! - INT_RFC_HW_COMB
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//! - INT_RFC_CMD_ACK
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//! - INT_I2S_IRQ
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//! - INT_AUX_SWEV1
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//! - INT_WDT_IRQ
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//! - INT_GPT0A
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//! - INT_GPT0B
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//! - INT_GPT1A
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//! - INT_GPT1B
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//! - INT_GPT2A
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//! - INT_GPT2B
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//! - INT_GPT3A
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//! - INT_GPT3B
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//! - INT_CRYPTO_RESULT_AVAIL_IRQ
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//! - INT_DMA_DONE_COMB
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//! - INT_DMA_ERR
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//! - INT_FLASH
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//! - INT_SWEV0
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//! - INT_AUX_COMB
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//! - INT_AON_PROG0
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//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister())
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//! - INT_AUX_COMPA
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//! - INT_AUX_ADC_IRQ
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//! - INT_TRNG_IRQ
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//! - INT_OSC_COMB
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//! - INT_AUX_TIMER2_EV0
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//! - INT_UART1_COMB
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//! - INT_BATMON_COMB
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//!
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//! \return None
|
|
//!
|
|
//! \sa \ref IntEnable()
|
|
//
|
|
//*****************************************************************************
|
|
extern void IntPendSet(uint32_t ui32Interrupt);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Checks if an interrupt is pending.
|
|
//!
|
|
//! This function checks the interrupt controller to see if an interrupt is pending.
|
|
//!
|
|
//! The interrupt must be enabled in order for the corresponding interrupt handler
|
|
//! to be executed, so an interrupt can be pending waiting to be enabled or waiting
|
|
//! for an interrupt of higher priority to be done executing.
|
|
//!
|
|
//! \note This function does not support reading pending status for system exceptions
|
|
//! (vector table indexes <16).
|
|
//!
|
|
//! \param ui32Interrupt specifies the index in the vector table to check pending
|
|
//! status for.
|
|
//! - See \ref IntPendSet() for list of valid arguments (except system exceptions).
|
|
//!
|
|
//! \return Returns:
|
|
//! - \c true : Specified interrupt is pending.
|
|
//! - \c false : Specified interrupt is not pending.
|
|
//
|
|
//*****************************************************************************
|
|
extern bool IntPendGet(uint32_t ui32Interrupt);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Unpends an interrupt.
|
|
//!
|
|
//! This function unpends the specified interrupt in the interrupt controller.
|
|
//! This causes any previously generated interrupts that have not been handled yet
|
|
//! (due to higher priority interrupts or the interrupt no having been enabled
|
|
//! yet) to be discarded.
|
|
//!
|
|
//! \note It is not possible to unpend the NMI because it takes effect
|
|
//! immediately when being pended.
|
|
//!
|
|
//! \param ui32Interrupt specifies the index in the vector table to unpend.
|
|
//! - See \ref IntPendSet() for list of valid arguments (except NMI).
|
|
//!
|
|
//! \return None
|
|
//
|
|
//*****************************************************************************
|
|
extern void IntPendClear(uint32_t ui32Interrupt);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Enables the CPU interrupt.
|
|
//!
|
|
//! Allows the CPU to respond to interrupts.
|
|
//!
|
|
//! \return Returns:
|
|
//! - \c true : Interrupts were disabled and are now enabled.
|
|
//! - \c false : Interrupts were already enabled when the function was called.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE bool
|
|
IntMasterEnable(void)
|
|
{
|
|
// Enable CPU interrupts.
|
|
return(CPUcpsie());
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Disables the CPU interrupts with configurable priority.
|
|
//!
|
|
//! Prevents the CPU from receiving interrupts except NMI and hard fault. This
|
|
//! does not affect the set of interrupts enabled in the interrupt controller;
|
|
//! it just gates the interrupt from the interrupt controller to the CPU.
|
|
//!
|
|
//! \return Returns:
|
|
//! - \c true : Interrupts were already disabled when the function was called.
|
|
//! - \c false : Interrupts were enabled and are now disabled.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE bool
|
|
IntMasterDisable(void)
|
|
{
|
|
// Disable CPU interrupts.
|
|
return(CPUcpsid());
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Sets the priority masking level.
|
|
//!
|
|
//! This function sets the interrupt priority masking level so that all
|
|
//! interrupts at the specified or lesser priority level are masked. This
|
|
//! can be used to globally disable a set of interrupts with priority below
|
|
//! a predetermined threshold. A value of 0 disables priority
|
|
//! masking.
|
|
//!
|
|
//! Smaller numbers correspond to higher interrupt priorities. So for example
|
|
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
|
|
//! and interrupts with a numerical priority of 4 and greater will be blocked.
|
|
//! The device supports priority levels 0 through 7.
|
|
//!
|
|
//! \param ui32PriorityMask is the priority level that will be masked.
|
|
//! - 0 : Disable priority masking.
|
|
//! - 1 : Allow priority 0 interrupts, mask interrupts with priority 1-7.
|
|
//! - 2 : Allow priority 0-1 interrupts, mask interrupts with priority 2-7.
|
|
//! - 3 : Allow priority 0-2 interrupts, mask interrupts with priority 3-7.
|
|
//! - 4 : Allow priority 0-3 interrupts, mask interrupts with priority 4-7.
|
|
//! - 5 : Allow priority 0-4 interrupts, mask interrupts with priority 5-7.
|
|
//! - 6 : Allow priority 0-5 interrupts, mask interrupts with priority 6-7.
|
|
//! - 7 : Allow priority 0-6 interrupts, mask interrupts with priority 7.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
IntPriorityMaskSet(uint32_t ui32PriorityMask)
|
|
{
|
|
CPUbasepriSet(ui32PriorityMask);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Gets the priority masking level.
|
|
//!
|
|
//! This function gets the current setting of the interrupt priority masking
|
|
//! level. The value returned is the priority level such that all interrupts
|
|
//! of that and lesser priority are masked. A value of 0 means that priority
|
|
//! masking is disabled.
|
|
//!
|
|
//! Smaller numbers correspond to higher interrupt priorities. So for example
|
|
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
|
|
//! and interrupts with a numerical priority of 4 and greater will be blocked.
|
|
//!
|
|
//! \return Returns the value of the interrupt priority level mask.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
IntPriorityMaskGet(void)
|
|
{
|
|
return(CPUbasepriGet());
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Support for DriverLib in ROM:
|
|
// Redirect to implementation in ROM when available.
|
|
//
|
|
//*****************************************************************************
|
|
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
|
|
#include "../driverlib/rom.h"
|
|
#ifdef ROM_IntRegister
|
|
#undef IntRegister
|
|
#define IntRegister ROM_IntRegister
|
|
#endif
|
|
#ifdef ROM_IntUnregister
|
|
#undef IntUnregister
|
|
#define IntUnregister ROM_IntUnregister
|
|
#endif
|
|
#ifdef ROM_IntPriorityGroupingSet
|
|
#undef IntPriorityGroupingSet
|
|
#define IntPriorityGroupingSet ROM_IntPriorityGroupingSet
|
|
#endif
|
|
#ifdef ROM_IntPriorityGroupingGet
|
|
#undef IntPriorityGroupingGet
|
|
#define IntPriorityGroupingGet ROM_IntPriorityGroupingGet
|
|
#endif
|
|
#ifdef ROM_IntPrioritySet
|
|
#undef IntPrioritySet
|
|
#define IntPrioritySet ROM_IntPrioritySet
|
|
#endif
|
|
#ifdef ROM_IntPriorityGet
|
|
#undef IntPriorityGet
|
|
#define IntPriorityGet ROM_IntPriorityGet
|
|
#endif
|
|
#ifdef ROM_IntEnable
|
|
#undef IntEnable
|
|
#define IntEnable ROM_IntEnable
|
|
#endif
|
|
#ifdef ROM_IntDisable
|
|
#undef IntDisable
|
|
#define IntDisable ROM_IntDisable
|
|
#endif
|
|
#ifdef ROM_IntPendSet
|
|
#undef IntPendSet
|
|
#define IntPendSet ROM_IntPendSet
|
|
#endif
|
|
#ifdef ROM_IntPendGet
|
|
#undef IntPendGet
|
|
#define IntPendGet ROM_IntPendGet
|
|
#endif
|
|
#ifdef ROM_IntPendClear
|
|
#undef IntPendClear
|
|
#define IntPendClear ROM_IntPendClear
|
|
#endif
|
|
#endif
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Mark the end of the C bindings section for C++ compilers.
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif // __INTERRUPT_H__
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Close the Doxygen group.
|
|
//! @}
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|