71 lines
2.0 KiB
C
71 lines
2.0 KiB
C
/**************************************************************************//**
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* @file system_M480.h
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* @version V1.00
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* @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File for M480
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*
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* SPDX-License-Identifier: Apache-2.0
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* @copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __SYSTEM_M480_H__
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#define __SYSTEM_M480_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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#define __HSI (12000000UL) /*!< PLL default output is 50MHz */
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#define __HXT (12000000UL) /*!< External Crystal Clock Frequency */
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#define __LXT (32768UL) /*!< External Crystal Clock Frequency 32.768KHz */
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#define __HIRC (12000000UL) /*!< Internal 12M RC Oscillator Frequency */
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#define __LIRC (10000UL) /*!< Internal 10K RC Oscillator Frequency */
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#define __SYS_OSC_CLK ( ___HSI) /* Main oscillator frequency */
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#define __SYSTEM_CLOCK (1UL*__HXT)
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern uint32_t CyclesPerUs; /*!< Cycles per micro second */
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extern uint32_t PllClock; /*!< PLL Output Clock Frequency */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the micro controller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SYSTEM_M480_H__ */
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/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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