399 lines
30 KiB
C
399 lines
30 KiB
C
/**************************************************************************//**
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* @file hsotg_reg.h
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* @version V1.00
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* @brief HSOTG register definition header file
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*
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* SPDX-License-Identifier: Apache-2.0
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* @copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __HSOTG_REG_H__
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#define __HSOTG_REG_H__
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#if defined ( __CC_ARM )
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#pragma anon_unions
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#endif
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/**
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@addtogroup REGISTER Control Register
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@{
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*/
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/**
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@addtogroup HSOTG High Speed USB On-The-Go Controller(HSOTG)
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Memory Mapped Structure for HSOTG Controller
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@{ */
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typedef struct
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{
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/**
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* @var HSOTG_T::CTL
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* Offset: 0x00 HSOTG Control Register
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* ---------------------------------------------------------------------------------------------------
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* |Bits |Field |Descriptions
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* | :----: | :----: | :---- |
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* |[0] |VBUSDROP |Drop VBUS Control
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* | | |If user application running on this OTG A-device wants to conserve power, set this bit to drop VBUS
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* | | |BUSREQ (OTG_CTL[1]) will be also cleared no matter A-device or B-device.
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* | | |0 = Not drop the VBUS.
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* | | |1 = Drop the VBUS.
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* |[1] |BUSREQ |OTG Bus Request
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* | | |If OTG A-device wants to do data transfers via USB bus, setting this bit will drive VBUS high to detect USB device connection
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* | | |If user won't use the bus any more, clearing this bit will drop VBUS to save power
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* | | |This bit will be cleared when A-device goes to A_wait_vfall state
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* | | |This bit will be also cleared if VBUSDROP (OTG_CTL[0]) bit is set or IDSTS (OTG_STATUS[1]) changed.
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* | | |If user of an OTG-B Device wants to request VBUS, setting this bit will run SRP protocol
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* | | |This bit will be cleared if SRP failure (OTG A-device does not provide VBUS after B-device issues ARP in specified interval, defined in OTG specification)
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* | | |This bit will be also cleared if VBUSDROP (OTG_CTL[0]) bit is set IDSTS (OTG_STATUS[1]) changed.
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* | | |0 = Not launch VBUS in OTG A-device or not request SRP in OTG B-device.
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* | | |1 = Launch VBUS in OTG A-device or request SRP in OTG B-device.
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* |[2] |HNPREQEN |OTG HNP Request Enable Bit
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* | | |When USB frame as A-device, set this bit when A-device allows to process HNP protocol -- A-device changes role from Host to Peripheral
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* | | |This bit will be cleared when OTG state changes from a_suspend to a_peripheral or goes back to a_idle state
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* | | |When USB frame as B-device, set this bit after the OTG A-device successfully sends a SetFeature (b_hnp_enable) command to the OTG B-device to start role change -- B-device changes role from Peripheral to Host
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* | | |This bit will be cleared when OTG state changes from b_peripheral to b_wait_acon or goes back to b_idle state.
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* | | |0 = HNP request Disabled.
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* | | |1 = HNP request Enabled (A-device can change role from Host to Peripheral or B-device can change role from Peripheral to Host).
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* | | |Note: Refer to OTG specification to get a_suspend, a_peripheral, a_idle and b_idle state.
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* |[4] |OTGEN |OTG Function Enable Bit
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* | | |User needs to set this bit to enable OTG function while USB frame configured as OTG device
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* | | |When USB frame not configured as OTG device, this bit is must be low.
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* | | |0= OTG function Disabled.
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* | | |1 = OTG function Enabled.
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* |[5] |WKEN |OTG ID Pin Wake-up Enable Bit
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* | | |0 = OTG ID pin status change wake-up function Disabled.
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* | | |1 = OTG ID pin status change wake-up function Enabled.
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* @var HSOTG_T::PHYCTL
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* Offset: 0x04 HSOTG PHY Control Register
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* ---------------------------------------------------------------------------------------------------
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* |Bits |Field |Descriptions
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* | :----: | :----: | :---- |
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* |[0] |OTGPHYEN |OTG PHY Enable
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* | | |When USB frame is configured as OTG-device or ID-dependent, user needs to set this bit before using OTG function
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* | | |If device is not configured as OTG-device nor ID-dependent, this bit is "don't care".
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* | | |0 = OTG PHY Disabled.
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* | | |1 = OTG PHY Enabled.
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* |[1] |IDDETEN |ID Detection Enable Bit
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* | | |0 = Detect ID pin status Disabled.
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* | | |1 = Detect ID pin status Enabled.
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* |[4] |VBENPOL |Off-chip USB VBUS Power Switch Enable Polarity
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* | | |The OTG controller will enable off-chip USB VBUS power switch to provide VBUS power when need
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* | | |A USB_VBUS_EN pin is used to control the off-chip USB VBUS power switch.
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* | | |The polarity of enabling off-chip USB VBUS power switch (high active or low active) depends on the selected component
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* | | |Set this bit as following according to the polarity of off-chip USB VBUS power switch.
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* | | |0 = The off-chip USB VBUS power switch enable is active high.
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* | | |1 = The off-chip USB VBUS power switch enable is active low.
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* |[5] |VBSTSPOL |Off-chip USB VBUS Power Switch Status Polarity
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* | | |The polarity of off-chip USB VBUS power switch valid signal depends on the selected component
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* | | |A USB_VBUS_ST pin is used to monitor the valid signal of the off-chip USB VBUS power switch
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* | | |Set this bit as following according to the polarity of off-chip USB VBUS power switch.
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* | | |0 = The polarity of off-chip USB VBUS power switch valid status is high.
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* | | |1 = The polarity of off-chip USB VBUS power switch valid status is low.
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* @var HSOTG_T::INTEN
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* Offset: 0x08 HSOTG Interrupt Enable Register
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* ---------------------------------------------------------------------------------------------------
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* |Bits |Field |Descriptions
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* | :----: | :----: | :---- |
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* |[0] |ROLECHGIEN|Role (Host or Peripheral) Changed Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[1] |VBEIEN |VBUS Error Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* | | |Note: VBUS error means going to a_vbus_err state. Please refer to A-device state diagram in OTG spec.
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* |[2] |SRPFIEN |SRP Fail Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[3] |HNPFIEN |HNP Fail Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[4] |GOIDLEIEN |OTG Device Goes to IDLE State Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* | | |Note: Going to idle state means going to a_idle or b_idle state
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* | | |Please refer to A-device state diagram and B-device state diagram in OTG spec.
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* |[5] |IDCHGIEN |IDSTS Changed Interrupt Enable Bit
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* | | |If this bit is set to 1 and IDSTS (OTG_STATUS[1]) status is changed from high to low or from low to high, a interrupt will be asserted.
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[6] |PDEVIEN |Act As Peripheral Interrupt Enable Bit
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* | | |If this bit is set to 1 and the device is changed as a peripheral, a interrupt will be asserted.
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* | | |0 = This device as a peripheral interrupt Disabled.
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* | | |1 = This device as a peripheral interrupt Enabled.
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* |[7] |HOSTIEN |Act As Host Interrupt Enable Bit
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* | | |If this bit is set to 1 and the device is changed as a host, a interrupt will be asserted.
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* | | |0 = This device as a host interrupt Disabled.
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* | | |1 = This device as a host interrupt Enabled.
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* |[8] |BVLDCHGIEN|B-device Session Valid Status Changed Interrupt Enable Bit
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* | | |If this bit is set to 1 and BVLD (OTG_STATUS[3]) status is changed from high to low or from low to high, a interrupt will be asserted.
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[9] |AVLDCHGIEN|A-device Session Valid Status Changed Interrupt Enable Bit
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* | | |If this bit is set to 1 and AVLD (OTG_STATUS[4]) status is changed from high to low or from low to high, a interrupt will be asserted.
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[10] |VBCHGIEN |VBUSVLD Status Changed Interrupt Enable Bit
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* | | |If this bit is set to 1 and VBUSVLD (OTG_STATUS[5]) status is changed from high to low or from low to high, a interrupt will be asserted.
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[11] |SECHGIEN |SESSEND Status Changed Interrupt Enable Bit
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* | | |If this bit is set to 1 and SESSEND (OTG_STATUS[2]) status is changed from high to low or from low to high, a interrupt will be asserted.
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* |[13] |SRPDETIEN |SRP Detected Interrupt Enable Bit
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* | | |0 = Interrupt Disabled.
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* | | |1 = Interrupt Enabled.
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* @var HSOTG_T::INTSTS
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* Offset: 0x0C HSOTG Interrupt Status Register
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* ---------------------------------------------------------------------------------------------------
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* |Bits |Field |Descriptions
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* | :----: | :----: | :---- |
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* |[0] |ROLECHGIF |OTG Role Change Interrupt Status
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* | | |This flag is set when the role of an OTG device changed from a host to a peripheral, or changed from a peripheral to a host while USB_ID pin status does not change.
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* | | |0 = OTG device role not changed.
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* | | |1 = OTG device role changed.
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* | | |Note: Write 1 to clear this flag.
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* |[1] |VBEIF |VBUS Error Interrupt Status
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* | | |This bit will be set when voltage on VBUS cannot reach a minimum valid threshold 4.4V within a maximum time of 100ms after OTG A-device starting to drive VBUS high.
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* | | |0 = OTG A-device drives VBUS over threshold voltage before this interval expires.
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* | | |1 = OTG A-device cannot drive VBUS over threshold voltage before this interval expires.
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* | | |Note: Write 1 to clear this flag and recover from the VBUS error state.
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* |[2] |SRPFIF |SRP Fail Interrupt Status
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* | | |After initiating SRP, an OTG B-device will wait for the OTG A-device to drive VBUS high at least TB_SRP_FAIL minimum, defined in OTG specification
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* | | |This flag is set when the OTG B-device does not get VBUS high after this interval.
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* | | |0 = OTG B-device gets VBUS high before this interval.
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* | | |1 = OTG B-device does not get VBUS high before this interval.
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* | | |Note: Write 1 to clear this flag.
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* |[3] |HNPFIF |HNP Fail Interrupt Status
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* | | |When A-device has granted B-device to be host and USB bus is in SE0 (both USB_D+ and USB_D- low) state, this bit will be set when A-device does not connect after specified interval expires.
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* | | |0 = A-device connects to B-device before specified interval expires.
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* | | |1 = A-device does not connect to B-device before specified interval expires.
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* | | |Note: Write 1 to clear this flag.
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* |[4] |GOIDLEIF |OTG Device Goes to IDLE Interrupt Status
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* | | |Flag is set if the OTG device transfers from non-idle state to idle state
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* | | |The OTG device will be neither a host nor a peripheral.
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* | | |0 = OTG device does not go back to idle state (a_idle or b_idle).
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* | | |1 = OTG device goes back to idle state(a_idle or b_idle).
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* | | |Note 1: Going to idle state means going to a_idle or b_idle state. Please refer to OTG specification.
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* | | |Note 2: Write 1 to clear this flag.
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* |[5] |IDCHGIF |ID State Change Interrupt Status
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* | | |0 = IDSTS (OTG_STATUS[1]) not toggled.
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* | | |1 = IDSTS (OTG_STATUS[1]) from high to low or from low to high.
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* | | |Note: Write 1 to clear this flag.
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* |[6] |PDEVIF |Act As Peripheral Interrupt Status
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* | | |0= This device does not act as a peripheral.
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* | | |1 = This device acts as a peripheral.
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* | | |Note: Write 1 to clear this flag.
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* |[7] |HOSTIF |Act As Host Interrupt Status
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* | | |0= This device does not act as a host.
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* | | |1 = This device acts as a host.
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* | | |Note: Write 1 to clear this flag.
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* |[8] |BVLDCHGIF |B-device Session Valid State Change Interrupt Status
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* | | |0 = BVLD (OTG_STATUS[3]) is not toggled.
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* | | |1 = BVLD (OTG_STATUS[3]) from high to low or low to high.
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* | | |Note: Write 1 to clear this status.
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* |[9] |AVLDCHGIF |A-device Session Valid State Change Interrupt Status
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* | | |0 = AVLD (OTG_STATUS[4]) not toggled.
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* | | |1 = AVLD (OTG_STATUS[4]) from high to low or low to high.
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* | | |Note: Write 1 to clear this status.
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* |[10] |VBCHGIF |VBUSVLD State Change Interrupt Status
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* | | |0 = VBUSVLD (OTG_STATUS[5]) not toggled.
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* | | |1 = VBUSVLD (OTG_STATUS[5]) from high to low or from low to high.
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* | | |Note: Write 1 to clear this status.
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* |[11] |SECHGIF |SESSEND State Change Interrupt Status
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* | | |0 = SESSEND (OTG_STATUS[2]) not toggled.
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* | | |1 = SESSEND (OTG_STATUS[2]) from high to low or from low to high.
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* | | |Note: Write 1 to clear this flag.
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* |[13] |SRPDETIF |SRP Detected Interrupt Status
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* | | |0 = SRP not detected.
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* | | |1 = SRP detected.
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* | | |Note: Write 1 to clear this status.
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* @var HSOTG_T::STATUS
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* Offset: 0x10 HSOTG Status Register
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* ---------------------------------------------------------------------------------------------------
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* |Bits |Field |Descriptions
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* | :----: | :----: | :---- |
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* |[0] |OVERCUR |over Current Condition
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* | | |The voltage on VBUS cannot reach a minimum VBUS valid threshold, 4.4V minimum, within a maximum time of 100ms after OTG A-device drives VBUS high.
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* | | |0 = OTG A-device drives VBUS successfully.
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* | | |1 = OTG A-device cannot drives VBUS high in this interval.
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* |[1] |IDSTS |USB_ID Pin State of Mini-b/Micro-plug
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* | | |0 = Mini-A/Micro-A plug is attached.
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* | | |1 = Mini-B/Micro-B plug is attached.
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* |[2] |SESSEND |Session End Status
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* | | |When VBUS voltage is lower than 0.4V, this bit will be set to 1
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* | | |Session end means no meaningful power on VBUS.
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* | | |0 = Session is not end.
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* | | |1 = Session is end.
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* |[3] |BVLD |B-device Session Valid Status
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* | | |0 = B-device session is not valid.
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* | | |1 = B-device session is valid.
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* |[4] |AVLD |A-device Session Valid Status
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* | | |0 = A-device session is not valid.
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* | | |1 = A-device session is valid.
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* |[5] |VBUSVLD |VBUS Valid Status
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* | | |When VBUS is larger than 4.7V and A-device drives VBUS , this bit will be set to 1.
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* | | |0 = VBUS is not valid.
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* | | |1 = VBUS is valid.
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* |[6] |ASPERI |As Peripheral Status
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* | | |When OTG as peripheral, this bit is set.
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* | | |0: OTG not as peripheral
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* | | |1: OTG as peripheral
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* |[7] |ASHOST |As Host Status
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* | | |When OTG as Host, this bit is set.
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* | | |0: OTG not as Host
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* | | |1: OTG as Host
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*/
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__IO uint32_t CTL; /*!< [0x0000] HSOTG Control Register */
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__IO uint32_t PHYCTL; /*!< [0x0004] HSOTG PHY Control Register */
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__IO uint32_t INTEN; /*!< [0x0008] HSOTG Interrupt Enable Register */
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__IO uint32_t INTSTS; /*!< [0x000c] HSOTG Interrupt Status Register */
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__I uint32_t STATUS; /*!< [0x0010] HSOTG Status Register */
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} HSOTG_T;
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/**
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@addtogroup HSOTG_CONST HSOTG Bit Field Definition
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Constant Definitions for HSOTG Controller
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@{ */
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#define HSOTG_CTL_VBUSDROP_Pos (0) /*!< HSOTG_T::CTL: VBUSDROP Position */
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#define HSOTG_CTL_VBUSDROP_Msk (0x1ul << HSOTG_CTL_VBUSDROP_Pos) /*!< HSOTG_T::CTL: VBUSDROP Mask */
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#define HSOTG_CTL_BUSREQ_Pos (1) /*!< HSOTG_T::CTL: BUSREQ Position */
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#define HSOTG_CTL_BUSREQ_Msk (0x1ul << HSOTG_CTL_BUSREQ_Pos) /*!< HSOTG_T::CTL: BUSREQ Mask */
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#define HSOTG_CTL_HNPREQEN_Pos (2) /*!< HSOTG_T::CTL: HNPREQEN Position */
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#define HSOTG_CTL_HNPREQEN_Msk (0x1ul << HSOTG_CTL_HNPREQEN_Pos) /*!< HSOTG_T::CTL: HNPREQEN Mask */
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#define HSOTG_CTL_OTGEN_Pos (4) /*!< HSOTG_T::CTL: OTGEN Position */
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#define HSOTG_CTL_OTGEN_Msk (0x1ul << HSOTG_CTL_OTGEN_Pos) /*!< HSOTG_T::CTL: OTGEN Mask */
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#define HSOTG_CTL_WKEN_Pos (5) /*!< HSOTG_T::CTL: WKEN Position */
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#define HSOTG_CTL_WKEN_Msk (0x1ul << HSOTG_CTL_WKEN_Pos) /*!< HSOTG_T::CTL: WKEN Mask */
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#define HSOTG_PHYCTL_OTGPHYEN_Pos (0) /*!< HSOTG_T::PHYCTL: OTGPHYEN Position */
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#define HSOTG_PHYCTL_OTGPHYEN_Msk (0x1ul << HSOTG_PHYCTL_OTGPHYEN_Pos) /*!< HSOTG_T::PHYCTL: OTGPHYEN Mask */
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#define HSOTG_PHYCTL_IDDETEN_Pos (1) /*!< HSOTG_T::PHYCTL: IDDETEN Position */
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#define HSOTG_PHYCTL_IDDETEN_Msk (0x1ul << HSOTG_PHYCTL_IDDETEN_Pos) /*!< HSOTG_T::PHYCTL: IDDETEN Mask */
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#define HSOTG_PHYCTL_VBENPOL_Pos (4) /*!< HSOTG_T::PHYCTL: VBENPOL Position */
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#define HSOTG_PHYCTL_VBENPOL_Msk (0x1ul << HSOTG_PHYCTL_VBENPOL_Pos) /*!< HSOTG_T::PHYCTL: VBENPOL Mask */
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#define HSOTG_PHYCTL_VBSTSPOL_Pos (5) /*!< HSOTG_T::PHYCTL: VBSTSPOL Position */
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#define HSOTG_PHYCTL_VBSTSPOL_Msk (0x1ul << HSOTG_PHYCTL_VBSTSPOL_Pos) /*!< HSOTG_T::PHYCTL: VBSTSPOL Mask */
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#define HSOTG_INTEN_ROLECHGIEN_Pos (0) /*!< HSOTG_T::INTEN: ROLECHGIEN Position */
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#define HSOTG_INTEN_ROLECHGIEN_Msk (0x1ul << HSOTG_INTEN_ROLECHGIEN_Pos) /*!< HSOTG_T::INTEN: ROLECHGIEN Mask */
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#define HSOTG_INTEN_VBEIEN_Pos (1) /*!< HSOTG_T::INTEN: VBEIEN Position */
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#define HSOTG_INTEN_VBEIEN_Msk (0x1ul << HSOTG_INTEN_VBEIEN_Pos) /*!< HSOTG_T::INTEN: VBEIEN Mask */
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#define HSOTG_INTEN_SRPFIEN_Pos (2) /*!< HSOTG_T::INTEN: SRPFIEN Position */
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#define HSOTG_INTEN_SRPFIEN_Msk (0x1ul << HSOTG_INTEN_SRPFIEN_Pos) /*!< HSOTG_T::INTEN: SRPFIEN Mask */
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#define HSOTG_INTEN_HNPFIEN_Pos (3) /*!< HSOTG_T::INTEN: HNPFIEN Position */
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#define HSOTG_INTEN_HNPFIEN_Msk (0x1ul << HSOTG_INTEN_HNPFIEN_Pos) /*!< HSOTG_T::INTEN: HNPFIEN Mask */
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#define HSOTG_INTEN_GOIDLEIEN_Pos (4) /*!< HSOTG_T::INTEN: GOIDLEIEN Position */
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#define HSOTG_INTEN_GOIDLEIEN_Msk (0x1ul << HSOTG_INTEN_GOIDLEIEN_Pos) /*!< HSOTG_T::INTEN: GOIDLEIEN Mask */
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#define HSOTG_INTEN_IDCHGIEN_Pos (5) /*!< HSOTG_T::INTEN: IDCHGIEN Position */
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#define HSOTG_INTEN_IDCHGIEN_Msk (0x1ul << HSOTG_INTEN_IDCHGIEN_Pos) /*!< HSOTG_T::INTEN: IDCHGIEN Mask */
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#define HSOTG_INTEN_PDEVIEN_Pos (6) /*!< HSOTG_T::INTEN: PDEVIEN Position */
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#define HSOTG_INTEN_PDEVIEN_Msk (0x1ul << HSOTG_INTEN_PDEVIEN_Pos) /*!< HSOTG_T::INTEN: PDEVIEN Mask */
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#define HSOTG_INTEN_HOSTIEN_Pos (7) /*!< HSOTG_T::INTEN: HOSTIEN Position */
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#define HSOTG_INTEN_HOSTIEN_Msk (0x1ul << HSOTG_INTEN_HOSTIEN_Pos) /*!< HSOTG_T::INTEN: HOSTIEN Mask */
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#define HSOTG_INTEN_BVLDCHGIEN_Pos (8) /*!< HSOTG_T::INTEN: BVLDCHGIEN Position */
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#define HSOTG_INTEN_BVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_BVLDCHGIEN_Pos) /*!< HSOTG_T::INTEN: BVLDCHGIEN Mask */
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#define HSOTG_INTEN_AVLDCHGIEN_Pos (9) /*!< HSOTG_T::INTEN: AVLDCHGIEN Position */
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#define HSOTG_INTEN_AVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_AVLDCHGIEN_Pos) /*!< HSOTG_T::INTEN: AVLDCHGIEN Mask */
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#define HSOTG_INTEN_VBCHGIEN_Pos (10) /*!< HSOTG_T::INTEN: VBCHGIEN Position */
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#define HSOTG_INTEN_VBCHGIEN_Msk (0x1ul << HSOTG_INTEN_VBCHGIEN_Pos) /*!< HSOTG_T::INTEN: VBCHGIEN Mask */
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#define HSOTG_INTEN_SECHGIEN_Pos (11) /*!< HSOTG_T::INTEN: SECHGIEN Position */
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#define HSOTG_INTEN_SECHGIEN_Msk (0x1ul << HSOTG_INTEN_SECHGIEN_Pos) /*!< HSOTG_T::INTEN: SECHGIEN Mask */
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#define HSOTG_INTEN_SRPDETIEN_Pos (13) /*!< HSOTG_T::INTEN: SRPDETIEN Position */
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#define HSOTG_INTEN_SRPDETIEN_Msk (0x1ul << HSOTG_INTEN_SRPDETIEN_Pos) /*!< HSOTG_T::INTEN: SRPDETIEN Mask */
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#define HSOTG_INTSTS_ROLECHGIF_Pos (0) /*!< HSOTG_T::INTSTS: ROLECHGIF Position */
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#define HSOTG_INTSTS_ROLECHGIF_Msk (0x1ul << HSOTG_INTSTS_ROLECHGIF_Pos) /*!< HSOTG_T::INTSTS: ROLECHGIF Mask */
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#define HSOTG_INTSTS_VBEIF_Pos (1) /*!< HSOTG_T::INTSTS: VBEIF Position */
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#define HSOTG_INTSTS_VBEIF_Msk (0x1ul << HSOTG_INTSTS_VBEIF_Pos) /*!< HSOTG_T::INTSTS: VBEIF Mask */
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#define HSOTG_INTSTS_SRPFIF_Pos (2) /*!< HSOTG_T::INTSTS: SRPFIF Position */
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#define HSOTG_INTSTS_SRPFIF_Msk (0x1ul << HSOTG_INTSTS_SRPFIF_Pos) /*!< HSOTG_T::INTSTS: SRPFIF Mask */
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#define HSOTG_INTSTS_HNPFIF_Pos (3) /*!< HSOTG_T::INTSTS: HNPFIF Position */
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#define HSOTG_INTSTS_HNPFIF_Msk (0x1ul << HSOTG_INTSTS_HNPFIF_Pos) /*!< HSOTG_T::INTSTS: HNPFIF Mask */
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#define HSOTG_INTSTS_GOIDLEIF_Pos (4) /*!< HSOTG_T::INTSTS: GOIDLEIF Position */
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#define HSOTG_INTSTS_GOIDLEIF_Msk (0x1ul << HSOTG_INTSTS_GOIDLEIF_Pos) /*!< HSOTG_T::INTSTS: GOIDLEIF Mask */
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#define HSOTG_INTSTS_IDCHGIF_Pos (5) /*!< HSOTG_T::INTSTS: IDCHGIF Position */
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#define HSOTG_INTSTS_IDCHGIF_Msk (0x1ul << HSOTG_INTSTS_IDCHGIF_Pos) /*!< HSOTG_T::INTSTS: IDCHGIF Mask */
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#define HSOTG_INTSTS_PDEVIF_Pos (6) /*!< HSOTG_T::INTSTS: PDEVIF Position */
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#define HSOTG_INTSTS_PDEVIF_Msk (0x1ul << HSOTG_INTSTS_PDEVIF_Pos) /*!< HSOTG_T::INTSTS: PDEVIF Mask */
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#define HSOTG_INTSTS_HOSTIF_Pos (7) /*!< HSOTG_T::INTSTS: HOSTIF Position */
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#define HSOTG_INTSTS_HOSTIF_Msk (0x1ul << HSOTG_INTSTS_HOSTIF_Pos) /*!< HSOTG_T::INTSTS: HOSTIF Mask */
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#define HSOTG_INTSTS_BVLDCHGIF_Pos (8) /*!< HSOTG_T::INTSTS: BVLDCHGIF Position */
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#define HSOTG_INTSTS_BVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_BVLDCHGIF_Pos) /*!< HSOTG_T::INTSTS: BVLDCHGIF Mask */
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#define HSOTG_INTSTS_AVLDCHGIF_Pos (9) /*!< HSOTG_T::INTSTS: AVLDCHGIF Position */
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#define HSOTG_INTSTS_AVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_AVLDCHGIF_Pos) /*!< HSOTG_T::INTSTS: AVLDCHGIF Mask */
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#define HSOTG_INTSTS_VBCHGIF_Pos (10) /*!< HSOTG_T::INTSTS: VBCHGIF Position */
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#define HSOTG_INTSTS_VBCHGIF_Msk (0x1ul << HSOTG_INTSTS_VBCHGIF_Pos) /*!< HSOTG_T::INTSTS: VBCHGIF Mask */
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#define HSOTG_INTSTS_SECHGIF_Pos (11) /*!< HSOTG_T::INTSTS: SECHGIF Position */
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#define HSOTG_INTSTS_SECHGIF_Msk (0x1ul << HSOTG_INTSTS_SECHGIF_Pos) /*!< HSOTG_T::INTSTS: SECHGIF Mask */
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#define HSOTG_INTSTS_SRPDETIF_Pos (13) /*!< HSOTG_T::INTSTS: SRPDETIF Position */
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#define HSOTG_INTSTS_SRPDETIF_Msk (0x1ul << HSOTG_INTSTS_SRPDETIF_Pos) /*!< HSOTG_T::INTSTS: SRPDETIF Mask */
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#define HSOTG_STATUS_OVERCUR_Pos (0) /*!< HSOTG_T::STATUS: OVERCUR Position */
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#define HSOTG_STATUS_OVERCUR_Msk (0x1ul << HSOTG_STATUS_OVERCUR_Pos) /*!< HSOTG_T::STATUS: OVERCUR Mask */
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#define HSOTG_STATUS_IDSTS_Pos (1) /*!< HSOTG_T::STATUS: IDSTS Position */
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#define HSOTG_STATUS_IDSTS_Msk (0x1ul << HSOTG_STATUS_IDSTS_Pos) /*!< HSOTG_T::STATUS: IDSTS Mask */
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#define HSOTG_STATUS_SESSEND_Pos (2) /*!< HSOTG_T::STATUS: SESSEND Position */
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#define HSOTG_STATUS_SESSEND_Msk (0x1ul << HSOTG_STATUS_SESSEND_Pos) /*!< HSOTG_T::STATUS: SESSEND Mask */
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#define HSOTG_STATUS_BVLD_Pos (3) /*!< HSOTG_T::STATUS: BVLD Position */
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#define HSOTG_STATUS_BVLD_Msk (0x1ul << HSOTG_STATUS_BVLD_Pos) /*!< HSOTG_T::STATUS: BVLD Mask */
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#define HSOTG_STATUS_AVLD_Pos (4) /*!< HSOTG_T::STATUS: AVLD Position */
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#define HSOTG_STATUS_AVLD_Msk (0x1ul << HSOTG_STATUS_AVLD_Pos) /*!< HSOTG_T::STATUS: AVLD Mask */
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#define HSOTG_STATUS_VBUSVLD_Pos (5) /*!< HSOTG_T::STATUS: VBUSVLD Position */
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#define HSOTG_STATUS_VBUSVLD_Msk (0x1ul << HSOTG_STATUS_VBUSVLD_Pos) /*!< HSOTG_T::STATUS: VBUSVLD Mask */
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#define HSOTG_STATUS_ASPERI_Pos (6) /*!< HSOTG_T::STATUS: ASPERI Position */
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#define HSOTG_STATUS_ASPERI_Msk (0x1ul << HSOTG_STATUS_ASPERI_Pos) /*!< HSOTG_T::STATUS: ASPERI Mask */
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#define HSOTG_STATUS_ASHOST_Pos (7) /*!< HSOTG_T::STATUS: ASHOST Position */
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#define HSOTG_STATUS_ASHOST_Msk (0x1ul << HSOTG_STATUS_ASHOST_Pos) /*!< HSOTG_T::STATUS: ASHOST Mask */
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/**@}*/ /* HSOTG_CONST */
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/**@}*/ /* end of HSOTG register group */
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/**@}*/ /* end of REGISTER group */
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#if defined ( __CC_ARM )
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#pragma no_anon_unions
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#endif
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#endif /* __HSOTG_REG_H__ */
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