415 lines
18 KiB
C
415 lines
18 KiB
C
/*
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* Copyright (c) 2015 - 2022, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef NRF_EGU_H__
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#define NRF_EGU_H__
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#include <nrfx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @defgroup nrf_egu_hal EGU HAL
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* @{
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* @ingroup nrf_egu
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* @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral.
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*/
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/**
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* @brief Macro getting pointer to the structure of registers of the EGU peripheral.
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*
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* @param[in] idx EGU instance index.
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*
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* @return Pointer to the structure of registers of the EGU peripheral.
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*/
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#define NRF_EGU_INST_GET(idx) NRFX_CONCAT_2(NRF_EGU, idx)
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/** @brief EGU tasks. */
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typedef enum
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{
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NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
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NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
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NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
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NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */
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NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */
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NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */
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NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */
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NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */
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NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */
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NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */
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NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */
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NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */
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NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */
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NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
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NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
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NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
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} nrf_egu_task_t;
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/** @brief EGU events. */
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typedef enum
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{
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NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
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NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
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NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
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NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */
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NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */
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NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */
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NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */
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NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */
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NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */
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NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */
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NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */
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NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */
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NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */
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NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
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NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
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NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
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} nrf_egu_event_t;
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/** @brief EGU interrupts. */
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typedef enum
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{
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NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
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NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */
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NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */
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NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */
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NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */
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NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */
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NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */
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NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */
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NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */
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NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */
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NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */
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NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */
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NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */
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NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */
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NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */
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NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */
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NRF_EGU_INT_ALL = 0xFFFFuL
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} nrf_egu_int_mask_t;
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/**
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* @brief Function for getting the maximum channel number of the given EGU.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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*
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* @return Number of available channels.
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*/
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NRF_STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type const * p_reg);
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/**
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* @brief Function for triggering the specified EGU task.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] egu_task EGU task.
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*/
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NRF_STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * p_reg, nrf_egu_task_t egu_task);
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/**
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* @brief Function for returning the address of the specified EGU task register.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] egu_task EGU task.
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*
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* @return Address of the specified EGU task register.
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*/
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NRF_STATIC_INLINE uint32_t nrf_egu_task_address_get(NRF_EGU_Type const * p_reg,
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nrf_egu_task_t egu_task);
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/**
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* @brief Function for returning the specified EGU TRIGGER task.
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*
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* @param[in] channel Channel number.
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*
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* @return The specified EGU TRIGGER task.
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*/
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NRF_STATIC_INLINE nrf_egu_task_t nrf_egu_trigger_task_get(uint8_t channel);
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/**
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* @brief Function for retrieving the state of the UARTE event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] egu_event EGU event to be checked.
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*
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* @retval true The event has been generated.
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* @retval false The event has not been generated.
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*/
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NRF_STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type const * p_reg, nrf_egu_event_t egu_event);
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/**
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* @brief Function for clearing the specified EGU event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] egu_event EGU event to clear.
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*/
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NRF_STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * p_reg, nrf_egu_event_t egu_event);
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/**
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* @brief Function for returning the address of the specified EGU event register.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] egu_event EGU event.
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*
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* @return Address of the specified EGU event register.
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*/
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NRF_STATIC_INLINE uint32_t nrf_egu_event_address_get(NRF_EGU_Type const * p_reg,
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nrf_egu_event_t egu_event);
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/**
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* @brief Function for returning the specified EGU TRIGGERED event.
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*
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* @param[in] channel Channel number.
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*
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* @return The specified EGU TRIGGERED event.
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*/
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NRF_STATIC_INLINE nrf_egu_event_t nrf_egu_triggered_event_get(uint8_t channel);
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/**
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* @brief Function for enabling one or more of the EGU interrupts.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be enabled.
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*/
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NRF_STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * p_reg, uint32_t mask);
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/**
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* @brief Function for retrieving the state of one or more of the EGU interrupts.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be checked.
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*
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* @return Mask of enabled interrupts.
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*/
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NRF_STATIC_INLINE uint32_t nrf_egu_int_enable_check(NRF_EGU_Type const * p_reg, uint32_t mask);
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/**
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* @brief Function for disabling one or more of the EGU interrupts.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be disabled.
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*/
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NRF_STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * p_reg, uint32_t mask);
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/**
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* @brief Function for retrieving the state of interrupt of the specified EGU channel.
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*
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* @param[in] channel Channel number.
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*
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* @return EGU interrupt mask.
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*/
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NRF_STATIC_INLINE nrf_egu_int_mask_t nrf_egu_channel_int_get(uint8_t channel);
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#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
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/**
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* @brief Function for setting the subscribe configuration for a given
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* EGU task.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] task Task for which to set the configuration.
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* @param[in] channel Channel through which to subscribe events.
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*/
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NRF_STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
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nrf_egu_task_t task,
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uint8_t channel);
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/**
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* @brief Function for clearing the subscribe configuration for a given
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* EGU task.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] task Task for which to clear the configuration.
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*/
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NRF_STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
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nrf_egu_task_t task);
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/**
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* @brief Function for setting the publish configuration for a given
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* EGU event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] event Event for which to set the configuration.
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* @param[in] channel Channel through which to publish the event.
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*/
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NRF_STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
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nrf_egu_event_t event,
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uint8_t channel);
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/**
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* @brief Function for clearing the publish configuration for a given
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* EGU event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] event Event for which to clear the configuration.
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*/
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NRF_STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
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nrf_egu_event_t event);
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#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
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#ifndef NRF_DECLARE_ONLY
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NRF_STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type const * p_reg)
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{
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if (p_reg == NRF_EGU0){
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return EGU0_CH_NUM;
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}
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#if EGU_COUNT > 1
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if (p_reg == NRF_EGU1){
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return EGU1_CH_NUM;
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}
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#endif
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#if EGU_COUNT > 2
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if (p_reg == NRF_EGU2){
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return EGU2_CH_NUM;
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}
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if (p_reg == NRF_EGU3){
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return EGU3_CH_NUM;
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}
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if (p_reg == NRF_EGU4){
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return EGU4_CH_NUM;
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}
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if (p_reg == NRF_EGU5){
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return EGU5_CH_NUM;
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}
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#endif
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return 0;
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}
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NRF_STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * p_reg, nrf_egu_task_t egu_task)
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{
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NRFX_ASSERT(p_reg);
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*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)egu_task)) = 0x1UL;
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}
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NRF_STATIC_INLINE uint32_t nrf_egu_task_address_get(NRF_EGU_Type const * p_reg,
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nrf_egu_task_t egu_task)
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{
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NRFX_ASSERT(p_reg);
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return (uint32_t)((uint8_t *)p_reg + (uint32_t)egu_task);
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}
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NRF_STATIC_INLINE nrf_egu_task_t nrf_egu_trigger_task_get(uint8_t channel)
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{
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return (nrf_egu_task_t)NRFX_OFFSETOF(NRF_EGU_Type, TASKS_TRIGGER[channel]);
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}
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NRF_STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type const * p_reg, nrf_egu_event_t egu_event)
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{
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NRFX_ASSERT(p_reg);
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return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)egu_event);
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}
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NRF_STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * p_reg, nrf_egu_event_t egu_event)
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{
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NRFX_ASSERT(p_reg);
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*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)egu_event)) = 0x0UL;
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nrf_event_readback((uint8_t *)p_reg + (uint32_t)egu_event);
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}
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NRF_STATIC_INLINE uint32_t nrf_egu_event_address_get(NRF_EGU_Type const * p_reg,
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nrf_egu_event_t egu_event)
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{
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NRFX_ASSERT(p_reg);
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return (uint32_t)((uint8_t *)p_reg + (uint32_t)egu_event);
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}
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NRF_STATIC_INLINE nrf_egu_event_t nrf_egu_triggered_event_get(uint8_t channel)
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{
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return (nrf_egu_event_t)NRFX_OFFSETOF(NRF_EGU_Type, EVENTS_TRIGGERED[channel]);
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}
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NRF_STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * p_reg, uint32_t mask)
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{
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|
NRFX_ASSERT(p_reg);
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p_reg->INTENSET = mask;
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}
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NRF_STATIC_INLINE uint32_t nrf_egu_int_enable_check(NRF_EGU_Type const * p_reg, uint32_t mask)
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{
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|
NRFX_ASSERT(p_reg);
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return p_reg->INTENSET & mask;
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}
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NRF_STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * p_reg, uint32_t mask)
|
|
{
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|
NRFX_ASSERT(p_reg);
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p_reg->INTENCLR = mask;
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}
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|
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NRF_STATIC_INLINE nrf_egu_int_mask_t nrf_egu_channel_int_get(uint8_t channel)
|
|
{
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|
return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
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}
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|
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#if defined(DPPI_PRESENT)
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NRF_STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
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|
nrf_egu_task_t task,
|
|
uint8_t channel)
|
|
{
|
|
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
|
|
((uint32_t)channel | EGU_SUBSCRIBE_TRIGGER_EN_Msk);
|
|
}
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|
|
|
NRF_STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
|
|
nrf_egu_task_t task)
|
|
{
|
|
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
|
|
}
|
|
|
|
NRF_STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
|
|
nrf_egu_event_t event,
|
|
uint8_t channel)
|
|
{
|
|
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
|
|
((uint32_t)channel | EGU_PUBLISH_TRIGGERED_EN_Msk);
|
|
}
|
|
|
|
NRF_STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
|
|
nrf_egu_event_t event)
|
|
{
|
|
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
|
|
}
|
|
#endif // defined(DPPI_PRESENT)
|
|
|
|
#endif // NRF_DECLARE_ONLY
|
|
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif
|