678 lines
24 KiB
C
678 lines
24 KiB
C
/*
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* Copyright (c) 2016 - 2022, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <nrfx.h>
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#if NRFX_CHECK(NRFX_CLOCK_ENABLED)
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#include <nrfx_clock.h>
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#include <nrf_erratas.h>
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#define NRFX_LOG_MODULE CLOCK
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#include <nrfx_log.h>
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#if NRFX_CHECK(NRFX_POWER_ENABLED)
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extern bool nrfx_power_irq_enabled;
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#endif
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#if defined(CLOCK_LFCLKSRC_SRC_RC) || defined(__NRFX_DOXYGEN__)
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#define LF_SRC_RC CLOCK_LFCLKSRC_SRC_RC
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#else
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#define LF_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC
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#endif
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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#if (NRF_CLOCK_HAS_CALIBRATION == 0)
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#error "Calibration is not available in the SoC that is used."
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#endif
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#if (NRFX_CLOCK_CONFIG_LF_SRC != LF_SRC_RC)
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#error "Calibration can be performed only for the RC Oscillator."
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#endif
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#endif
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#if !defined(USE_WORKAROUND_FOR_ANOMALY_132) && \
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(defined(NRF52832_XXAA) || defined(NRF52832_XXAB))
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// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
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// applies delay of 138us before starting LFCLK.
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#define USE_WORKAROUND_FOR_ANOMALY_132 1
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// Convert time to cycles (nRF52832 is clocked with 64 MHz, use delay of 138 us).
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#define ANOMALY_132_DELAY_CYCLES (64UL * 138)
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#endif
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#if !defined(USE_WORKAROUND_FOR_ANOMALY_192) && \
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(defined(NRF52810_XXAA) || \
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defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
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defined(NRF52840_XXAA))
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// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
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// after calibration, exceeding 500 ppm).
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#define USE_WORKAROUND_FOR_ANOMALY_192 1
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#endif
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#if !defined(USE_WORKAROUND_FOR_ANOMALY_201) && \
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(defined(NRF52810_XXAA) || \
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defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
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defined(NRF52840_XXAA))
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// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
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#define USE_WORKAROUND_FOR_ANOMALY_201 1
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#endif
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#if defined(CLOCK_LFCLKSRC_SRC_Xtal)
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#define LF_SRC_LFXO CLOCK_LFCLKSRC_SRC_Xtal
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#else
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#define LF_SRC_LFXO CLOCK_LFCLKSRC_SRC_LFXO
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#endif
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#if defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES)
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#define LF_SRC_XTAL_LOW (CLOCK_LFCLKSRC_SRC_Xtal | \
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(CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos))
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#define LF_SRC_XTAL_FULL (CLOCK_LFCLKSRC_SRC_Xtal | \
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(CLOCK_LFCLKSRC_BYPASS_Enabled << CLOCK_LFCLKSRC_BYPASS_Pos) | \
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(CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos))
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#else
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#define LF_SRC_XTAL_LOW LF_SRC_LFXO
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#define LF_SRC_XTAL_FULL LF_SRC_LFXO
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#endif
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED) && \
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NRFX_CLOCK_CONFIG_LF_SRC != LF_SRC_LFXO && \
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NRFX_CLOCK_CONFIG_LF_SRC != LF_SRC_XTAL_LOW && \
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NRFX_CLOCK_CONFIG_LF_SRC != LF_SRC_XTAL_FULL
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#error "Two-stage LFXO start procedure enabled but LFCLK source is not set to LFXO!"
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#endif
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#if !defined(NRFX_CLOCK_CONFIG_CT_ENABLED) && NRF_CLOCK_HAS_CALIBRATION_TIMER
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#define NRFX_CLOCK_CONFIG_CT_ENABLED 1
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#endif
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && !NRF_CLOCK_HAS_CALIBRATION_TIMER
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#error "Calibration timer is not available in the SoC that is used."
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#endif
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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typedef enum
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{
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CAL_STATE_IDLE,
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CAL_STATE_CAL
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} nrfx_clock_cal_state_t;
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#endif
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/** @brief CLOCK control block. */
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typedef struct
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{
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nrfx_clock_event_handler_t event_handler;
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bool module_initialized; /*< Indicate the state of module */
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#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
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bool hfclk_started; /*< Anomaly 201 workaround. */
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#endif
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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volatile nrfx_clock_cal_state_t cal_state;
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#endif
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} nrfx_clock_cb_t;
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static nrfx_clock_cb_t m_clock_cb;
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/**
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* This variable is used to check whether common POWER_CLOCK common interrupt
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* should be disabled or not if @ref nrfx_power tries to disable the interrupt.
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*/
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#if NRFX_CHECK(NRFX_POWER_ENABLED)
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bool nrfx_clock_irq_enabled;
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#endif
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#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
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/**
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* @brief Function for applying delay of 138us before starting LFCLK.
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*/
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static void nrfx_clock_anomaly_132(void)
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{
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uint32_t cyccnt_inital;
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uint32_t core_debug;
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uint32_t dwt_ctrl;
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// Preserve DEMCR register to do not influence into its configuration. Enable the trace and
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// debug blocks. It is required to read and write data to DWT block.
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core_debug = CoreDebug->DEMCR;
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CoreDebug->DEMCR = core_debug | CoreDebug_DEMCR_TRCENA_Msk;
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// Preserve CTRL register in DWT block to do not influence into its configuration. Make sure
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// that cycle counter is enabled.
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dwt_ctrl = DWT->CTRL;
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DWT->CTRL = dwt_ctrl | DWT_CTRL_CYCCNTENA_Msk;
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// Store start value of cycle counter.
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cyccnt_inital = DWT->CYCCNT;
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// Delay required time.
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while ((DWT->CYCCNT - cyccnt_inital) < ANOMALY_132_DELAY_CYCLES)
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{}
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// Restore preserved registers.
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DWT->CTRL = dwt_ctrl;
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CoreDebug->DEMCR = core_debug;
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}
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#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
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static void clock_stop(nrf_clock_domain_t domain)
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{
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switch (domain)
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{
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case NRF_CLOCK_DOMAIN_LFCLK:
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nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTOP);
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break;
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case NRF_CLOCK_DOMAIN_HFCLK:
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nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTOP);
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break;
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#if NRF_CLOCK_HAS_HFCLK192M
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case NRF_CLOCK_DOMAIN_HFCLK192M:
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nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLK192MSTOP);
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break;
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#endif
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#if NRF_CLOCK_HAS_HFCLKAUDIO
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case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
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nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HFAUDIO_STARTED_MASK);
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKAUDIOSTOP);
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break;
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#endif
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default:
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NRFX_ASSERT(0);
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return;
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}
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bool stopped;
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nrf_clock_hfclk_t clk_src = NRF_CLOCK_HFCLK_HIGH_ACCURACY;
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nrf_clock_hfclk_t *p_clk_src = (domain == NRF_CLOCK_DOMAIN_HFCLK) ? &clk_src : NULL;
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NRFX_WAIT_FOR((!nrfx_clock_is_running(domain, p_clk_src) ||
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(p_clk_src && clk_src != NRF_CLOCK_HFCLK_HIGH_ACCURACY)), 10000, 1, stopped);
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if (!stopped)
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{
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NRFX_LOG_ERROR("Failed to stop clock domain: %d.", domain);
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}
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#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
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if (domain == NRF_CLOCK_DOMAIN_HFCLK)
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{
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m_clock_cb.hfclk_started = false;
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}
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#endif
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}
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static nrf_clock_lfclk_t clock_initial_lfclksrc_get(void)
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{
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
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return NRF_CLOCK_LFCLK_RC;
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#else
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return (nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC;
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#endif
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}
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/**
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* @brief Function for tweaking the specified low-frequency clock source given current driver state.
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*
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* @warning This function may stop currently running low-frequency clock source.
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*
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* @param[in,out] p_lfclksrc Pointer to the variable containing low-frequency clock source.
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* It is set to adequate value in case of being inappropriate
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* for current driver configuration.
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*
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* @return True if the specified clock source was correct, false otherwise.
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*/
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static bool clock_lfclksrc_tweak(nrf_clock_lfclk_t * p_lfclksrc)
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{
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bool is_correct_clk = (*p_lfclksrc == NRFX_CLOCK_CONFIG_LF_SRC);
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
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// In case of two-stage LFXO start procedure RC source is valid as well.
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is_correct_clk = is_correct_clk || (*p_lfclksrc == NRF_CLOCK_LFCLK_RC);
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#endif
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if (!is_correct_clk)
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{
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// Inappropriate LF clock source is chosen.
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// Stop currently active LF clock source and choose the correct one to start.
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clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
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*p_lfclksrc = clock_initial_lfclksrc_get();
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}
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return is_correct_clk;
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}
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nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
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{
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NRFX_ASSERT(event_handler);
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nrfx_err_t err_code = NRFX_SUCCESS;
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if (m_clock_cb.module_initialized)
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{
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err_code = NRFX_ERROR_ALREADY_INITIALIZED;
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}
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else
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{
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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m_clock_cb.cal_state = CAL_STATE_IDLE;
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#endif
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m_clock_cb.event_handler = event_handler;
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m_clock_cb.module_initialized = true;
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#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
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m_clock_cb.hfclk_started = false;
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#endif
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}
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NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
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return err_code;
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}
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void nrfx_clock_enable(void)
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{
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NRFX_ASSERT(m_clock_cb.module_initialized);
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nrfx_power_clock_irq_init();
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nrf_clock_lf_src_set(NRF_CLOCK, clock_initial_lfclksrc_get());
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#if NRF_CLOCK_HAS_HFCLKSRC
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nrf_clock_hf_src_set(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY);
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#endif
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#if NRF_CLOCK_HAS_HFCLK192M
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nrf_clock_hfclk192m_src_set(NRF_CLOCK, (nrf_clock_hfclk_t)NRFX_CLOCK_CONFIG_HFCLK192M_SRC);
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#endif
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#if NRFX_CHECK(NRFX_POWER_ENABLED)
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nrfx_clock_irq_enabled = true;
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#endif
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NRFX_LOG_INFO("Module enabled.");
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}
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void nrfx_clock_disable(void)
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{
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NRFX_ASSERT(m_clock_cb.module_initialized);
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#if NRFX_CHECK(NRFX_POWER_ENABLED)
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NRFX_ASSERT(nrfx_clock_irq_enabled);
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if (!nrfx_power_irq_enabled)
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#endif
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{
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NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_CLOCK));
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}
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nrf_clock_int_disable(NRF_CLOCK, CLOCK_INTENSET_HFCLKSTARTED_Msk |
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CLOCK_INTENSET_LFCLKSTARTED_Msk |
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#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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CLOCK_INTENSET_DONE_Msk |
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#if NRF_HAS_CALIBRATION_TIMER
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CLOCK_INTENSET_CTTO_Msk |
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#endif
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#endif // NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
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0);
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#if NRFX_CHECK(NRFX_POWER_ENABLED)
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nrfx_clock_irq_enabled = false;
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#endif
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NRFX_LOG_INFO("Module disabled.");
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}
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void nrfx_clock_uninit(void)
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{
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NRFX_ASSERT(m_clock_cb.module_initialized);
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clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
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clock_stop(NRF_CLOCK_DOMAIN_HFCLK);
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#if NRF_CLOCK_HAS_HFCLK192M
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clock_stop(NRF_CLOCK_DOMAIN_HFCLK192M);
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#endif
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#if NRF_CLOCK_HAS_HFCLKAUDIO
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clock_stop(NRF_CLOCK_DOMAIN_HFCLKAUDIO);
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#endif
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m_clock_cb.module_initialized = false;
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NRFX_LOG_INFO("Uninitialized.");
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}
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void nrfx_clock_start(nrf_clock_domain_t domain)
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{
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NRFX_ASSERT(m_clock_cb.module_initialized);
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switch (domain)
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{
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case NRF_CLOCK_DOMAIN_LFCLK:
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{
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nrf_clock_lfclk_t lfclksrc;
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if (nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc))
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{
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// LF clock is already running. Inspect its source.
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// If LF clock source is inappropriate then it will be stopped and modified.
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// Ignore return value as LF clock will be started again regardless of the result.
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(void)clock_lfclksrc_tweak(&lfclksrc);
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}
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else if (nrf_clock_start_task_check(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK))
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{
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// LF clock is not active yet but was started already. Inspect its source.
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lfclksrc = nrf_clock_lf_srccopy_get(NRF_CLOCK);
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if (clock_lfclksrc_tweak(&lfclksrc))
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{
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// LF clock was started already and the configured source
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// corresponds to the user configuration.
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// No action is needed as the chosen LF clock source will become active soon.
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nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
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break;
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}
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// Otherwise LF clock was started already but with inappropriate source.
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// LF clock was stopped and modified. Now it will be restarted.
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}
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else
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{
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// LF clock not active and not started.
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lfclksrc = clock_initial_lfclksrc_get();
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}
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nrf_clock_lf_src_set(NRF_CLOCK, lfclksrc);
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}
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED);
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nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
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#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
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nrfx_clock_anomaly_132();
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#endif
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART);
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break;
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case NRF_CLOCK_DOMAIN_HFCLK:
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
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nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTART);
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break;
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#if NRF_CLOCK_HAS_HFCLK192M
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case NRF_CLOCK_DOMAIN_HFCLK192M:
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED);
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nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLK192MSTART);
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break;
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#endif
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#if NRF_CLOCK_HAS_HFCLKAUDIO
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case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
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nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED);
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nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HFAUDIO_STARTED_MASK);
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nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKAUDIOSTART);
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break;
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#endif
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default:
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NRFX_ASSERT(0);
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break;
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}
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}
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void nrfx_clock_stop(nrf_clock_domain_t domain)
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{
|
|
NRFX_ASSERT(m_clock_cb.module_initialized);
|
|
clock_stop(domain);
|
|
}
|
|
|
|
nrfx_err_t nrfx_clock_calibration_start(void)
|
|
{
|
|
nrfx_err_t err_code = NRFX_SUCCESS;
|
|
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
|
|
nrf_clock_hfclk_t clk_src;
|
|
if (!nrfx_clock_is_running(NRF_CLOCK_DOMAIN_HFCLK, &clk_src))
|
|
{
|
|
return NRFX_ERROR_INVALID_STATE;
|
|
}
|
|
|
|
if (clk_src != NRF_CLOCK_HFCLK_HIGH_ACCURACY)
|
|
{
|
|
return NRFX_ERROR_INVALID_STATE;
|
|
}
|
|
|
|
if (!nrfx_clock_is_running(NRF_CLOCK_DOMAIN_LFCLK, NULL))
|
|
{
|
|
return NRFX_ERROR_INVALID_STATE;
|
|
}
|
|
|
|
if (m_clock_cb.cal_state == CAL_STATE_IDLE)
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE);
|
|
nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK);
|
|
m_clock_cb.cal_state = CAL_STATE_CAL;
|
|
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
|
|
*(volatile uint32_t *)0x40000C34 = 0x00000002;
|
|
#endif
|
|
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CAL);
|
|
}
|
|
else
|
|
{
|
|
err_code = NRFX_ERROR_BUSY;
|
|
}
|
|
#endif // NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
|
|
|
|
NRFX_LOG_WARNING("Function: %s, error code: %s.",
|
|
__func__,
|
|
NRFX_LOG_ERROR_STRING_GET(err_code));
|
|
return err_code;
|
|
}
|
|
|
|
nrfx_err_t nrfx_clock_is_calibrating(void)
|
|
{
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
|
|
if (m_clock_cb.cal_state == CAL_STATE_CAL)
|
|
{
|
|
return NRFX_ERROR_BUSY;
|
|
}
|
|
#endif
|
|
return NRFX_SUCCESS;
|
|
}
|
|
|
|
void nrfx_clock_calibration_timer_start(uint8_t interval)
|
|
{
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) && \
|
|
NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && NRF_CLOCK_HAS_CALIBRATION_TIMER
|
|
nrf_clock_cal_timer_timeout_set(NRF_CLOCK, interval);
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
|
|
nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
|
|
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTART);
|
|
#else
|
|
(void)interval;
|
|
#endif
|
|
}
|
|
|
|
void nrfx_clock_calibration_timer_stop(void)
|
|
{
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) && \
|
|
NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && NRF_CLOCK_HAS_CALIBRATION_TIMER
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
|
|
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTOP);
|
|
#endif
|
|
}
|
|
|
|
#if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT) || NRF_CLOCK_HAS_HFCLK192M
|
|
nrfx_err_t nrfx_clock_divider_set(nrf_clock_domain_t domain,
|
|
nrf_clock_hfclk_div_t div)
|
|
{
|
|
switch(domain)
|
|
{
|
|
#if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT)
|
|
case NRF_CLOCK_DOMAIN_HFCLK:
|
|
switch (div)
|
|
{
|
|
case NRF_CLOCK_HFCLK_DIV_2:
|
|
#if !defined(NRF_TRUSTZONE_NONSECURE)
|
|
if (nrf53_errata_4())
|
|
{
|
|
NRFX_CRITICAL_SECTION_ENTER();
|
|
__DSB();
|
|
|
|
nrf_clock_hfclk_div_set(NRF_CLOCK, div);
|
|
|
|
*(volatile uint32_t *)0x5084450C = 0x0;
|
|
*(volatile uint32_t *)0x50026548 = 0x0;
|
|
*(volatile uint32_t *)0x50081EE4 = 0x0D;
|
|
|
|
NRFX_CRITICAL_SECTION_EXIT();
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
nrf_clock_hfclk_div_set(NRF_CLOCK, div);
|
|
}
|
|
break;
|
|
case NRF_CLOCK_HFCLK_DIV_1:
|
|
#if !defined(NRF_TRUSTZONE_NONSECURE)
|
|
if (nrf53_errata_4())
|
|
{
|
|
NRFX_CRITICAL_SECTION_ENTER();
|
|
__DSB();
|
|
|
|
*(volatile uint32_t *)0x5084450C = 0x4040;
|
|
*(volatile uint32_t *)0x50026548 = 0x40;
|
|
*(volatile uint32_t *)0x50081EE4 = 0x4D;
|
|
|
|
nrf_clock_hfclk_div_set(NRF_CLOCK, div);
|
|
|
|
NRFX_CRITICAL_SECTION_EXIT();
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
nrf_clock_hfclk_div_set(NRF_CLOCK, div);
|
|
}
|
|
break;
|
|
default:
|
|
return NRFX_ERROR_INVALID_PARAM;
|
|
}
|
|
SystemCoreClockUpdate();
|
|
return NRFX_SUCCESS;
|
|
#endif
|
|
#if NRF_CLOCK_HAS_HFCLK192M
|
|
case NRF_CLOCK_DOMAIN_HFCLK192M:
|
|
if (div > NRF_CLOCK_HFCLK_DIV_4)
|
|
{
|
|
return NRFX_ERROR_INVALID_PARAM;
|
|
}
|
|
else
|
|
{
|
|
nrf_clock_hfclk192m_div_set(NRF_CLOCK, div);
|
|
}
|
|
return NRFX_SUCCESS;
|
|
#endif
|
|
default:
|
|
NRFX_ASSERT(0);
|
|
return NRFX_ERROR_NOT_SUPPORTED;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void nrfx_clock_irq_handler(void)
|
|
{
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED))
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_HFCLKSTARTED");
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);
|
|
|
|
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
|
|
if (!m_clock_cb.hfclk_started)
|
|
{
|
|
m_clock_cb.hfclk_started = true;
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
|
|
}
|
|
#else
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
|
|
#endif
|
|
}
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED))
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_LFCLKSTARTED");
|
|
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
|
|
nrf_clock_lfclk_t lfclksrc;
|
|
(void)nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc);
|
|
if (lfclksrc == NRF_CLOCK_LFCLK_RC)
|
|
{
|
|
// After the LFRC oscillator start switch to external source.
|
|
nrf_clock_lf_src_set(NRF_CLOCK, (nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC);
|
|
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART);
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
// After the LF clock external source start invoke user callback.
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
|
|
}
|
|
}
|
|
|
|
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
|
|
#if NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED)
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO) &&
|
|
nrf_clock_int_enable_check(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK))
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_CTTO");
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
|
|
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_CTTO);
|
|
}
|
|
#endif // NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED)
|
|
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_DONE) &&
|
|
nrf_clock_int_enable_check(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK))
|
|
{
|
|
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
|
|
*(volatile uint32_t *)0x40000C34 = 0x00000000;
|
|
#endif
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_DONE");
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK);
|
|
m_clock_cb.cal_state = CAL_STATE_IDLE;
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_CAL_DONE);
|
|
}
|
|
#endif // NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
|
|
|
|
#if NRF_CLOCK_HAS_HFCLKAUDIO
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED))
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED");
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HFAUDIO_STARTED_MASK);
|
|
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLKAUDIO_STARTED);
|
|
}
|
|
#endif
|
|
|
|
#if NRF_CLOCK_HAS_HFCLK192M
|
|
if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED))
|
|
{
|
|
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED);
|
|
NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_HFCLK192MSTARTED");
|
|
nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);
|
|
|
|
m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK192M_STARTED);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#endif // NRFX_CHECK(NRFX_CLOCK_ENABLED)
|