283 lines
13 KiB
C
283 lines
13 KiB
C
/*
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* Copyright (c) 2015 - 2022, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef NRFX_SPIS_H__
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#define NRFX_SPIS_H__
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#include <nrfx.h>
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#include <hal/nrf_spis.h>
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#include <hal/nrf_gpio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @defgroup nrfx_spis SPIS driver
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* @{
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* @ingroup nrf_spis
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* @brief Serial Peripheral Interface Slave with EasyDMA (SPIS) driver.
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*/
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/** @brief Data structure for the Serial Peripheral Interface Slave with EasyDMA (SPIS) driver instance. */
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typedef struct
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{
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NRF_SPIS_Type * p_reg; //!< Pointer to a structure with SPIS registers.
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uint8_t drv_inst_idx; //!< Index of the driver instance. For internal use only.
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} nrfx_spis_t;
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#ifndef __NRFX_DOXYGEN__
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enum {
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#if NRFX_CHECK(NRFX_SPIS0_ENABLED)
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NRFX_SPIS0_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIS1_ENABLED)
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NRFX_SPIS1_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIS2_ENABLED)
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NRFX_SPIS2_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIS3_ENABLED)
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NRFX_SPIS3_INST_IDX,
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#endif
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NRFX_SPIS_ENABLED_COUNT
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};
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#endif
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/** @brief Macro for creating an instance of the SPI slave driver. */
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#define NRFX_SPIS_INSTANCE(id) \
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{ \
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.p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
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.drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \
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}
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/**
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* @brief This value can be provided instead of a pin number for the signals MOSI
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* and MISO to specify that the given signal is not used and therefore
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* does not need to be connected to a pin.
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*/
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#define NRFX_SPIS_PIN_NOT_USED 0xFF
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/** @brief SPI slave driver event types. */
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typedef enum
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{
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NRFX_SPIS_BUFFERS_SET_DONE, //!< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transaction can be done.
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NRFX_SPIS_XFER_DONE, //!< SPI transaction event. SPI transaction has been completed.
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NRFX_SPIS_EVT_TYPE_MAX //!< Enumeration upper bound.
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} nrfx_spis_evt_type_t;
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/** @brief SPI slave driver event structure. */
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typedef struct
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{
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nrfx_spis_evt_type_t evt_type; //!< Type of the event.
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size_t rx_amount; //!< Number of bytes received in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
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size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
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} nrfx_spis_evt_t;
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/**
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* @brief SPIS driver default configuration.
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*
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* This configuration sets up SPIS with the following options:
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* - mode: 0 (SCK active high, sample on leading edge of the clock signal)
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* - MSB shifted out first
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* - CSN pull-up disabled
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* - MISO pin drive set to standard '0' and standard '1'
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* - default character set to 0xFF
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* - over-read character set to 0xFE
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*
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* @param[in] _pin_sck SCK pin.
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* @param[in] _pin_mosi MOSI pin.
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* @param[in] _pin_miso MISO pin.
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* @param[in] _pin_csn CSN pin.
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*/
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#define NRFX_SPIS_DEFAULT_CONFIG(_pin_sck, _pin_mosi, _pin_miso, _pin_csn) \
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{ \
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.miso_pin = _pin_miso, \
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.mosi_pin = _pin_mosi, \
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.sck_pin = _pin_sck, \
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.csn_pin = _pin_csn, \
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.mode = NRF_SPIS_MODE_0, \
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.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
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.csn_pullup = NRF_GPIO_PIN_NOPULL, \
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.miso_drive = NRF_GPIO_PIN_S0S1, \
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.def = 0xFF, \
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.orc = 0xFE, \
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.irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \
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}
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/** @brief SPI peripheral device configuration data. */
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typedef struct
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{
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uint32_t miso_pin; ///< SPI MISO pin (optional).
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/**< Set @ref NRFX_SPIS_PIN_NOT_USED
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* if this signal is not needed. */
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uint32_t mosi_pin; ///< SPI MOSI pin (optional).
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/**< Set @ref NRFX_SPIS_PIN_NOT_USED
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* if this signal is not needed. */
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uint32_t sck_pin; ///< SPI SCK pin.
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uint32_t csn_pin; ///< SPI CSN pin.
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nrf_spis_mode_t mode; ///< SPI mode.
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nrf_spis_bit_order_t bit_order; ///< SPI transaction bit order.
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nrf_gpio_pin_pull_t csn_pullup; ///< CSN pin pull-up configuration.
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nrf_gpio_pin_drive_t miso_drive; ///< MISO pin drive configuration.
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uint8_t def; ///< Character clocked out in case of an ignored transaction.
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uint8_t orc; ///< Character clocked out after an over-read of the transmit buffer.
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uint8_t irq_priority; ///< Interrupt priority.
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bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
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/**< When set to true, the driver does not modify
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* any GPIO parameters of the used pins. Those
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* parameters are supposed to be configured
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* externally before the driver is initialized. */
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bool skip_psel_cfg; ///< Skip pin selection configuration.
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/**< When set to true, the driver does not modify
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* pin select registers in the peripheral.
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* Those registers are supposed to be set up
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* externally before the driver is initialized.
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* @note When both GPIO configuration and pin
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* selection are to be skipped, the structure
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* fields that specify pins can be omitted,
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* as they are ignored anyway. */
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} nrfx_spis_config_t;
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/**
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* @brief SPI slave driver event handler type.
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*
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* @param[in] p_event Pointer to the event structure. The structure is
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* allocated on the stack so it is valid only until
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* the event handler returns.
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* @param[in] p_context Context set on initialization.
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*/
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typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event,
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void * p_context);
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/**
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* @brief Function for initializing the SPI slave driver instance.
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*
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* @note When the nRF52 Anomaly 109 workaround for SPIS is enabled, this function
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* initializes the GPIOTE driver as well, and uses one of GPIOTE channels
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* to detect falling edges on CSN pin.
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*
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* @param[in] p_instance Pointer to the driver instance structure.
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* @param[in] p_config Pointer to the structure with the initial configuration.
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* @param[in] event_handler Function to be called by the SPI slave driver upon event.
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* Must not be NULL.
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* @param[in] p_context Context passed to the event handler.
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*
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* @retval NRFX_SUCCESS The initialization was successful.
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* @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
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* @retval NRFX_ERROR_INVALID_PARAM Invalid parameter is supplied.
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* @retval NRFX_ERROR_BUSY Some other peripheral with the same
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* instance ID is already in use. This is
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* possible only if @ref nrfx_prs module
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* is enabled.
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* @retval NRFX_ERROR_INTERNAL GPIOTE channel for detecting falling edges
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* on CSN pin cannot be initialized. Possible
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* only when using nRF52 Anomaly 109 workaround.
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*/
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nrfx_err_t nrfx_spis_init(nrfx_spis_t const * p_instance,
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nrfx_spis_config_t const * p_config,
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nrfx_spis_event_handler_t event_handler,
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void * p_context);
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/**
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* @brief Function for uninitializing the SPI slave driver instance.
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*
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* @param[in] p_instance Pointer to the driver instance structure.
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*/
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void nrfx_spis_uninit(nrfx_spis_t const * p_instance);
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/**
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* @brief Function for preparing the SPI slave instance for a single SPI transaction.
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*
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* This function prepares the SPI slave device to be ready for a single SPI transaction. It configures
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* the SPI slave device to use the memory supplied with the function call in SPI transactions.
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*
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* When either the memory buffer configuration or the SPI transaction has been
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* completed, the event callback function will be called with the appropriate event
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* @ref nrfx_spis_evt_type_t. The callback function can be called before returning from
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* this function, because it is called from the SPI slave interrupt context.
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*
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* @note This function can be called from the callback function context.
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*
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* @note Client applications must call this function after every @ref NRFX_SPIS_XFER_DONE event if
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* the SPI slave driver must be prepared for a possible new SPI transaction.
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*
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* @note Peripherals using EasyDMA (including SPIS) require the transfer buffers
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* to be placed in the Data RAM region. If this condition is not met,
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* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
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*
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* @param[in] p_instance Pointer to the driver instance structure.
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* @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
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* @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
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* @param[in] tx_buffer_length Length of the TX buffer in bytes.
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* @param[in] rx_buffer_length Length of the RX buffer in bytes.
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*
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* @retval NRFX_SUCCESS The operation was successful.
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* @retval NRFX_ERROR_INVALID_STATE The operation failed because the SPI slave device is in an incorrect state.
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* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
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* RAM region.
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* @retval NRFX_ERROR_INVALID_LENGTH Provided lengths exceed the EasyDMA limits for the peripheral.
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* @retval NRFX_ERROR_INTERNAL The operation failed because of an internal error.
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*/
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nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * p_instance,
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uint8_t const * p_tx_buffer,
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size_t tx_buffer_length,
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uint8_t * p_rx_buffer,
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size_t rx_buffer_length);
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/**
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* @brief Macro returning SPIS interrupt handler.
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*
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* param[in] idx SPIS index.
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*
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* @return Interrupt handler.
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*/
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#define NRFX_SPIS_INST_HANDLER_GET(idx) NRFX_CONCAT_3(nrfx_spis_, idx, _irq_handler)
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/** @} */
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void nrfx_spis_0_irq_handler(void);
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void nrfx_spis_1_irq_handler(void);
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void nrfx_spis_2_irq_handler(void);
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void nrfx_spis_3_irq_handler(void);
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#ifdef __cplusplus
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}
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#endif
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#endif // NRFX_SPIS_H__
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