206 lines
7.8 KiB
C
206 lines
7.8 KiB
C
/* Timer group-hardware timer example
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdio.h>
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#include "esp_types.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "soc/timer_group_struct.h"
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#include "driver/periph_ctrl.h"
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#include "driver/timer.h"
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#define TIMER_INTR_SEL TIMER_INTR_LEVEL /*!< Timer level interrupt */
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#define TIMER_GROUP TIMER_GROUP_0 /*!< Test on timer group 0 */
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#define TIMER_DIVIDER 16 /*!< Hardware timer clock divider */
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#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
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#define TIMER_FINE_ADJ (1.4*(TIMER_BASE_CLK / TIMER_DIVIDER)/1000000) /*!< used to compensate alarm value */
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#define TIMER_INTERVAL0_SEC (3.4179) /*!< test interval for timer 0 */
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#define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
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#define TEST_WITHOUT_RELOAD 0 /*!< example of auto-reload mode */
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#define TEST_WITH_RELOAD 1 /*!< example without auto-reload mode */
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typedef struct {
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int type; /*!< event type */
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int group; /*!< timer group */
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int idx; /*!< timer number */
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uint64_t counter_val; /*!< timer counter value */
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double time_sec; /*!< calculated time from counter value */
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} timer_event_t;
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xQueueHandle timer_queue;
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/*
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* @brief Print a uint64_t value
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*/
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static void inline print_u64(uint64_t val)
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{
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printf("0x%08x%08x\n", (uint32_t) (val >> 32), (uint32_t) (val));
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}
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static void timer_example_evt_task(void *arg)
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{
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while(1) {
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timer_event_t evt;
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xQueueReceive(timer_queue, &evt, portMAX_DELAY);
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if(evt.type == TEST_WITHOUT_RELOAD) {
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printf("\n\n example of count-up-timer \n");
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} else if(evt.type == TEST_WITH_RELOAD) {
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printf("\n\n example of reload-timer \n");
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}
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/*Show timer event from interrupt*/
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printf("-------INTR TIME EVT--------\n");
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printf("TG[%d] timer[%d] alarm evt\n", evt.group, evt.idx);
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printf("reg: ");
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print_u64(evt.counter_val);
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printf("time: %.8f S\n", evt.time_sec);
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/*Read timer value from task*/
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printf("======TASK TIME======\n");
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uint64_t timer_val;
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timer_get_counter_value(evt.group, evt.idx, &timer_val);
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double time;
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timer_get_counter_time_sec(evt.group, evt.idx, &time);
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printf("TG[%d] timer[%d] alarm evt\n", evt.group, evt.idx);
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printf("reg: ");
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print_u64(timer_val);
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printf("time: %.8f S\n", time);
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}
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}
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/*
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* @brief timer group0 ISR handler
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*/
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void IRAM_ATTR timer_group0_isr(void *para)
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{
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int timer_idx = (int) para;
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uint32_t intr_status = TIMERG0.int_st_timers.val;
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timer_event_t evt;
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if((intr_status & BIT(timer_idx)) && timer_idx == TIMER_0) {
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/*Timer0 is an example that doesn't reload counter value*/
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TIMERG0.hw_timer[timer_idx].update = 1;
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/* We don't call a API here because they are not declared with IRAM_ATTR.
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If we're okay with the timer irq not being serviced while SPI flash cache is disabled,
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we can alloc this interrupt without the ESP_INTR_FLAG_IRAM flag and use the normal API. */
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TIMERG0.int_clr_timers.t0 = 1;
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uint64_t timer_val = ((uint64_t) TIMERG0.hw_timer[timer_idx].cnt_high) << 32
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| TIMERG0.hw_timer[timer_idx].cnt_low;
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double time = (double) timer_val / (TIMER_BASE_CLK / TIMERG0.hw_timer[timer_idx].config.divider);
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/*Post an event to out example task*/
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evt.type = TEST_WITHOUT_RELOAD;
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evt.group = 0;
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evt.idx = timer_idx;
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evt.counter_val = timer_val;
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evt.time_sec = time;
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xQueueSendFromISR(timer_queue, &evt, NULL);
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/*For a timer that will not reload, we need to set the next alarm value each time. */
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timer_val +=
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(uint64_t) (TIMER_INTERVAL0_SEC * (TIMER_BASE_CLK / TIMERG0.hw_timer[timer_idx].config.divider));
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/*Fine adjust*/
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timer_val -= TIMER_FINE_ADJ;
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TIMERG0.hw_timer[timer_idx].alarm_high = (uint32_t) (timer_val >> 32);
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TIMERG0.hw_timer[timer_idx].alarm_low = (uint32_t) timer_val;
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/*After set alarm, we set alarm_en bit if we want to enable alarm again.*/
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TIMERG0.hw_timer[timer_idx].config.alarm_en = 1;
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} else if((intr_status & BIT(timer_idx)) && timer_idx == TIMER_1) {
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/*Timer1 is an example that will reload counter value*/
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TIMERG0.hw_timer[timer_idx].update = 1;
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/*We don't call a API here because they are not declared with IRAM_ATTR*/
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TIMERG0.int_clr_timers.t1 = 1;
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uint64_t timer_val = ((uint64_t) TIMERG0.hw_timer[timer_idx].cnt_high) << 32
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| TIMERG0.hw_timer[timer_idx].cnt_low;
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double time = (double) timer_val / (TIMER_BASE_CLK / TIMERG0.hw_timer[timer_idx].config.divider);
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/*Post an event to out example task*/
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evt.type = TEST_WITH_RELOAD;
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evt.group = 0;
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evt.idx = timer_idx;
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evt.counter_val = timer_val;
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evt.time_sec = time;
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xQueueSendFromISR(timer_queue, &evt, NULL);
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/*For a auto-reload timer, we still need to set alarm_en bit if we want to enable alarm again.*/
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TIMERG0.hw_timer[timer_idx].config.alarm_en = 1;
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}
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}
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/*
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* @brief timer group0 hardware timer0 init
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*/
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static void example_tg0_timer0_init()
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{
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int timer_group = TIMER_GROUP_0;
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int timer_idx = TIMER_0;
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timer_config_t config;
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config.alarm_en = 1;
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config.auto_reload = 0;
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config.counter_dir = TIMER_COUNT_UP;
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config.divider = TIMER_DIVIDER;
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config.intr_type = TIMER_INTR_SEL;
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config.counter_en = TIMER_PAUSE;
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/*Configure timer*/
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timer_init(timer_group, timer_idx, &config);
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/*Stop timer counter*/
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timer_pause(timer_group, timer_idx);
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/*Load counter value */
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timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
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/*Set alarm value*/
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timer_set_alarm_value(timer_group, timer_idx, TIMER_INTERVAL0_SEC * TIMER_SCALE - TIMER_FINE_ADJ);
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/*Enable timer interrupt*/
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timer_enable_intr(timer_group, timer_idx);
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/*Set ISR handler*/
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timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM, NULL);
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/*Start timer counter*/
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timer_start(timer_group, timer_idx);
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}
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/*
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* @brief timer group0 hardware timer1 init
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*/
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static void example_tg0_timer1_init()
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{
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int timer_group = TIMER_GROUP_0;
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int timer_idx = TIMER_1;
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timer_config_t config;
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config.alarm_en = 1;
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config.auto_reload = 1;
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config.counter_dir = TIMER_COUNT_UP;
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config.divider = TIMER_DIVIDER;
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config.intr_type = TIMER_INTR_SEL;
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config.counter_en = TIMER_PAUSE;
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/*Configure timer*/
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timer_init(timer_group, timer_idx, &config);
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/*Stop timer counter*/
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timer_pause(timer_group, timer_idx);
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/*Load counter value */
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timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
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/*Set alarm value*/
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timer_set_alarm_value(timer_group, timer_idx, TIMER_INTERVAL1_SEC * TIMER_SCALE);
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/*Enable timer interrupt*/
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timer_enable_intr(timer_group, timer_idx);
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/*Set ISR handler*/
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timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM, NULL);
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/*Start timer counter*/
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timer_start(timer_group, timer_idx);
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}
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/**
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* @brief In this test, we will test hardware timer0 and timer1 of timer group0.
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*/
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void app_main()
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{
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timer_queue = xQueueCreate(10, sizeof(timer_event_t));
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example_tg0_timer0_init();
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example_tg0_timer1_init();
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xTaskCreate(timer_example_evt_task, "timer_evt_task", 2048, NULL, 5, NULL);
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}
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