opensourcemirror
/
opnsense-src
mirror of https://github.com/opnsense/src.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Revert "e1000: Rework em_msi_link interrupt filter" 

This reverts commit 748db414cd.
Suspect in igb behavioural regressin in 21.7
This commit is contained in:
Franco Fichtner 2021-07-30 09:09:09 +02:00
parent 17a61782d3
commit 79ea2ec061
2 changed files with 19 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

41
sys/dev/e1000/if_em.c
View File

@ -1507,7 +1507,6 @@ em_msix_link(void *arg)
{
struct adapter *adapter = arg;
u32 reg_icr;
bool notlink = false;
++adapter->link_irq;
MPASS(adapter->hw.back != NULL);
@ -1516,19 +1515,15 @@ em_msix_link(void *arg)
if (reg_icr & E1000_ICR_RXO)
adapter->rx_overruns++;
if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))
if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
em_handle_link(adapter->ctx);
else
notlink = true;
/* Re-arm for other/spurious interrupts */
if (notlink && adapter->hw.mac.type >= igb_mac_min) {
E1000_WRITE_REG(&adapter->hw, E1000_IMS, E1000_IMS_LSC);
E1000_WRITE_REG(&adapter->hw, E1000_EIMS, adapter->link_mask);
} else if (adapter->hw.mac.type == e1000_82574) {
if (notlink)
E1000_WRITE_REG(&adapter->hw, E1000_IMS, E1000_IMS_LSC |
E1000_IMS_OTHER);
/* Only re-arm 82574 if em_if_update_admin_status() won't. */
E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_LINK |
E1000_IMS_LSC);
}
if (adapter->hw.mac.type == e1000_82574) {
/*
* Because we must read the ICR for this interrupt it may
* clear other causes using autoclear, for this reason we
@ -1536,6 +1531,10 @@ em_msix_link(void *arg)
*/
if (reg_icr)
E1000_WRITE_REG(&adapter->hw, E1000_ICS, adapter->ims);
} else {
/* Re-arm unconditionally */
E1000_WRITE_REG(&adapter->hw, E1000_IMS, E1000_IMS_LSC);
E1000_WRITE_REG(&adapter->hw, E1000_EIMS, adapter->link_mask);
}
return (FILTER_HANDLED);
@ -1867,13 +1866,10 @@ em_if_update_admin_status(if_ctx_t ctx)
if (hw->mac.type < em_mac_min)
lem_smartspeed(adapter);
else if (hw->mac.type >= igb_mac_min &&
adapter->intr_type == IFLIB_INTR_MSIX) {
E1000_WRITE_REG(&adapter->hw, E1000_IMS, E1000_IMS_LSC);
E1000_WRITE_REG(&adapter->hw, E1000_EIMS, adapter->link_mask);
} else if (hw->mac.type == e1000_82574 &&
else if (hw->mac.type == e1000_82574 &&
adapter->intr_type == IFLIB_INTR_MSIX)
E1000_WRITE_REG(hw, E1000_IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_LINK |
E1000_IMS_LSC);
}
static void
@ -2085,10 +2081,7 @@ em_if_msix_intr_assign(if_ctx_t ctx, int msix)
if (adapter->hw.mac.type < igb_mac_min) {
adapter->ivars |= (8 | rx_vectors) << 16;
adapter->ivars |= 0x80000000;
/* Enable the "Other" interrupt type for link status change */
adapter->ims |= E1000_IMS_OTHER;
}
return (0);
fail:
iflib_irq_free(ctx, &adapter->irq);
@ -3477,8 +3470,8 @@ em_if_intr_enable(if_ctx_t ctx)
struct e1000_hw *hw = &adapter->hw;
u32 ims_mask = IMS_ENABLE_MASK;
if (adapter->intr_type == IFLIB_INTR_MSIX) {
E1000_WRITE_REG(hw, EM_EIAC, adapter->ims);
if (hw->mac.type == e1000_82574) {
E1000_WRITE_REG(hw, EM_EIAC, EM_MSIX_MASK);
ims_mask |= adapter->ims;
}
E1000_WRITE_REG(hw, E1000_IMS, ims_mask);
@ -3490,7 +3483,7 @@ em_if_intr_disable(if_ctx_t ctx)
struct adapter *adapter = iflib_get_softc(ctx);
struct e1000_hw *hw = &adapter->hw;
if (adapter->intr_type == IFLIB_INTR_MSIX)
if (hw->mac.type == e1000_82574)
E1000_WRITE_REG(hw, EM_EIAC, 0);
E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
}

2
sys/dev/e1000/if_em.h
View File

@ -337,6 +337,8 @@
#define EM_VFTA_SIZE 128
#define EM_TSO_SIZE 65535
#define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */
#define EM_MSIX_MASK 0x01F00000 /* For 82574 use */
#define EM_MSIX_LINK 0x01000000 /* For 82574 use */
#define ETH_ZLEN 60
#define ETH_ADDR_LEN 6
#define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */