992 lines
26 KiB
C
992 lines
26 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include <ctype.h>
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#include <dirent.h>
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#include <errno.h>
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#include <fcntl.h>
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#if !defined(__FreeBSD__)
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#include <linux/nvram.h>
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#include <linux/version.h>
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#endif
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#include <stddef.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <sys/utsname.h>
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#include <unistd.h>
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#include "crossystem_arch.h"
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#include "crossystem.h"
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#include "crossystem_vbnv.h"
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#include "host_common.h"
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#include "vboot_struct.h"
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/* ACPI constants from Chrome OS Main Processor Firmware Spec */
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/* Boot reasons from BINF.0, from early H2C firmware */
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/* Unknown */
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#define BINF0_UNKNOWN 0
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/* Normal boot to Chrome OS */
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#define BINF0_NORMAL 1
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/* Developer mode boot (developer mode warning displayed) */
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#define BINF0_DEVELOPER 2
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/* Recovery initiated by user, using recovery button */
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#define BINF0_RECOVERY_BUTTON 3
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/* Recovery initiated by user pressing a key at developer mode warning
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* screen */
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#define BINF0_RECOVERY_DEV_SCREEN_KEY 4
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/* Recovery caused by BIOS failed signature check (neither rewritable
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* firmware was valid) */
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#define BINF0_RECOVERY_RW_FW_BAD 5
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/* Recovery caused by no OS kernel detected */
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#define BINF0_RECOVERY_NO_OS 6
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/* Recovery caused by OS kernel failed signature check */
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#define BINF0_RECOVERY_BAD_OS 7
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/* Recovery initiated by OS */
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#define BINF0_RECOVERY_OS_INITIATED 8
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/* OS-initiated S3 diagnostic path (debug mode boot) */
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#define BINF0_S3_DIAGNOSTIC_PATH 9
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/* S3 resume failed */
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#define BINF0_S3_RESUME_FAILED 10
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/* Recovery caused by TPM error */
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#define BINF0_RECOVERY_TPM_ERROR 11
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/* CHSW bitflags */
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#define CHSW_RECOVERY_BOOT 0x00000002
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#define CHSW_RECOVERY_EC_BOOT 0x00000004
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#define CHSW_DEV_BOOT 0x00000020
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/* CMOS reboot field bitflags */
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#define CMOSRF_RECOVERY 0x80
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#define CMOSRF_DEBUG_RESET 0x40
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#define CMOSRF_TRY_B 0x20
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/* GPIO signal types */
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#define GPIO_SIGNAL_TYPE_RECOVERY 1
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#define GPIO_SIGNAL_TYPE_DEPRECATED_DEV 2 /* Deprecated; see chromium:942901 */
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#define GPIO_SIGNAL_TYPE_WP 3
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#define GPIO_SIGNAL_TYPE_PHASE_ENFORCEMENT 4
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/* Base name for ACPI files */
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#define ACPI_BASE_PATH "/sys/devices/platform/chromeos_acpi"
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/* Paths for frequently used ACPI files */
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#define ACPI_BINF_PATH ACPI_BASE_PATH "/BINF"
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#define ACPI_CHNV_PATH ACPI_BASE_PATH "/CHNV"
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#define ACPI_CHSW_PATH ACPI_BASE_PATH "/CHSW"
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#define ACPI_GPIO_PATH ACPI_BASE_PATH "/GPIO"
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#define ACPI_VBNV_PATH ACPI_BASE_PATH "/VBNV"
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#define ACPI_VDAT_PATH ACPI_BASE_PATH "/VDAT"
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/* Base name for GPIO files */
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#define GPIO_BASE_PATH "/sys/class/gpio"
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#define GPIO_EXPORT_PATH GPIO_BASE_PATH "/export"
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/* Filename for NVRAM file */
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#define NVRAM_PATH "/dev/nvram"
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/* Filename for legacy firmware update tries */
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#define NEED_FWUPDATE_PATH "/mnt/stateful_partition/.need_firmware_update"
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/* Filenames for PCI Vendor and Device IDs */
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#define PCI_VENDOR_ID_PATH "/sys/bus/pci/devices/0000:00:00.0/vendor"
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#define PCI_DEVICE_ID_PATH "/sys/bus/pci/devices/0000:00:00.0/device"
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typedef struct {
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unsigned int base;
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unsigned int uid;
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} Basemapping;
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static void VbFixCmosChecksum(FILE* file)
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{
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#if !defined(__FreeBSD__)
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int fd = fileno(file);
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ioctl(fd, NVRAM_SETCKS);
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#endif
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}
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static int VbCmosRead(unsigned offs, size_t size, void *ptr)
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{
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size_t res;
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FILE* f;
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f = fopen(NVRAM_PATH, "rb");
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if (!f)
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return -1;
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if (0 != fseek(f, offs, SEEK_SET)) {
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fclose(f);
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return -1;
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}
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res = fread(ptr, size, 1, f);
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if (1 != res && errno == EIO && ferror(f)) {
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VbFixCmosChecksum(f);
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res = fread(ptr, size, 1, f);
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}
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fclose(f);
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return (1 == res) ? 0 : -1;
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}
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static int VbCmosWrite(unsigned offs, size_t size, const void *ptr)
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{
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size_t res;
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FILE* f;
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f = fopen(NVRAM_PATH, "w+b");
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if (!f)
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return -1;
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if (0 != fseek(f, offs, SEEK_SET)) {
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fclose(f);
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return -1;
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}
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res = fwrite(ptr, size, 1, f);
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if (1 != res && errno == EIO && ferror(f)) {
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VbFixCmosChecksum(f);
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res = fwrite(ptr, size, 1, f);
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}
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fclose(f);
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return (1 == res) ? 0 : -1;
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}
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int vb2_read_nv_storage(struct vb2_context *ctx)
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{
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unsigned offs, blksz;
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unsigned expectsz = vb2_nv_get_size(ctx);
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/* Get the byte offset from VBNV */
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if (ReadFileInt(ACPI_VBNV_PATH ".0", &offs) < 0)
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return -1;
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if (ReadFileInt(ACPI_VBNV_PATH ".1", &blksz) < 0)
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return -1;
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if (expectsz > blksz)
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return -1; /* NV storage block is too small */
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if (0 != VbCmosRead(offs, expectsz, ctx->nvdata))
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return -1;
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return 0;
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}
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int vb2_write_nv_storage(struct vb2_context *ctx)
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{
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unsigned offs, blksz;
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unsigned expectsz = vb2_nv_get_size(ctx);
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if (!(ctx->flags & VB2_CONTEXT_NVDATA_CHANGED))
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return 0; /* Nothing changed, so no need to write */
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/* Get the byte offset from VBNV */
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if (ReadFileInt(ACPI_VBNV_PATH ".0", &offs) < 0)
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return -1;
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if (ReadFileInt(ACPI_VBNV_PATH ".1", &blksz) < 0)
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return -1;
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if (expectsz > blksz)
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return -1; /* NV storage block is too small */
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if (0 != VbCmosWrite(offs, expectsz, ctx->nvdata))
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return -1;
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/* Also attempt to write using flashrom if using vboot2 */
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VbSharedDataHeader *sh = VbSharedDataRead();
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if (sh) {
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if (sh->flags & VBSD_BOOT_FIRMWARE_VBOOT2)
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vb2_write_nv_storage_flashrom(ctx);
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free(sh);
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}
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return 0;
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}
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/*
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* Get buffer data from ACPI.
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*
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* Buffer data is expected to be represented by a file which is a text dump of
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* the buffer, representing each byte by two hex numbers, space and newline
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* separated.
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*
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* On success, stores the amount of data read in bytes to *buffer_size; on
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* erros, sets *buffer_size=0.
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*
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* Input - ACPI file name to get data from.
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*
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* Output: a pointer to AcpiBuffer structure containing the binary
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* representation of the data. The caller is responsible for
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* deallocating the pointer, this will take care of both the structure
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* and the buffer. Null in case of error.
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*/
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static uint8_t* VbGetBuffer(const char* filename, int* buffer_size)
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{
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FILE* f = NULL;
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char* file_buffer = NULL;
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uint8_t* output_buffer = NULL;
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uint8_t* return_value = NULL;
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/* Assume error until proven otherwise */
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if (buffer_size)
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*buffer_size = 0;
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do {
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struct stat fs;
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uint8_t* output_ptr;
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int rv, i, real_size;
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int parsed_size = 0;
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int fd = open(filename, O_RDONLY);
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if (fd == -1)
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break;
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rv = fstat(fd, &fs);
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if (rv || !S_ISREG(fs.st_mode)) {
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close(fd);
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break;
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}
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f = fdopen(fd, "r");
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if (!f) {
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close(fd);
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break;
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}
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file_buffer = malloc(fs.st_size + 1);
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if (!file_buffer)
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break;
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real_size = fread(file_buffer, 1, fs.st_size, f);
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if (!real_size)
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break;
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file_buffer[real_size] = '\0';
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/* Each byte in the output will replace two characters and a
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* space in the input, so the output size does not exceed input
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* side/3 (a little less if account for newline characters). */
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output_buffer = malloc(real_size/3);
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if (!output_buffer)
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break;
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output_ptr = output_buffer;
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/* process the file contents */
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for (i = 0; i < real_size; i++) {
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char* base, *end;
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base = file_buffer + i;
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if (!isxdigit(*base))
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continue;
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output_ptr[parsed_size++] =
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strtol(base, &end, 16) & 0xff;
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if ((end - base) != 2)
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/* Input file format error */
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break;
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/* skip the second character and the following space */
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i += 2;
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}
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if (i == real_size) {
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/* all is well */
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return_value = output_buffer;
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output_buffer = NULL; /* prevent it from deallocating */
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if (buffer_size)
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*buffer_size = parsed_size;
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}
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} while(0);
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/* wrap up */
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if (f)
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fclose(f);
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if (file_buffer)
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free(file_buffer);
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if (output_buffer)
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free(output_buffer);
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return return_value;
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}
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VbSharedDataHeader* VbSharedDataRead(void)
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{
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VbSharedDataHeader* sh;
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int got_size = 0;
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int expect_size;
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sh = (VbSharedDataHeader*)VbGetBuffer(ACPI_VDAT_PATH, &got_size);
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if (!sh)
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return NULL;
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/* Make sure the size is sufficient for the struct version we got.
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* Check supported old versions first. */
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if (1 == sh->struct_version)
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expect_size = VB_SHARED_DATA_HEADER_SIZE_V1;
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else {
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/* There'd better be enough data for the current header size. */
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expect_size = sizeof(VbSharedDataHeader);
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}
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if (got_size < expect_size) {
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free(sh);
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return NULL;
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}
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if (sh->data_size > got_size)
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sh->data_size = got_size; /* Truncated read */
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return sh;
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}
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/* Read the CMOS reboot field in NVRAM.
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*
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* Returns 0 if the mask is clear in the field, 1 if set, or -1 if error. */
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static int VbGetCmosRebootField(uint8_t mask)
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{
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unsigned chnv;
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uint8_t nvbyte;
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/* Get the byte offset from CHNV */
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if (ReadFileInt(ACPI_CHNV_PATH, &chnv) < 0)
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return -1;
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if (0 != VbCmosRead(chnv, 1, &nvbyte))
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return -1;
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return (nvbyte & mask ? 1 : 0);
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}
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/* Write the CMOS reboot field in NVRAM.
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*
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* Sets (value=0) or clears (value!=0) the mask in the byte.
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*
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* Returns 0 if success, or -1 if error. */
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static int VbSetCmosRebootField(uint8_t mask, int value)
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{
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unsigned chnv;
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uint8_t nvbyte;
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/* Get the byte offset from CHNV */
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if (ReadFileInt(ACPI_CHNV_PATH, &chnv) < 0)
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return -1;
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if (0 != VbCmosRead(chnv, 1, &nvbyte))
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return -1;
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/* Set/clear the mask */
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if (value)
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nvbyte |= mask;
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else
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nvbyte &= ~mask;
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/* Write the byte back */
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if (0 != VbCmosWrite(chnv, 1, &nvbyte))
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return -1;
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/* Success */
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return 0;
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}
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/* Read the active main firmware type into the destination buffer.
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* Passed the destination and its size. Returns the destination, or
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* NULL if error. */
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static const char* VbReadMainFwType(char* dest, int size)
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{
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unsigned value;
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/* Try reading type from BINF.3 */
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if (ReadFileInt(ACPI_BINF_PATH ".3", &value) == 0) {
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switch(value) {
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case BINF3_LEGACY:
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return StrCopy(dest, "legacy", size);
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case BINF3_NETBOOT:
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return StrCopy(dest, "netboot", size);
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case BINF3_RECOVERY:
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return StrCopy(dest, "recovery", size);
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case BINF3_NORMAL:
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return StrCopy(dest, "normal", size);
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case BINF3_DEVELOPER:
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return StrCopy(dest, "developer", size);
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default:
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break; /* Fall through to legacy handling */
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}
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}
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/* Fall back to BINF.0 for legacy systems like Mario. */
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if (ReadFileInt(ACPI_BINF_PATH ".0", &value) < 0)
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/* Both BINF.0 and BINF.3 are missing, so this isn't Chrome OS
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* firmware. */
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return StrCopy(dest, "nonchrome", size);
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switch(value) {
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case BINF0_NORMAL:
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return StrCopy(dest, "normal", size);
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case BINF0_DEVELOPER:
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return StrCopy(dest, "developer", size);
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case BINF0_RECOVERY_BUTTON:
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case BINF0_RECOVERY_DEV_SCREEN_KEY:
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case BINF0_RECOVERY_RW_FW_BAD:
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case BINF0_RECOVERY_NO_OS:
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case BINF0_RECOVERY_BAD_OS:
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case BINF0_RECOVERY_OS_INITIATED:
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case BINF0_RECOVERY_TPM_ERROR:
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/* Assorted flavors of recovery boot reason. */
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return StrCopy(dest, "recovery", size);
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default:
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/* Other values don't map cleanly to firmware type. */
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return NULL;
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}
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}
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/* Read the recovery reason. Returns the reason code or -1 if error. */
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static vb2_error_t VbGetRecoveryReason(void)
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{
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unsigned value;
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/* Try reading type from BINF.4 */
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if (ReadFileInt(ACPI_BINF_PATH ".4", &value) == 0)
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return value;
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/* Fall back to BINF.0 for legacy systems like Mario. */
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if (ReadFileInt(ACPI_BINF_PATH ".0", &value) < 0)
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return -1;
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switch(value) {
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case BINF0_NORMAL:
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case BINF0_DEVELOPER:
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return VB2_RECOVERY_NOT_REQUESTED;
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case BINF0_RECOVERY_BUTTON:
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return VB2_RECOVERY_RO_MANUAL;
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case BINF0_RECOVERY_RW_FW_BAD:
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return VB2_RECOVERY_RO_INVALID_RW;
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case BINF0_RECOVERY_NO_OS:
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return VB2_RECOVERY_RW_NO_KERNEL;
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case BINF0_RECOVERY_BAD_OS:
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return VB2_RECOVERY_RW_INVALID_OS;
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case BINF0_RECOVERY_OS_INITIATED:
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return VB2_RECOVERY_LEGACY;
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default:
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/* Other values don't map cleanly to firmware type. */
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return -1;
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}
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}
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/* Physical GPIO number <N> may be accessed through /sys/class/gpio/gpio<M>/,
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* but <N> and <M> may differ by some offset <O>. To determine that constant,
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* we look for a directory named /sys/class/gpio/gpiochip<O>/. If there's not
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* exactly one match for that, we're SOL.
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*/
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static int FindGpioChipOffset(unsigned *gpio_num, unsigned *offset,
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const char *name)
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{
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DIR *dir;
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struct dirent *ent;
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int match = 0;
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dir = opendir(GPIO_BASE_PATH);
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if (!dir) {
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return 0;
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}
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while(0 != (ent = readdir(dir))) {
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if (1 == sscanf(ent->d_name, "gpiochip%u", offset)) {
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match++;
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}
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}
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closedir(dir);
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return (1 == match);
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}
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/* Physical GPIO number <N> may be accessed through /sys/class/gpio/gpio<M>/,
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* but <N> and <M> may differ by some offset <O>. To determine that constant,
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* we look for a directory named /sys/class/gpio/gpiochip<O>/ and check for
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* a 'label' file inside of it to find the expected the controller name.
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*/
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static int FindGpioChipOffsetByLabel(unsigned *gpio_num, unsigned *offset,
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const char *name)
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{
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DIR *dir;
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struct dirent *ent;
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char filename[128];
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char chiplabel[128];
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int match = 0;
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unsigned controller_offset = 0;
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|
|
|
dir = opendir(GPIO_BASE_PATH);
|
|
if (!dir) {
|
|
return 0;
|
|
}
|
|
|
|
while(0 != (ent = readdir(dir))) {
|
|
if (1 == sscanf(ent->d_name, "gpiochip%u",
|
|
&controller_offset)) {
|
|
/*
|
|
* Read the file at gpiochip<O>/label to get the
|
|
* identifier for this bank of GPIOs.
|
|
*/
|
|
snprintf(filename, sizeof(filename),
|
|
"%s/gpiochip%u/label",
|
|
GPIO_BASE_PATH, controller_offset);
|
|
if (ReadFileString(chiplabel, sizeof(chiplabel),
|
|
filename)) {
|
|
if (!strncasecmp(chiplabel, name,
|
|
strlen(name))) {
|
|
/*
|
|
* Store offset when chip label is
|
|
* matched.
|
|
*/
|
|
*offset = controller_offset;
|
|
match++;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
closedir(dir);
|
|
return (1 == match);
|
|
}
|
|
|
|
static int FindGpioChipOffsetByNumber(unsigned *gpio_num, unsigned *offset,
|
|
Basemapping *data)
|
|
{
|
|
DIR *dir;
|
|
struct dirent *ent;
|
|
int match = 0;
|
|
|
|
/* Obtain relative GPIO number.
|
|
* The assumption here is the Basemapping
|
|
* table is arranged in decreasing order of
|
|
* base address and ends with 0.
|
|
* A UID with value 0 indicates an invalid range
|
|
* and causes an early return to avoid the directory
|
|
* opening code below.
|
|
*/
|
|
do {
|
|
if (*gpio_num >= data->base) {
|
|
*gpio_num -= data->base;
|
|
break;
|
|
}
|
|
data++;
|
|
} while(1);
|
|
|
|
if (data->uid == 0) {
|
|
return 0;
|
|
}
|
|
|
|
dir = opendir(GPIO_BASE_PATH);
|
|
if (!dir) {
|
|
return 0;
|
|
}
|
|
|
|
while(0 != (ent = readdir(dir))) {
|
|
/* For every gpiochip entry determine uid. */
|
|
if (1 == sscanf(ent->d_name, "gpiochip%u", offset)) {
|
|
char uid_file[128];
|
|
unsigned uid_value;
|
|
snprintf(uid_file, sizeof(uid_file),
|
|
"%s/gpiochip%u/device/firmware_node/uid",
|
|
GPIO_BASE_PATH, *offset);
|
|
if (ReadFileInt(uid_file, &uid_value) < 0)
|
|
continue;
|
|
if (data->uid == uid_value) {
|
|
match++;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
closedir(dir);
|
|
return (1 == match);
|
|
}
|
|
|
|
|
|
/* Braswell has 4 sets of GPIO banks. It is expected the firmware exposes each
|
|
* bank of gpios using a UID in ACPI. Furthermore the gpio number exposed is
|
|
* relative to the bank. e.g. gpio MF_ISH_GPIO_4 in the bank specified by UID 3
|
|
* would be encoded as 0x10016.
|
|
*
|
|
* UID | Bank Offset
|
|
* ----+------------
|
|
* 1 | 0x0000
|
|
* 2 | 0x8000
|
|
* 3 | 0x10000
|
|
* 4 | 0x18000
|
|
*/
|
|
static int BraswellFindGpioChipOffset(unsigned *gpio_num, unsigned *offset,
|
|
const char *name)
|
|
{
|
|
int ret;
|
|
struct utsname host;
|
|
unsigned int maj, min;
|
|
int gpe = 0;
|
|
static Basemapping data[]={
|
|
{0x20000, 0},
|
|
{0x18000, 4},
|
|
{0x10000, 3},
|
|
{0x08000, 2},
|
|
{0x00000, 1}};
|
|
|
|
/*
|
|
* This quirk addresses b:143174998 and is required on kernels >= 4.16
|
|
* when GPIO numbering has changed with an upstream commit:
|
|
* 03c4749dd6c7ff948a0ce59a44a1b97c015353c2
|
|
* "gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation".
|
|
* With that change gpio ACPI/Linux kernel 1:1 mapping was introduced which
|
|
* made mismatch for gpio number and backward compatibility for user-space.
|
|
* Details on review commit review
|
|
* https://chromium-review.googlesource.com/c/chromiumos/platform/vboot_reference/+/2153155
|
|
*/
|
|
|
|
/*
|
|
* Here we are addressing particular wpsw_cur pin which is connected to
|
|
* East Community GPIO chip (uid == 3, base == 0x10000). In this case there
|
|
* is only one gap between 11 and 15 (0..11 15..26). For now crosssystem
|
|
* is not checking pins in other gpio banks, but it is worth to mention that
|
|
* there are gaps as well.
|
|
*/
|
|
if (*gpio_num >= 0x10000 && *gpio_num < 0x18000)
|
|
gpe = 1;
|
|
|
|
ret = FindGpioChipOffsetByNumber(gpio_num, offset, data);
|
|
if (!ret || !gpe)
|
|
return ret;
|
|
|
|
if (uname(&host) == 0) {
|
|
if (sscanf(host.release, "%u.%u.", &maj, &min) == 2) {
|
|
#if !defined(__FreeBSD__)
|
|
if (KERNEL_VERSION(maj, min, 0) >= KERNEL_VERSION(4, 16, 0) &&
|
|
*offset > 11)
|
|
*offset += 3;
|
|
#endif
|
|
} else {
|
|
printf("Couldn't retrieve kernel version!\n");
|
|
ret = 0;
|
|
}
|
|
} else {
|
|
perror("uname");
|
|
ret = 0;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* BayTrail has 3 sets of GPIO banks. It is expected the firmware exposes
|
|
* each bank of gpios using a UID in ACPI. Furthermore the gpio number exposed
|
|
* is relative to the bank. e.g. gpio 6 in the bank specified by UID 3 would
|
|
* be encoded as 0x2006.
|
|
* UID | Bank Offset
|
|
* ----+------------
|
|
* 1 | 0x0000
|
|
* 2 | 0x1000
|
|
* 3 | 0x2000
|
|
*/
|
|
static int BayTrailFindGpioChipOffset(unsigned *gpio_num, unsigned *offset,
|
|
const char *name)
|
|
{
|
|
static Basemapping data[]={
|
|
{0x3000, 0},
|
|
{0x2000, 3},
|
|
{0x1000, 2},
|
|
{0x0000, 1}};
|
|
|
|
return FindGpioChipOffsetByNumber(gpio_num, offset, data);
|
|
}
|
|
|
|
struct GpioChipset {
|
|
const char *name;
|
|
int (*ChipOffsetAndGpioNumber)(unsigned *gpio_num,
|
|
unsigned *chip_offset,
|
|
const char *name);
|
|
};
|
|
|
|
static const struct GpioChipset chipsets_supported[] = {
|
|
{ "AMD0030", FindGpioChipOffset },
|
|
{ "NM10", FindGpioChipOffset },
|
|
{ "CougarPoint", FindGpioChipOffset },
|
|
{ "PantherPoint", FindGpioChipOffset },
|
|
{ "LynxPoint", FindGpioChipOffset },
|
|
{ "PCH-LP", FindGpioChipOffset },
|
|
{ "INT3437:00", FindGpioChipOffsetByLabel },
|
|
{ "INT344B:00", FindGpioChipOffsetByLabel },
|
|
/* INT3452 are for Apollolake */
|
|
{ "INT3452:00", FindGpioChipOffsetByLabel },
|
|
{ "INT3452:01", FindGpioChipOffsetByLabel },
|
|
{ "INT3452:02", FindGpioChipOffsetByLabel },
|
|
{ "INT3452:03", FindGpioChipOffsetByLabel },
|
|
{ "INT3455:00", FindGpioChipOffsetByLabel },
|
|
{ "INT34BB:00", FindGpioChipOffsetByLabel },
|
|
{ "INT34C8:00", FindGpioChipOffsetByLabel },
|
|
{ "INT34C5:00", FindGpioChipOffsetByLabel },
|
|
/* INTC105x are for Alderlake */
|
|
{ "INTC1055:00", FindGpioChipOffsetByLabel },
|
|
{ "INTC1056:00", FindGpioChipOffsetByLabel },
|
|
/* INT3453 are for GLK */
|
|
{ "INT3453:00", FindGpioChipOffsetByLabel },
|
|
{ "INT3453:01", FindGpioChipOffsetByLabel },
|
|
{ "INT3453:02", FindGpioChipOffsetByLabel },
|
|
{ "INT3453:03", FindGpioChipOffsetByLabel },
|
|
{ "BayTrail", BayTrailFindGpioChipOffset },
|
|
{ "Braswell", BraswellFindGpioChipOffset },
|
|
{ NULL },
|
|
};
|
|
|
|
static const struct GpioChipset *FindChipset(const char *name)
|
|
{
|
|
const struct GpioChipset *chipset = &chipsets_supported[0];
|
|
|
|
while (chipset->name != NULL) {
|
|
if (!strcmp(name, chipset->name))
|
|
return chipset;
|
|
chipset++;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
/* Read a GPIO of the specified signal type (see ACPI GPIO SignalType).
|
|
*
|
|
* Returns 1 if the signal is asserted, 0 if not asserted, or -1 if error. */
|
|
static int ReadGpio(unsigned signal_type)
|
|
{
|
|
char name[128];
|
|
int index = 0;
|
|
unsigned gpio_type;
|
|
unsigned active_high;
|
|
unsigned controller_num;
|
|
unsigned controller_offset = 0;
|
|
char controller_name[128];
|
|
unsigned value;
|
|
const struct GpioChipset *chipset;
|
|
|
|
/* Scan GPIO.* to find a matching signal type */
|
|
for (index = 0; ; index++) {
|
|
snprintf(name, sizeof(name), "%s.%d/GPIO.0", ACPI_GPIO_PATH,
|
|
index);
|
|
if (ReadFileInt(name, &gpio_type) < 0)
|
|
return -1; /* Ran out of GPIOs before finding a match */
|
|
if (gpio_type == signal_type)
|
|
break;
|
|
}
|
|
|
|
/* Read attributes and controller info for the GPIO */
|
|
snprintf(name, sizeof(name), "%s.%d/GPIO.1", ACPI_GPIO_PATH, index);
|
|
if (ReadFileInt(name, &active_high) < 0)
|
|
return -1;
|
|
snprintf(name, sizeof(name), "%s.%d/GPIO.2", ACPI_GPIO_PATH, index);
|
|
if (ReadFileInt(name, &controller_num) < 0)
|
|
return -1;
|
|
/* Do not attempt to read GPIO that is set to -1 in ACPI */
|
|
if (controller_num == 0xFFFFFFFF)
|
|
return -1;
|
|
|
|
/* Check for chipsets we recognize. */
|
|
snprintf(name, sizeof(name), "%s.%d/GPIO.3", ACPI_GPIO_PATH, index);
|
|
if (!ReadFileString(controller_name, sizeof(controller_name), name))
|
|
return -1;
|
|
chipset = FindChipset(controller_name);
|
|
if (chipset == NULL)
|
|
return -1;
|
|
|
|
/* Modify GPIO number by driver's offset */
|
|
if (!chipset->ChipOffsetAndGpioNumber(&controller_num,
|
|
&controller_offset,
|
|
chipset->name))
|
|
return -1;
|
|
controller_offset += controller_num;
|
|
|
|
/* Try reading the GPIO value */
|
|
snprintf(name, sizeof(name), "%s/gpio%d/value",
|
|
GPIO_BASE_PATH, controller_offset);
|
|
if (ReadFileInt(name, &value) < 0) {
|
|
/* Try exporting the GPIO */
|
|
FILE* f = fopen(GPIO_EXPORT_PATH, "wt");
|
|
if (!f)
|
|
return -1;
|
|
fprintf(f, "%u", controller_offset);
|
|
fclose(f);
|
|
|
|
/* Try re-reading the GPIO value */
|
|
if (ReadFileInt(name, &value) < 0)
|
|
return -1;
|
|
}
|
|
|
|
/* Normalize the value read from the kernel in case it is not always
|
|
* 1. */
|
|
value = value ? 1 : 0;
|
|
|
|
/* Compare the GPIO value with the active value and return 1 if
|
|
* match. */
|
|
return (value == active_high ? 1 : 0);
|
|
}
|
|
|
|
|
|
int VbGetArchPropertyInt(const char* name)
|
|
{
|
|
int value = -1;
|
|
|
|
/* Switch positions */
|
|
if (!strcasecmp(name,"devsw_cur")) {
|
|
/* Systems with virtual developer switches return at-boot
|
|
* value */
|
|
value = VbGetSystemPropertyInt("devsw_boot");
|
|
} else if (!strcasecmp(name,"recoverysw_cur")) {
|
|
value = ReadGpio(GPIO_SIGNAL_TYPE_RECOVERY);
|
|
} else if (!strcasecmp(name,"wpsw_cur")) {
|
|
value = ReadGpio(GPIO_SIGNAL_TYPE_WP);
|
|
} else if (!strcasecmp(name,"recoverysw_ec_boot")) {
|
|
value = ReadFileBit(ACPI_CHSW_PATH, CHSW_RECOVERY_EC_BOOT);
|
|
} else if (!strcasecmp(name,"phase_enforcement")) {
|
|
value = ReadGpio(GPIO_SIGNAL_TYPE_PHASE_ENFORCEMENT);
|
|
}
|
|
|
|
/* Fields for old systems which don't have VbSharedData */
|
|
if (VbSharedDataVersion() < 2) {
|
|
if (!strcasecmp(name,"recovery_reason")) {
|
|
value = VbGetRecoveryReason();
|
|
} else if (!strcasecmp(name,"devsw_boot")) {
|
|
value = ReadFileBit(ACPI_CHSW_PATH, CHSW_DEV_BOOT);
|
|
} else if (!strcasecmp(name,"recoverysw_boot")) {
|
|
value = ReadFileBit(ACPI_CHSW_PATH, CHSW_RECOVERY_BOOT);
|
|
}
|
|
}
|
|
|
|
/* NV storage values. If unable to get from NV storage, fall back to
|
|
* the CMOS reboot field used by older BIOS (e.g. Mario). */
|
|
if (!strcasecmp(name,"recovery_request")) {
|
|
value = vb2_get_nv_storage(VB2_NV_RECOVERY_REQUEST);
|
|
if (-1 == value)
|
|
value = VbGetCmosRebootField(CMOSRF_RECOVERY);
|
|
} else if (!strcasecmp(name,"dbg_reset")) {
|
|
value = vb2_get_nv_storage(VB2_NV_DEBUG_RESET_MODE);
|
|
if (-1 == value)
|
|
value = VbGetCmosRebootField(CMOSRF_DEBUG_RESET);
|
|
} else if (!strcasecmp(name,"fwb_tries")) {
|
|
value = vb2_get_nv_storage(VB2_NV_TRY_COUNT);
|
|
if (-1 == value)
|
|
value = VbGetCmosRebootField(CMOSRF_TRY_B);
|
|
}
|
|
|
|
/* Firmware update tries is now stored in the kernel field. On
|
|
* older systems where it's not, it was stored in a file in the
|
|
* stateful partition. */
|
|
if (!strcasecmp(name,"fwupdate_tries")) {
|
|
unsigned fwupdate_value;
|
|
if (-1 != vb2_get_nv_storage(VB2_NV_KERNEL_FIELD))
|
|
return -1; /* NvStorage supported; fail through
|
|
* arch-specific implementation to normal
|
|
* implementation. */
|
|
/* Read value from file; missing file means value=0. */
|
|
if (ReadFileInt(NEED_FWUPDATE_PATH, &fwupdate_value) < 0)
|
|
value = 0;
|
|
else
|
|
value = (int)fwupdate_value;
|
|
}
|
|
|
|
return value;
|
|
}
|
|
|
|
|
|
const char* VbGetArchPropertyString(const char* name, char* dest,
|
|
size_t size)
|
|
{
|
|
unsigned value;
|
|
|
|
if (!strcasecmp(name,"arch")) {
|
|
return StrCopy(dest, "x86", size);
|
|
} else if (!strcasecmp(name,"hwid")) {
|
|
return ReadFileString(dest, size, ACPI_BASE_PATH "/HWID");
|
|
} else if (!strcasecmp(name,"fwid")) {
|
|
return ReadFileString(dest, size, ACPI_BASE_PATH "/FWID");
|
|
} else if (!strcasecmp(name,"ro_fwid")) {
|
|
return ReadFileString(dest, size, ACPI_BASE_PATH "/FRID");
|
|
} else if (!strcasecmp(name,"mainfw_act")) {
|
|
if (ReadFileInt(ACPI_BINF_PATH ".1", &value) < 0)
|
|
return NULL;
|
|
switch(value) {
|
|
case 0:
|
|
return StrCopy(dest, "recovery", size);
|
|
case 1:
|
|
return StrCopy(dest, "A", size);
|
|
case 2:
|
|
return StrCopy(dest, "B", size);
|
|
default:
|
|
return NULL;
|
|
}
|
|
} else if (!strcasecmp(name,"mainfw_type")) {
|
|
return VbReadMainFwType(dest, size);
|
|
} else if (!strcasecmp(name,"ecfw_act")) {
|
|
if (ReadFileInt(ACPI_BINF_PATH ".2", &value) < 0)
|
|
return NULL;
|
|
switch(value) {
|
|
case 0:
|
|
return StrCopy(dest, "RO", size);
|
|
case 1:
|
|
return StrCopy(dest, "RW", size);
|
|
default:
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
|
|
int VbSetArchPropertyInt(const char* name, int value)
|
|
{
|
|
/* NV storage values. If unable to get from NV storage, fall back to
|
|
* the CMOS reboot field used by older BIOS. */
|
|
if (!strcasecmp(name,"recovery_request")) {
|
|
if (0 == vb2_set_nv_storage(VB2_NV_RECOVERY_REQUEST, value))
|
|
return 0;
|
|
return VbSetCmosRebootField(CMOSRF_RECOVERY, value);
|
|
} else if (!strcasecmp(name,"dbg_reset")) {
|
|
if (0 == vb2_set_nv_storage(VB2_NV_DEBUG_RESET_MODE, value))
|
|
return 0;
|
|
return VbSetCmosRebootField(CMOSRF_DEBUG_RESET, value);
|
|
} else if (!strcasecmp(name,"fwb_tries")) {
|
|
if (0 == vb2_set_nv_storage(VB2_NV_TRY_COUNT, value))
|
|
return 0;
|
|
return VbSetCmosRebootField(CMOSRF_TRY_B, value);
|
|
}
|
|
/* Firmware update tries is now stored in the kernel field. On
|
|
* older systems where it's not, it was stored in a file in the
|
|
* stateful partition. */
|
|
else if (!strcasecmp(name,"fwupdate_tries")) {
|
|
if (-1 != vb2_get_nv_storage(VB2_NV_KERNEL_FIELD))
|
|
return -1; /* NvStorage supported; fail through
|
|
* arch-specific implementation to normal
|
|
* implementation */
|
|
|
|
if (value) {
|
|
char buf[32];
|
|
snprintf(buf, sizeof(buf), "%d", value);
|
|
return WriteFile(NEED_FWUPDATE_PATH, buf, strlen(buf));
|
|
} else {
|
|
/* No update tries, so remove file if it exists. */
|
|
unlink(NEED_FWUPDATE_PATH);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
int VbSetArchPropertyString(const char* name, const char* value)
|
|
{
|
|
/* If there were settable architecture-dependent string properties,
|
|
* they'd be here. */
|
|
return -1;
|
|
}
|