117 lines
2.7 KiB
C
117 lines
2.7 KiB
C
// CPU count detection
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//
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// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2006 Fabrice Bellard
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "util.h" // dprintf
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#include "config.h" // CONFIG_*
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#include "cmos.h" // CMOS_BIOS_SMP_COUNT
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#define CPUID_APIC (1 << 9)
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#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
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#define APIC_SVR ((u8*)BUILD_APIC_ADDR + 0x0F0)
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#define APIC_ENABLED 0x0100
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static inline void writel(void *addr, u32 val)
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{
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*(volatile u32 *)addr = val;
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}
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static inline void writew(void *addr, u16 val)
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{
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*(volatile u16 *)addr = val;
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}
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static inline void writeb(void *addr, u8 val)
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{
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*(volatile u8 *)addr = val;
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}
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static inline u32 readl(const void *addr)
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{
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return *(volatile const u32 *)addr;
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}
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static inline u16 readw(const void *addr)
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{
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return *(volatile const u16 *)addr;
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}
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static inline u8 readb(const void *addr)
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{
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return *(volatile const u8 *)addr;
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}
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u32 smp_cpus VAR16_32;
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extern void smp_ap_boot_code();
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ASM16(
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" .global smp_ap_boot_code\n"
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"smp_ap_boot_code:\n"
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// Increment the cpu counter
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" movw $" __stringify(SEG_BIOS) ", %ax\n"
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" movw %ax, %ds\n"
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" lock incl smp_cpus\n"
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// Halt the processor.
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" jmp permanent_halt\n"
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);
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/* find the number of CPUs by launching a SIPI to them */
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int
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smp_probe(void)
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{
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if (smp_cpus)
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return smp_cpus;
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u32 eax, ebx, ecx, cpuid_features;
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cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
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if (! (cpuid_features & CPUID_APIC)) {
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// No apic - only the main cpu is present.
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smp_cpus = 1;
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return 1;
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}
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// Init the counter.
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writel(&smp_cpus, 1);
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// Setup jump trampoline to counter code.
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u64 old = *(u64*)BUILD_AP_BOOT_ADDR;
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// ljmpw $SEG_BIOS, $(smp_ap_boot_code - BUILD_BIOS_ADDR)
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u64 new = (0xea | ((u64)SEG_BIOS<<24)
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| (((u32)smp_ap_boot_code - BUILD_BIOS_ADDR) << 8));
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*(u64*)BUILD_AP_BOOT_ADDR = new;
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// enable local APIC
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u32 val = readl(APIC_SVR);
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writel(APIC_SVR, val | APIC_ENABLED);
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// broadcast SIPI
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writel(APIC_ICR_LOW, 0x000C4500);
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u32 sipi_vector = BUILD_AP_BOOT_ADDR >> 12;
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writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
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// Wait for other CPUs to process the SIPI.
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if (CONFIG_COREBOOT)
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mdelay(10);
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else
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while (inb_cmos(CMOS_BIOS_SMP_COUNT) + 1 != readl(&smp_cpus))
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;
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// Restore memory.
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*(u64*)BUILD_AP_BOOT_ADDR = old;
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u32 count = readl(&smp_cpus);
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dprintf(1, "Found %d cpu(s)\n", count);
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return count;
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}
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// Reset smp_cpus to zero (forces a recheck on reboots).
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void
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smp_probe_setup(void)
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{
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smp_cpus = 0;
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}
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