88 lines
2.4 KiB
C
88 lines
2.4 KiB
C
// Support for enabling/disabling BIOS ram shadowing.
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//
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// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2006 Fabrice Bellard
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "util.h" // memcpy
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#include "pci.h" // pci_config_writeb
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#include "config.h" // CONFIG_*
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#include "pci_ids.h" // PCI_VENDOR_ID_INTEL
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// Test if 'addr' is in the range from 'start'..'start+size'
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#define IN_RANGE(addr, start, size) ({ \
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u32 __addr = (addr); \
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u32 __start = (start); \
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u32 __size = (size); \
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(__addr - __start < __size); \
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})
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// Enable shadowing and copy bios.
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static void
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copy_bios(u16 bdf)
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{
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int v = pci_config_readb(bdf, 0x59);
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v |= 0x30;
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pci_config_writeb(bdf, 0x59, v);
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memcpy((void *)BUILD_BIOS_ADDR, (void *)BUILD_BIOS_TMP_ADDR
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, BUILD_BIOS_SIZE);
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}
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// Make the BIOS code segment area (0xf0000) writable.
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void
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make_bios_writable()
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{
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if (CONFIG_COREBOOT)
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return;
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dprintf(3, "enabling shadow ram\n");
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// Locate chip controlling ram shadowing.
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int bdf = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441);
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if (bdf < 0) {
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dprintf(1, "Unable to unlock ram - bridge not found\n");
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return;
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}
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// Copy the bios to a temporary area.
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memcpy((void *)BUILD_BIOS_TMP_ADDR, (void *)BUILD_BIOS_ADDR
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, BUILD_BIOS_SIZE);
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// Enable shadowing and copy bios.
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if (IN_RANGE((u32)copy_bios, BUILD_BIOS_ADDR, BUILD_BIOS_SIZE)) {
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// Jump to shadow enable function - use the copy in the
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// temporary storage area so that memory does not change under
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// the executing code.
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u32 pos = (u32)copy_bios - BUILD_BIOS_ADDR + BUILD_BIOS_TMP_ADDR;
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void (*func)(u16 bdf) = (void*)pos;
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func(bdf);
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} else {
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copy_bios(bdf);
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}
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// Clear the temporary area.
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memset((void *)BUILD_BIOS_TMP_ADDR, 0, BUILD_BIOS_SIZE);
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}
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// Make the BIOS code segment area (0xf0000) read-only.
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void
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make_bios_readonly()
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{
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if (CONFIG_COREBOOT)
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return;
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dprintf(3, "locking shadow ram\n");
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int bdf = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441);
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if (bdf < 0) {
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dprintf(1, "Unable to lock ram - bridge not found\n");
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return;
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}
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wbinvd();
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int v = pci_config_readb(bdf, 0x59);
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v = (v & 0x0f) | (0x10);
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pci_config_writeb(bdf, 0x59, v);
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}
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