667 lines
17 KiB
ArmAsm
667 lines
17 KiB
ArmAsm
// Rom layout and bios assembler to C interface.
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//
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// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "config.h" // CONFIG_*
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#include "ioport.h" // PORT_A20
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#include "bregs.h" // CR0_*
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#include "cmos.h" // CMOS_RESET_CODE
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#include "../out/asm-offsets.h" // BREGS_*
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/****************************************************************
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* Include of 16bit C code
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****************************************************************/
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.code16gcc
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.include "out/ccode.16.s"
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/****************************************************************
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* Entry macros
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****************************************************************/
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// Call a C function - this does the minimal work necessary to
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// call into C. It sets up %ds, backs up %es, and backs up
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// those registers that are call clobbered by the C compiler.
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.macro ENTRY cfunc
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cld
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pushl %eax // Save registers clobbered by C code
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pushl %ecx
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pushl %edx
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pushw %es
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pushw %ds
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movw %ss, %ax // Move %ss to %ds
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movw %ax, %ds
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pushl %esp // Backup %esp, then clear high bits
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movzwl %sp, %esp
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calll \cfunc
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popl %esp // Restore %esp (including high bits)
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popw %ds // Restore registers saved above
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popw %es
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popl %edx
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popl %ecx
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popl %eax
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.endm
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// Call a C function with current register list as an
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// argument. This backs up the registers and sets %eax
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// to point to the backup. On return, the registers are
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// restored from the structure.
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.macro ENTRY_ARG cfunc
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cld
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pushl %eax // Save registers (matches struct bregs)
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pushl %ecx
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pushl %edx
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pushl %ebx
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pushl %esi
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pushl %edi
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pushw %es
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pushw %ds
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movw %ss, %ax // Move %ss to %ds
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movw %ax, %ds
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movl %esp, %ebx // Backup %esp, then zero high bits
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movzwl %sp, %esp
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movl %esp, %eax // First arg is pointer to struct bregs
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calll \cfunc
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movl %ebx, %esp // Restore %esp (including high bits)
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popw %ds // Restore registers (from struct bregs)
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popw %es
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popl %edi
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popl %esi
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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.endm
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// As above, but don't mangle %esp
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.macro ENTRY_ARG_ESP cfunc
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cld
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pushl %eax // Save registers (matches struct bregs)
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pushl %ecx
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pushl %edx
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pushl %ebx
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pushl %esi
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pushl %edi
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pushw %es
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pushw %ds
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movw %ss, %ax // Move %ss to %ds
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movw %ax, %ds
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movl %esp, %eax // First arg is pointer to struct bregs
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calll \cfunc
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popw %ds // Restore registers (from struct bregs)
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popw %es
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popl %edi
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popl %esi
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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.endm
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// Macro to reset the 16bit stack
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// Clobbers %ax
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.macro RESET_STACK
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xorw %ax, %ax
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movw %ax, %ss
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movl $ BUILD_STACK_ADDR , %esp
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cld
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.endm
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// Specify a location in the fixed part of bios area.
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.macro ORG addr
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.section .text.fixed.addr
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.org \addr - BUILD_START_FIXED
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.endm
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/****************************************************************
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* POST handler
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****************************************************************/
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ORG 0xe05b
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post16:
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// enable cache
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movl %cr0, %eax
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andl $~(CR0_CD|CR0_NW), %eax
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movl %eax, %cr0
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// Check for restart indicator.
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movl $CMOS_RESET_CODE, %eax
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outb %al, $PORT_CMOS_INDEX
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inb $PORT_CMOS_DATA, %al
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cmpb $0x0, %al
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jnz entry_resume
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// Normal entry point
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RESET_STACK
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pushl $_code32__start
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// Fall through to transition32 function below
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/****************************************************************
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* Call trampolines
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****************************************************************/
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// Place CPU into 32bit mode from 16bit mode.
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// Clobbers: %eax, flags, stack registers, cr0, idt/gdt
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transition32:
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// Disable irqs
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cli
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// enable a20
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inb $PORT_A20, %al
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orb $A20_ENABLE_BIT, %al
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outb %al, $PORT_A20
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// Set segment descriptors
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lidtw %cs:pmode_IDT_info
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lgdtw %cs:rombios32_gdt_48
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// Enable protected mode
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movl %cr0, %eax
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orl $CR0_PE, %eax
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movl %eax, %cr0
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// start 32bit protected mode code
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ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f)
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.code32
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1:
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// init data segments
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movl $SEG32_MODE32_DS, %eax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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retl
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// Call a 16bit function from 32bit mode.
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// %eax = address of struct bregs
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// Clobbers: all gp registers, flags, stack registers, cr0, idt/gdt
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.global __call16_from32, __call16big_from32
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__call16_from32:
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pushl %eax
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// restore data segment limits to 0xffff
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movl $SEG32_MODE16_DS, %eax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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// disable a20
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inb $PORT_A20, %al
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andb $~A20_ENABLE_BIT, %al
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outb %al, $PORT_A20
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// Jump to 16bit mode
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ljmpw $SEG32_MODE16_CS, $1f
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__call16big_from32:
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pushl %eax
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movl $SEG32_MODE16BIG_DS, %eax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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ljmpl $SEG32_MODE16BIG_CS, $(BUILD_BIOS_ADDR + 1f)
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.code16gcc
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1:
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// Disable protected mode
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movl %cr0, %eax
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andl $~CR0_PE, %eax
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movl %eax, %cr0
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// far jump to flush CPU queue after transition to real mode
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ljmpw $SEG_BIOS, $2f
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2:
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// restore IDT to normal real-mode defaults
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lidtw %cs:rmode_IDT_info
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// Clear segment registers
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xorw %ax, %ax
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movw %ax, %fs
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movw %ax, %gs
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movw %ax, %es
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movw %ax, %ds
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movw %ax, %ss // Assume stack is in segment 0
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popl %eax
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// Set __call16 return address to be transition32
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pushl $transition32
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// Fall through to __call16
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// Call a 16bit function from 16bit mode with a specified cpu register state
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// %eax = address of struct bregs
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// Clobbers: all gp registers, es
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.global __call16
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__call16:
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// Save eax
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pushl %eax
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// Setup for iretw call
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pushw $SEG_BIOS
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pushw $1f // return point
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pushw BREGS_flags(%eax) // flags
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pushl BREGS_ip(%eax) // CS:IP
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// Load calling registers.
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movl BREGS_edi(%eax), %edi
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movl BREGS_esi(%eax), %esi
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movl BREGS_ebx(%eax), %ebx
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movl BREGS_edx(%eax), %edx
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movl BREGS_ecx(%eax), %ecx
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movw BREGS_es(%eax), %es
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movw BREGS_ds(%eax), %ds
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movl %ss:BREGS_eax(%eax), %eax
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// Invoke call
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iretw // XXX - just do a lcalll
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1:
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// Store flags, eax, ecx
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pushfw
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pushl %eax
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movl 0x06(%esp), %eax
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movl %ecx, %ss:BREGS_ecx(%eax)
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movw %ds, %ss:BREGS_ds(%eax)
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movw %ss, %cx
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movw %cx, %ds // Restore %ds == %ss
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popl %ecx
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movl %ecx, BREGS_eax(%eax)
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popw %cx
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movw %cx, BREGS_flags(%eax)
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// Store remaining registers
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movw %es, BREGS_es(%eax)
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movl %edi, BREGS_edi(%eax)
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movl %esi, BREGS_esi(%eax)
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movl %ebx, BREGS_ebx(%eax)
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movl %edx, BREGS_edx(%eax)
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// Remove %eax
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popl %eax
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cld
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retl
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// Entry point when a post call looks like a resume.
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// %eax = shutdown status from cmos
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entry_resume:
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// Save old shutdown status.
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movl %eax, %ebx
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// Clear shutdown status register.
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movl $CMOS_RESET_CODE, %eax
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outb %al, $PORT_CMOS_INDEX
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xorl %eax, %eax
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outb %al, $PORT_CMOS_DATA
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// Use a stack in EBDA
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movw $SEG_BDA, %ax
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movw %ax, %ds
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movw BDA_ebda_seg, %ax
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movw %ax, %ss
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movw %ax, %ds
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movl $EBDA_OFFSET_TOP_STACK, %esp
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// Call handler.
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movl %ebx, %eax
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cld
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cli
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jmp handle_resume
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// PnP trampolines
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.global entry_pnp_real, entry_pnp_prot
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entry_pnp_prot:
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pushl %esp
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jmp 1f
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entry_pnp_real:
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pushl %esp // Backup %esp, then clear high bits
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movzwl %sp, %esp
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1:
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pushfl // Save registers clobbered by C code
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pushl %eax
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pushl %ecx
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pushl %edx
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pushw %es
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pushw %ds
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movw %ss, %cx // Move %ss to %ds
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movw %cx, %ds
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lea 28(%esp), %eax // %eax points to start of u16 args
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calll handle_pnp
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movw %ax, 12(%esp) // Modify %eax to return %ax
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popw %ds
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popw %es
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popl %edx
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popl %ecx
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popl %eax
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popfl
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popl %esp
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lretw
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// APM trampolines
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.global apm16protected_entry
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apm16protected_entry:
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pushfw // save flags
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pushl %eax // dummy
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ENTRY_ARG handle_1553
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addw $4, %sp // pop dummy
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popfw // restore flags
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lretw
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.code32
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.global apm32protected_entry
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apm32protected_entry:
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pushfw
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pushw %cs // Setup for long jump to 16bit mode
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pushw $1f
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addw $8, 2(%esp)
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ljmpw *(%esp)
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.code16gcc
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1:
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ENTRY_ARG_ESP handle_1553
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movw $2f,(%esp) // Setup for long jump back to 32bit mode
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subw $8, 2(%esp)
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ljmpw *(%esp)
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.code32
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2:
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addl $4, %esp // pop call address
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popfw
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lretl
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// 32bit elf entry point
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.global post32
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post32:
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cli
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cld
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lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
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lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
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movl $BUILD_STACK_ADDR, %esp
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ljmpl $SEG32_MODE32_CS, $_code32__start
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.code16gcc
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// Shutdown a CPU. We want this in the 0xf000 section to ensure that
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// the code wont be overwritten with something else. (Should
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// something spurious wake up the CPU, we want to be sure that the hlt
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// insn will still be present and will shutdown the CPU.)
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.global permanent_halt
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permanent_halt:
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cli
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1: hlt
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jmp 1b
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// IRQ trampolines
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.macro IRQ_TRAMPOLINE num
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.global irq_trampoline_0x\num
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irq_trampoline_0x\num :
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int $0x\num
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lretw
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.endm
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IRQ_TRAMPOLINE 02
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IRQ_TRAMPOLINE 10
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IRQ_TRAMPOLINE 13
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IRQ_TRAMPOLINE 15
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IRQ_TRAMPOLINE 16
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IRQ_TRAMPOLINE 18
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IRQ_TRAMPOLINE 19
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IRQ_TRAMPOLINE 1c
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IRQ_TRAMPOLINE 4a
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/****************************************************************
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* Interrupt entry points
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****************************************************************/
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// Define an entry point for an interrupt (no args passed).
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.macro IRQ_ENTRY num
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.global entry_\num
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entry_\num :
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cli // In case something far-calls instead of using "int"
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ENTRY handle_\num
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iretw
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.endm
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// Define an entry point for an interrupt (can read/modify args).
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.macro IRQ_ENTRY_ARG num
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.global entry_\num
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entry_\num :
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cli // In case something far-calls instead of using "int"
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ENTRY_ARG handle_\num
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iretw
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.endm
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ORG 0xe2c3
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IRQ_ENTRY nmi
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/****************************************************************
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* GDT and IDT tables (between 0xe2c3 - 0xe3fe)
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****************************************************************/
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// Protected mode IDT descriptor
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//
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// I just make the limit 0, so the machine will shutdown
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// if an exception occurs during protected mode memory
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// transfers.
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//
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// Set base to f0000 to correspond to beginning of BIOS,
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// in case I actually define an IDT later
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// Set limit to 0
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.type pmode_IDT_info, @object
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pmode_IDT_info:
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.word 0x0000 // limit 15:00
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.long 0xf0000 // base 16:47
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// Real mode IDT descriptor
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//
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// Set to typical real-mode values.
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// base = 000000
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// limit = 03ff
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.type rmode_IDT_info, @object
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rmode_IDT_info:
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.word 0x03ff // limit 15:00
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.long 0 // base 16:47
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.type rombios32_gdt_48, @object
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rombios32_gdt_48:
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.word (rombios32_gdt_end - rombios32_gdt)
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.long (BUILD_BIOS_ADDR + rombios32_gdt)
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.balign 8
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.type rombios32_gdt, @object
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rombios32_gdt:
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.word 0, 0, 0, 0
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.word 0, 0, 0, 0
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// 32 bit flat code segment (SEG32_MODE32_CS)
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.word 0xffff, 0, 0x9b00, 0x00cf
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// 32 bit flat data segment (SEG32_MODE32_DS)
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.word 0xffff, 0, 0x9300, 0x00cf
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// 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
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.word 0xffff, 0, 0x9b0f, 0x0000
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// 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
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.word 0xffff, 0, 0x9300, 0x0000
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// 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
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.word 0xffff, 0, 0x9b00, 0x008f
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// 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
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.word 0xffff, 0, 0x9300, 0x008f
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rombios32_gdt_end:
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/****************************************************************
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* Interrupt entry points (continued)
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****************************************************************/
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ORG 0xe3fe
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.global entry_13_official
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entry_13_official:
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jmp entry_13
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ORG 0xe401
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.type __fdpt, @object
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__fdpt:
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// XXX - Fixed Disk Parameter Table
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ORG 0xe6f2
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.global entry_19_official
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entry_19_official:
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jmp entry_19
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ORG 0xe6f5
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.include "out/cbt.proc.16.s"
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.text
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ORG 0xe729
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.type __brgt, @object
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__brgt:
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// XXX - Baud Rate Generator Table
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ORG 0xe739
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IRQ_ENTRY_ARG 14
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ORG 0xe82e
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IRQ_ENTRY_ARG 16
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ORG 0xe987
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IRQ_ENTRY 09
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ORG 0xec59
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IRQ_ENTRY_ARG 40
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ORG 0xef57
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IRQ_ENTRY 0e
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ORG 0xefc7
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.include "out/floppy_dbt.proc.16.s"
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.text
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ORG 0xefd2
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IRQ_ENTRY_ARG 17
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ORG 0xf045
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__int10_0x0f:
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// XXX - INT 10 Functions 0-Fh Entry Point
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iretw
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ORG 0xf065
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IRQ_ENTRY_ARG 10
|
|
|
|
ORG 0xf0a4
|
|
.type __int1d, @object
|
|
__int1d:
|
|
// XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
|
|
.space 0x58
|
|
|
|
.global freespace2_start, freespace2_end
|
|
freespace2_start:
|
|
|
|
ORG 0xf841
|
|
freespace2_end:
|
|
.global entry_12_official
|
|
entry_12_official:
|
|
jmp entry_12
|
|
|
|
ORG 0xf84d
|
|
.global entry_11_official
|
|
entry_11_official:
|
|
jmp entry_11
|
|
|
|
ORG 0xf859
|
|
IRQ_ENTRY_ARG 15
|
|
|
|
// Fit other misc defs if the freespace between 0xf859-0xfa6e
|
|
|
|
IRQ_ENTRY_ARG 13
|
|
IRQ_ENTRY_ARG 12
|
|
IRQ_ENTRY_ARG 11
|
|
IRQ_ENTRY 76
|
|
IRQ_ENTRY 1c
|
|
IRQ_ENTRY 70
|
|
IRQ_ENTRY 74
|
|
IRQ_ENTRY 75
|
|
IRQ_ENTRY hwpic1
|
|
IRQ_ENTRY hwpic2
|
|
|
|
// int 18/19 are special - they reset the stack and do not return.
|
|
entry_19:
|
|
RESET_STACK
|
|
pushl $_code32_handle_19
|
|
jmp transition32
|
|
|
|
.global entry_18
|
|
entry_18:
|
|
RESET_STACK
|
|
pushl $_code32_handle_18
|
|
jmp transition32
|
|
|
|
ORG 0xfa6e
|
|
.include "out/font.proc.16.s"
|
|
.text
|
|
|
|
ORG 0xfe6e
|
|
IRQ_ENTRY_ARG 1a
|
|
|
|
ORG 0xfea5
|
|
IRQ_ENTRY 08
|
|
|
|
ORG 0xfef3
|
|
__initvector:
|
|
// XXX - Initial Interrupt Vector Offsets Loaded by POST
|
|
|
|
ORG 0xff00
|
|
.type __copyright, @object
|
|
__copyright:
|
|
// XXX - BIOS_COPYRIGHT_STRING
|
|
.asciz "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
|
|
|
|
ORG 0xff53
|
|
.global dummy_iret_handler
|
|
dummy_iret_handler:
|
|
iretw
|
|
|
|
ORG 0xff54
|
|
IRQ_ENTRY_ARG 05
|
|
|
|
ORG 0xfff0 // Power-up Entry Point
|
|
.global reset_vector
|
|
reset_vector:
|
|
ljmpw $SEG_BIOS, $post16
|
|
|
|
ORG 0xfff5
|
|
.type __biosdate, @object
|
|
__biosdate:
|
|
// BIOS build date
|
|
.ascii "06/23/99"
|
|
|
|
ORG 0xfffe
|
|
.type __model_id, @object
|
|
__model_id:
|
|
.byte CONFIG_MODEL_ID
|
|
|
|
.global bios_checksum
|
|
.type bios_checksum, @object
|
|
bios_checksum:
|
|
.byte 0x00
|
|
|
|
.end
|