265 lines
6.4 KiB
C
265 lines
6.4 KiB
C
// 32bit code to Power On Self Test (POST) a machine.
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//
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// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "ioport.h" // PORT_*
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#include "config.h" // CONFIG_*
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#include "cmos.h" // CMOS_*
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#include "util.h" // memset
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#include "biosvar.h" // struct bios_data_area_s
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#include "disk.h" // floppy_drive_setup
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#include "memmap.h" // add_e820
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#include "pic.h" // pic_setup
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#include "pci.h" // create_pirtable
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#include "acpi.h" // acpi_bios_init
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#include "bregs.h" // struct bregs
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#include "boot.h" // IPL
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void
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__set_irq(int vector, void *loc)
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{
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SET_IVT(vector, SEG_BIOS, (u32)loc - BUILD_BIOS_ADDR);
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}
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#define set_irq(vector, func) do { \
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extern void func (void); \
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__set_irq(vector, func); \
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} while (0)
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static void
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init_ivt()
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{
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dprintf(3, "init ivt\n");
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// Initialize all vectors to a dummy handler.
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int i;
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for (i=0; i<256; i++)
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set_irq(i, dummy_iret_handler);
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// Initialize all hw vectors to a default hw handler.
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for (i=0x08; i<=0x0f; i++)
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set_irq(i, entry_hwpic1);
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for (i=0x70; i<=0x77; i++)
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set_irq(i, entry_hwpic2);
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// Initialize software handlers.
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set_irq(0x10, entry_10);
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set_irq(0x11, entry_11_official);
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set_irq(0x12, entry_12_official);
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set_irq(0x13, entry_13_official);
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set_irq(0x14, entry_14);
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set_irq(0x15, entry_15);
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set_irq(0x16, entry_16);
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set_irq(0x17, entry_17);
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set_irq(0x18, entry_18);
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set_irq(0x19, entry_19_official);
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set_irq(0x1a, entry_1a);
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set_irq(0x1c, entry_1c);
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set_irq(0x40, entry_40);
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// set vector 0x79 to zero
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// this is used by 'gardian angel' protection system
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SET_IVT(0x79, 0, 0);
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__set_irq(0x1E, &diskette_param_table2);
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}
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static void
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init_bda()
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{
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dprintf(3, "init bda\n");
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struct bios_data_area_s *bda = MAKE_FARPTR(SEG_BDA, 0);
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memset(bda, 0, sizeof(*bda));
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int esize = DIV_ROUND_UP(sizeof(struct extended_bios_data_area_s), 1024);
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SET_BDA(mem_size_kb, 640 - esize);
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u16 eseg = FARPTR_TO_SEG((640 - esize) * 1024);
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SET_BDA(ebda_seg, eseg);
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struct extended_bios_data_area_s *ebda = get_ebda_ptr();
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memset(ebda, 0, sizeof(*ebda));
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ebda->size = esize;
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SET_IVT(0x41, eseg, offsetof(struct extended_bios_data_area_s, fdpt[0]));
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SET_IVT(0x46, eseg, offsetof(struct extended_bios_data_area_s, fdpt[1]));
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}
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static void
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ram_probe(void)
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{
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dprintf(3, "Find memory size\n");
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if (CONFIG_COREBOOT) {
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coreboot_fill_map();
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} else {
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// On emulators, get memory size from nvram.
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u32 rs = ((inb_cmos(CMOS_MEM_EXTMEM2_LOW) << 16)
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| (inb_cmos(CMOS_MEM_EXTMEM2_HIGH) << 24));
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if (rs)
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rs += 16 * 1024 * 1024;
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else
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rs = (((inb_cmos(CMOS_MEM_EXTMEM_LOW) << 10)
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| (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 18))
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+ 1 * 1024 * 1024);
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RamSize = rs;
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add_e820(0, rs, E820_RAM);
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// Check for memory over 4Gig
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u64 high = ((inb_cmos(CMOS_MEM_HIGHMEM_LOW) << 16)
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| (inb_cmos(CMOS_MEM_HIGHMEM_MID) << 24)
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| ((u64)inb_cmos(CMOS_MEM_HIGHMEM_HIGH) << 32));
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RamSizeOver4G = high;
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add_e820(0x100000000ull, high, E820_RAM);
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/* reserve 256KB BIOS area at the end of 4 GB */
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add_e820(0xfffc0000, 256*1024, E820_RESERVED);
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}
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// Don't declare any memory between 0xa0000 and 0x100000
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add_e820(0xa0000, 0x50000, E820_HOLE);
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// Mark known areas as reserved.
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u16 ebda_seg = get_ebda_seg();
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add_e820((u32)MAKE_FARPTR(ebda_seg, 0), GET_EBDA2(ebda_seg, size) * 1024
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, E820_RESERVED);
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add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED);
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if (CONFIG_KVM)
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// 4 pages before the bios, 3 pages for vmx tss pages, the
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// other page for EPT real mode pagetable
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add_e820(0xfffbc000, 4*4096, E820_RESERVED);
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dprintf(1, "Ram Size=0x%08x\n", RamSize);
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}
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static void
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init_bios_tables(void)
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{
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if (CONFIG_COREBOOT)
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// XXX - not supported on coreboot yet.
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return;
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create_pirtable();
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mptable_init();
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smbios_init();
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acpi_bios_init();
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}
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static void
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init_boot_vectors()
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{
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if (! CONFIG_BOOT)
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return;
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dprintf(3, "init boot device ordering\n");
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// Floppy drive
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struct ipl_entry_s *ip = &IPL.table[0];
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ip->type = IPL_TYPE_FLOPPY;
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ip++;
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// First HDD
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ip->type = IPL_TYPE_HARDDISK;
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ip++;
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// CDROM
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if (CONFIG_CDROM_BOOT) {
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ip->type = IPL_TYPE_CDROM;
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ip++;
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}
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IPL.count = ip - IPL.table;
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SET_EBDA(boot_sequence, 0xffff);
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if (CONFIG_COREBOOT) {
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// XXX - hardcode defaults for coreboot.
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IPL.bootorder = 0x00000231;
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IPL.checkfloppysig = 1;
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} else {
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// On emulators, get boot order from nvram.
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IPL.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2)
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| ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4));
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if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1))
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IPL.checkfloppysig = 1;
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}
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}
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// Main setup code.
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static void
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post()
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{
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init_ivt();
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init_bda();
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pic_setup();
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timer_setup();
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mathcp_setup();
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smp_probe_setup();
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memmap_setup();
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ram_probe();
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mtrr_setup();
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pnp_setup();
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vga_setup();
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kbd_setup();
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lpt_setup();
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serial_setup();
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mouse_setup();
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pci_bios_setup();
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smm_init();
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init_bios_tables();
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memmap_finalize();
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floppy_drive_setup();
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hard_drive_setup();
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init_boot_vectors();
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optionrom_setup();
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}
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// 32-bit entry point.
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void VISIBLE32
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_start()
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{
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init_dma();
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debug_serial_setup();
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dprintf(1, "Start bios\n");
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// Allow writes to modify bios area (0xf0000)
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make_bios_writable();
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// Perform main setup code.
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post();
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// Present the user with a bootup menu.
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interactive_bootmenu();
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// Setup bios checksum.
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extern char bios_checksum;
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bios_checksum = -checksum((u8*)BUILD_BIOS_ADDR, BUILD_BIOS_SIZE - 1);
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// Prep for boot process.
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make_bios_readonly();
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// Invoke int 19 to start boot process.
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dprintf(3, "Jump to int19\n");
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struct bregs br;
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memset(&br, 0, sizeof(br));
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call16_int(0x19, &br);
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}
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// Ughh - some older gcc compilers have a bug which causes VISIBLE32
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// functions to not be exported as a global variable - force _start
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// to be global here.
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asm(".global _start");
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