106 lines
3.3 KiB
C
106 lines
3.3 KiB
C
// PIR table generation (for emulators)
|
|
//
|
|
// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
|
|
// Copyright (C) 2002 MandrakeSoft S.A.
|
|
//
|
|
// This file may be distributed under the terms of the GNU LGPLv3 license.
|
|
|
|
#include "pci.h" // struct pir_header
|
|
#include "util.h" // checksum
|
|
#include "biosvar.h" // SET_EBDA
|
|
|
|
u16 PirOffset VAR16_32;
|
|
|
|
struct pir_table {
|
|
struct pir_header pir;
|
|
struct pir_slot slots[6];
|
|
} PACKED;
|
|
|
|
extern struct pir_table PIR_TABLE;
|
|
#if CONFIG_PIRTABLE && !CONFIG_COREBOOT
|
|
struct pir_table PIR_TABLE __aligned(16) VAR16_32 = {
|
|
.pir = {
|
|
.version = 0x0100,
|
|
.size = sizeof(struct pir_table),
|
|
.router_devfunc = 0x08,
|
|
.compatible_devid = 0x122e8086,
|
|
},
|
|
.slots = {
|
|
{
|
|
// first slot entry PCI-to-ISA (embedded)
|
|
.dev = 1<<3,
|
|
.links = {
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 0, // embedded
|
|
}, {
|
|
// second slot entry: 1st PCI slot
|
|
.dev = 2<<3,
|
|
.links = {
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 1,
|
|
}, {
|
|
// third slot entry: 2nd PCI slot
|
|
.dev = 3<<3,
|
|
.links = {
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 2,
|
|
}, {
|
|
// 4th slot entry: 3rd PCI slot
|
|
.dev = 4<<3,
|
|
.links = {
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 3,
|
|
}, {
|
|
// 5th slot entry: 4rd PCI slot
|
|
.dev = 5<<3,
|
|
.links = {
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 4,
|
|
}, {
|
|
// 6th slot entry: 5rd PCI slot
|
|
.dev = 6<<3,
|
|
.links = {
|
|
{.link = 0x61, .bitmap = 0xdef8}, // INTA#
|
|
{.link = 0x62, .bitmap = 0xdef8}, // INTB#
|
|
{.link = 0x63, .bitmap = 0xdef8}, // INTC#
|
|
{.link = 0x60, .bitmap = 0xdef8}, // INTD#
|
|
},
|
|
.slot_nr = 5,
|
|
},
|
|
}
|
|
};
|
|
#endif // CONFIG_PIRTABLE && !CONFIG_COREBOOT
|
|
|
|
void
|
|
create_pirtable()
|
|
{
|
|
if (! CONFIG_PIRTABLE)
|
|
return;
|
|
|
|
dprintf(3, "init PIR table\n");
|
|
|
|
PIR_TABLE.pir.signature = PIR_SIGNATURE;
|
|
PIR_TABLE.pir.checksum = -checksum((u8*)&PIR_TABLE, sizeof(PIR_TABLE));
|
|
PirOffset = (u32)&PIR_TABLE.pir - BUILD_BIOS_ADDR;
|
|
}
|