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pci: refactor the pci_config_*() functions 

Split out the Standard PCI Configuration Access Mechanism
pci_ioconfig_*() functions from the pci_config_*() functions.
The standard PCI CAM functions will be used in the next patch.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
This commit is contained in:
Volker Rümelin 2022-04-02 20:28:38 +02:00 committed by Kevin O'Connor
parent d239552ce7
commit d24f42b0d8
2 changed files with 53 additions and 13 deletions
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54
src/hw/pci.c
View File

@ -26,63 +26,93 @@ static u32 ioconfig_cmd(u16 bdf, u32 addr)
return 0x80000000 | (bdf << 8) | (addr & 0xfc);
}
void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outl(val, PORT_PCI_DATA);
}
void pci_config_writel(u16 bdf, u32 addr, u32 val)
{
if (!MODESEGMENT && mmconfig) {
writel(mmconfig_addr(bdf, addr), val);
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outl(val, PORT_PCI_DATA);
pci_ioconfig_writel(bdf, addr, val);
}
}
void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outw(val, PORT_PCI_DATA + (addr & 2));
}
void pci_config_writew(u16 bdf, u32 addr, u16 val)
{
if (!MODESEGMENT && mmconfig) {
writew(mmconfig_addr(bdf, addr), val);
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outw(val, PORT_PCI_DATA + (addr & 2));
pci_ioconfig_writew(bdf, addr, val);
}
}
void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outb(val, PORT_PCI_DATA + (addr & 3));
}
void pci_config_writeb(u16 bdf, u32 addr, u8 val)
{
if (!MODESEGMENT && mmconfig) {
writeb(mmconfig_addr(bdf, addr), val);
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
outb(val, PORT_PCI_DATA + (addr & 3));
pci_ioconfig_writeb(bdf, addr, val);
}
}
u32 pci_ioconfig_readl(u16 bdf, u32 addr)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inl(PORT_PCI_DATA);
}
u32 pci_config_readl(u16 bdf, u32 addr)
{
if (!MODESEGMENT && mmconfig) {
return readl(mmconfig_addr(bdf, addr));
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inl(PORT_PCI_DATA);
return pci_ioconfig_readl(bdf, addr);
}
}
u16 pci_ioconfig_readw(u16 bdf, u32 addr)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inw(PORT_PCI_DATA + (addr & 2));
}
u16 pci_config_readw(u16 bdf, u32 addr)
{
if (!MODESEGMENT && mmconfig) {
return readw(mmconfig_addr(bdf, addr));
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inw(PORT_PCI_DATA + (addr & 2));
return pci_ioconfig_readw(bdf, addr);
}
}
u8 pci_ioconfig_readb(u16 bdf, u32 addr)
{
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inb(PORT_PCI_DATA + (addr & 3));
}
u8 pci_config_readb(u16 bdf, u32 addr)
{
if (!MODESEGMENT && mmconfig) {
return readb(mmconfig_addr(bdf, addr));
} else {
outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
return inb(PORT_PCI_DATA + (addr & 3));
return pci_ioconfig_readb(bdf, addr);
}
}

12
src/hw/pci.h
View File

@ -32,6 +32,15 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) {
; BDF >= 0 \
; BDF=pci_next(BDF, (BUS)))
// standard PCI configration access mechanism
void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val);
void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val);
void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val);
u32 pci_ioconfig_readl(u16 bdf, u32 addr);
u16 pci_ioconfig_readw(u16 bdf, u32 addr);
u8 pci_ioconfig_readb(u16 bdf, u32 addr);
// PCI configuration access using either PCI CAM or PCIe ECAM
void pci_config_writel(u16 bdf, u32 addr, u32 val);
void pci_config_writew(u16 bdf, u32 addr, u16 val);
void pci_config_writeb(u16 bdf, u32 addr, u8 val);
@ -39,9 +48,10 @@ u32 pci_config_readl(u16 bdf, u32 addr);
u16 pci_config_readw(u16 bdf, u32 addr);
u8 pci_config_readb(u16 bdf, u32 addr);
void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on);
void pci_enable_mmconfig(u64 addr, const char *name);
u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap);
int pci_next(int bdf, int bus);
void pci_enable_mmconfig(u64 addr, const char *name);
int pci_probe_host(void);
void pci_reboot(void);