diff --git a/sc7280/boot/Pmic.bin b/sc7280/boot/Pmic.bin index 25a65b4..93fd0ee 100644 Binary files a/sc7280/boot/Pmic.bin and b/sc7280/boot/Pmic.bin differ diff --git a/sc7280/boot/QcLib.elf b/sc7280/boot/QcLib.elf index 423dffc..7ae81ff 100644 Binary files a/sc7280/boot/QcLib.elf and b/sc7280/boot/QcLib.elf differ diff --git a/sc7280/boot/Release_Notes.txt b/sc7280/boot/Release_Notes.txt index 0718f2b..3ea9a98 100644 --- a/sc7280/boot/Release_Notes.txt +++ b/sc7280/boot/Release_Notes.txt @@ -1,3 +1,29 @@ +================== Release 00030 ================================ +This Release Notes file covers these blobs: + * dcb.bin + * Pmic.bin + * QcLib.elf + +Version : 00030 + +Release Date : Apr, 2022 + +Supported Silicon : SC7280 + +Changes since last version: + * KPDPWR interrupt supporting at DC stage + * KPDPWR interrupt set to Falling Edge triggered. + * CBMEM logs missing over warm-boot due to buffer not suficient. + * Modified WARM_RESET_COUNT clearing to 0 as 'unconditional' in every PSI-Load + * sc7280: Thunderhill Vout needs to be bumped-up to 3.7V on CRD-Platforms + +Above Bins were used to generate coreboot image. + +No special instructions, requirements or dependencies, files must be +present in this folder to be pulled in during coreboot build + +Errata : Nothing to report + ================== Release 00020 ================================ This Release Notes file covers these blobs: * dcb.bin diff --git a/sc7280/shrm/Release_Notes.txt b/sc7280/shrm/Release_Notes.txt index 82559d5..c33a71d 100644 --- a/sc7280/shrm/Release_Notes.txt +++ b/sc7280/shrm/Release_Notes.txt @@ -1,3 +1,27 @@ +================== Release 00030 ================================ +This Release Notes file covers these blobs: + * shrm.elf + +Version : 00030 + +Release Date : Apr, 2022 + +Supported Silicon : SC7280 + +Changes since last version: + * KPDPWR interrupt supporting at DC stage + * KPDPWR interrupt set to Falling Edge triggered. + * CBMEM logs missing over warm-boot due to buffer not suficient. + * Modified WARM_RESET_COUNT clearing to 0 as 'unconditional' in every PSI-Load + * sc7280: Thunderhill Vout needs to be bumped-up to 3.7V on CRD-Platforms + +Above Bins were used to generate coreboot image. + +No special instructions, requirements or dependencies, files must be +present in this folder to be pulled in during coreboot build + +Errata : Nothing to report + ================== Release 00020 ================================ This Release Notes file covers these blobs: * shrm.elf diff --git a/sc7280/shrm/shrm.elf b/sc7280/shrm/shrm.elf index 57666a0..6f3bdb8 100644 Binary files a/sc7280/shrm/shrm.elf and b/sc7280/shrm/shrm.elf differ