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include: Make sbi_current_hartid() as macro in riscv_asm.h 

The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel 2020-03-12 10:21:25 +05:30 committed by Anup Patel
parent 16e7071f6d
commit 823345ecae
20 changed files with 49 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/sbi/riscv_asm.h
View File

@ -157,6 +157,8 @@ void csr_write_num(int csr_num, unsigned long val);
__asm__ __volatile__("wfi" ::: "memory"); \
} while (0)
/* Get current HART id */
#define current_hartid() ((unsigned int)csr_read(CSR_MHARTID))
/* determine CPU extension, return non-zero support */
int misa_extension_imp(char ext);

2
include/sbi/sbi_hart.h
View File

@ -32,6 +32,4 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
unsigned long next_addr, unsigned long next_mode,
bool next_virt);
u32 sbi_current_hartid(void);
#endif

3
lib/sbi/sbi_ecall_legacy.c
View File

@ -8,6 +8,7 @@
* Atish Patra <atish.patra@wdc.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_ecall.h>
#include <sbi/sbi_ecall_interface.h>
@ -46,7 +47,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
{
int ret = 0;
struct sbi_tlb_info tlb_info;
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
ulong hmask = 0;
switch (extid) {

4
lib/sbi/sbi_ecall_replace.c
View File

@ -8,6 +8,7 @@
* Atish Patra <atish.patra@wdc.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/sbi_ecall.h>
#include <sbi/sbi_ecall_interface.h>
#include <sbi/sbi_error.h>
@ -15,7 +16,6 @@
#include <sbi/sbi_ipi.h>
#include <sbi/sbi_timer.h>
#include <sbi/sbi_tlb.h>
#include <sbi/riscv_asm.h>
static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
unsigned long extid, unsigned long funcid,
@ -50,7 +50,7 @@ static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
{
int ret = 0;
struct sbi_tlb_info tlb_info;
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)

8
lib/sbi/sbi_hart.c
View File

@ -17,14 +17,6 @@
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
/**
* Return HART ID of the caller.
*/
unsigned int sbi_current_hartid()
{
return (u32)csr_read(CSR_MHARTID);
}
static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
{
const struct sbi_platform *plat = sbi_platform_ptr(scratch);

4
lib/sbi/sbi_hsm.c
View File

@ -204,7 +204,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
fail_exit:
/* It should never reach here */
sbi_printf("ERR: Failed stop hart [%u]\n", sbi_current_hartid());
sbi_printf("ERR: Failed stop hart [%u]\n", current_hartid());
sbi_hart_hang();
}
@ -256,7 +256,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
{
int oldstate;
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
hart_data_offset);

4
lib/sbi/sbi_init.c
View File

@ -273,7 +273,7 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
void __noreturn sbi_init(struct sbi_scratch *scratch)
{
bool coldboot = FALSE;
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
@ -316,7 +316,7 @@ unsigned long sbi_init_count(u32 hartid)
*/
void __noreturn sbi_exit(struct sbi_scratch *scratch)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
if (sbi_platform_hart_disabled(plat, hartid))

2
lib/sbi/sbi_ipi.c
View File

@ -176,7 +176,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
struct sbi_ipi_data *ipi_data =
sbi_scratch_offset_ptr(scratch, ipi_data_off);
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
sbi_platform_ipi_clear(plat, hartid);
ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);

13
lib/sbi/sbi_system.c
View File

@ -8,6 +8,7 @@
* Nick Kossifidis <mick@ics.forth.gr>
*/
#include <sbi/riscv_asm.h>
#include <sbi/sbi_bitops.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_hsm.h>
@ -39,12 +40,12 @@ void sbi_system_final_exit(struct sbi_scratch *scratch)
void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
{
ulong hbase = 0, hmask;
u32 current_hartid = sbi_current_hartid();
u32 cur_hartid = current_hartid();
/* Send HALT IPI to every hart other than the current hart */
while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
if (hbase <= current_hartid)
hmask &= ~(1UL << (current_hartid - hbase));
if (hbase <= cur_hartid)
hmask &= ~(1UL << (cur_hartid - hbase));
if (hmask)
sbi_ipi_send_halt(scratch, hmask, hbase);
hbase += BITS_PER_LONG;
@ -63,12 +64,12 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
{
ulong hbase = 0, hmask;
u32 current_hartid = sbi_current_hartid();
u32 cur_hartid = current_hartid();
/* Send HALT IPI to every hart other than the current hart */
while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
if (hbase <= current_hartid)
hmask &= ~(1UL << (current_hartid - hbase));
if (hbase <= cur_hartid)
hmask &= ~(1UL << (cur_hartid - hbase));
if (hmask)
sbi_ipi_send_halt(scratch, hmask, hbase);
hbase += BITS_PER_LONG;

2
lib/sbi/sbi_tlb.c
View File

@ -319,7 +319,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
int ret;
struct sbi_fifo *tlb_fifo_r;
struct sbi_tlb_info *tinfo = data;
u32 curr_hartid = sbi_current_hartid();
u32 curr_hartid = current_hartid();
/*
* If address range to flush is too big then simply

2
lib/sbi/sbi_trap.c
View File

@ -217,7 +217,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
{
int rc = SBI_ENOTSUPP;
const char *msg = "trap handler failed";
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
ulong mcause = csr_read(CSR_MCAUSE);
ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
struct sbi_trap_info trap, *uptrap;

12
lib/utils/sys/clint.c
View File

@ -7,9 +7,9 @@
* Anup Patel <anup.patel@wdc.com>
*/
#include <sbi/riscv_io.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_atomic.h>
#include <sbi/sbi_hart.h>
#include <sbi/riscv_io.h>
#include <sbi_utils/sys/clint.h>
static u32 clint_ipi_hart_count;
@ -36,7 +36,7 @@ void clint_ipi_clear(u32 target_hart)
int clint_warm_ipi_init(void)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (!clint_ipi_base)
return -1;
@ -105,7 +105,7 @@ u64 clint_timer_value(void)
void clint_timer_event_stop(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (clint_time_hart_count <= target_hart)
return;
@ -116,7 +116,7 @@ void clint_timer_event_stop(void)
void clint_timer_event_start(u64 next_event)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (clint_time_hart_count <= target_hart)
return;
@ -127,7 +127,7 @@ void clint_timer_event_start(u64 next_event)
int clint_warm_timer_init(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (clint_time_hart_count <= target_hart || !clint_time_base)
return -1;

4
platform/andes/ae350/platform.c
View File

@ -8,9 +8,9 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_console.h>
#include <sbi_utils/serial/uart8250.h>
@ -94,7 +94,7 @@ static int ae350_console_init(void)
/* Initialize the platform interrupt controller for current HART. */
static int ae350_irqchip_init(bool cold_boot)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
int ret;
if (cold_boot) {

12
platform/andes/ae350/plicsw.c
View File

@ -8,9 +8,9 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/sbi_types.h>
#include <sbi/sbi_hart.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_types.h>
#include "plicsw.h"
#include "platform.h"
@ -19,7 +19,7 @@ static struct plicsw plicsw_dev[AE350_HART_COUNT];
static inline void plicsw_claim(void)
{
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
plicsw_dev[source_hart].source_id =
readl(plicsw_dev[source_hart].plicsw_claim);
@ -27,7 +27,7 @@ static inline void plicsw_claim(void)
static inline void plicsw_complete(void)
{
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
u32 source = plicsw_dev[source_hart].source_id;
writel(source, plicsw_dev[source_hart].plicsw_claim);
@ -61,7 +61,7 @@ static inline void plic_sw_pending(u32 target_hart)
* The bit 5 is used to send IPI to hart 2
* The bit 4 is used to send IPI to hart 3
*/
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
u32 target_offset = (PLICSW_PENDING_PER_HART - 1) - target_hart;
u32 per_hart_offset = PLICSW_PENDING_PER_HART * source_hart;
u32 val = 1 << target_offset << per_hart_offset;
@ -90,7 +90,7 @@ void plicsw_ipi_clear(u32 target_hart)
int plicsw_warm_ipi_init(void)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (!plicsw_dev[hartid].plicsw_pending
&& !plicsw_dev[hartid].plicsw_enable

8
platform/andes/ae350/plmt.c
View File

@ -8,8 +8,8 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_hart.h>
static u32 plmt_time_hart_count;
static volatile void *plmt_time_base;
@ -34,7 +34,7 @@ u64 plmt_timer_value(void)
void plmt_timer_event_stop(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart)
return;
@ -50,7 +50,7 @@ void plmt_timer_event_stop(void)
void plmt_timer_event_start(u64 next_event)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart)
return;
@ -70,7 +70,7 @@ void plmt_timer_event_start(u64 next_event)
int plmt_warm_timer_init(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart || !plmt_time_base)
return -1;

3
platform/ariane-fpga/platform.c
View File

@ -4,6 +4,7 @@
* Panagiotis Peristerakis <perister@ics.forth.gr>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_platform.h>
@ -105,7 +106,7 @@ static int plic_ariane_warm_irqchip_init(u32 target_hart,
*/
static int ariane_irqchip_init(bool cold_boot)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
int ret;
if (cold_boot) {

4
platform/kendryte/k210/platform.c
View File

@ -7,9 +7,9 @@
* Damien Le Moal <damien.lemoal@wdc.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_console.h>
#include <sbi_utils/irqchip/plic.h>
@ -55,7 +55,7 @@ static int k210_console_init(void)
static int k210_irqchip_init(bool cold_boot)
{
int rc;
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,

3
platform/qemu/virt/platform.c
View File

@ -8,6 +8,7 @@
* Nick Kossifidis <mick@ics.forth.gr>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_const.h>
@ -84,7 +85,7 @@ static int virt_console_init(void)
static int virt_irqchip_init(bool cold_boot)
{
int rc;
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(

6
platform/sifive/fu540/platform.c
View File

@ -9,12 +9,12 @@
#include <libfdt.h>
#include <fdt.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_platform.h>
#include <sbi/riscv_io.h>
#include <sbi_utils/irqchip/plic.h>
#include <sbi_utils/serial/sifive-uart.h>
#include <sbi_utils/sys/clint.h>
@ -148,7 +148,7 @@ static int fu540_console_init(void)
static int fu540_irqchip_init(bool cold_boot)
{
int rc;
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,

3
platform/template/platform.c
View File

@ -4,6 +4,7 @@
* Copyright (c) 2019 Western Digital Corporation or its affiliates.
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_platform.h>
@ -82,7 +83,7 @@ static int platform_console_getc(void)
*/
static int platform_irqchip_init(bool cold_boot)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
int ret;
/* Example if the generic PLIC driver is used */