331 lines
13 KiB
Ada
331 lines
13 KiB
Ada
--
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-- Copyright (C) 2015-2016 secunet Security Networks AG
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; version 2 of the License.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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with HW.Time;
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with HW.Debug;
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with GNAT.Source_Info;
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with HW.GFX.GMA.Config;
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with HW.GFX.GMA.Registers;
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use type HW.Word8;
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use type HW.GFX.GMA.Registers.Registers_Invalid_Index;
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package body HW.GFX.GMA.DP_Aux_Request is
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DP_AUX_CTL_SEND_BUSY : constant := 1 * 2 ** 31;
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DP_AUX_CTL_DONE : constant := 1 * 2 ** 30;
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DP_AUX_CTL_INTERRUPT_ON_DONE : constant := 1 * 2 ** 29;
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DP_AUX_CTL_TIME_OUT_ERROR : constant := 1 * 2 ** 28;
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DP_AUX_CTL_TIME_OUT_TIMER_MASK : constant := 3 * 2 ** 26;
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DP_AUX_CTL_TIME_OUT_TIMER_400US : constant := 0 * 2 ** 26;
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DP_AUX_CTL_TIME_OUT_TIMER_600US : constant := 1 * 2 ** 26;
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DP_AUX_CTL_TIME_OUT_TIMER_800US : constant := 2 * 2 ** 26;
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DP_AUX_CTL_TIME_OUT_TIMER_1600US : constant := 3 * 2 ** 26;
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DP_AUX_CTL_RECEIVE_ERROR : constant := 1 * 2 ** 25;
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DP_AUX_CTL_MESSAGE_SIZE_MASK : constant := 31 * 2 ** 20;
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DP_AUX_CTL_MESSAGE_SIZE_SHIFT : constant := 2 ** 20;
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DP_AUX_CTL_PRECHARGE_TIME_MASK : constant := 15 * 2 ** 16;
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DP_AUX_CTL_PRECHARGE_TIME_SHIFT : constant := 2 ** 16;
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DP_AUX_CTL_2X_BIT_CLOCK_DIV_MASK : constant := 2047 * 2 ** 0;
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-- TODO: 2x bit clock divider should be programmed once before any training.
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subtype DP_AUX_CTL_MESSAGE_SIZE_T is Natural range 1 .. 20;
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function DP_AUX_CTL_MESSAGE_SIZE
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(Message_Length : DP_AUX_CTL_MESSAGE_SIZE_T)
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return Word32;
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DDI_AUX_MUTEX_MUTEX_ENABLE : constant := 1 * 2 ** 31;
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DDI_AUX_MUTEX_MUTEX_STATUS : constant := 1 * 2 ** 30;
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type AUX_CH_Data_Regs is new Positive range 1 .. 5;
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type AUX_CH_Data_Regs_Array is
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array (AUX_CH_Data_Regs) of Registers.Registers_Index;
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type AUX_CH_Registers is record
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CTL : Registers.Registers_Index;
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DATA : AUX_CH_Data_Regs_Array;
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MUTEX : Registers.Registers_Invalid_Index;
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end record;
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type AUX_CH_Registers_Array is array (DP_Port) of AUX_CH_Registers;
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AUX_CH : constant AUX_CH_Registers_Array :=
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(if Config.Has_PCH_Aux_Channels then
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AUX_CH_Registers_Array'
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(DP_A => AUX_CH_Registers'
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(CTL => Registers.DP_AUX_CTL_A,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.DP_AUX_DATA_A_1,
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2 => Registers.DP_AUX_DATA_A_2,
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3 => Registers.DP_AUX_DATA_A_3,
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4 => Registers.DP_AUX_DATA_A_4,
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5 => Registers.DP_AUX_DATA_A_5),
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MUTEX => Registers.Invalid_Register),
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DP_B => AUX_CH_Registers'
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(CTL => Registers.PCH_DP_AUX_CTL_B,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.PCH_DP_AUX_DATA_B_1,
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2 => Registers.PCH_DP_AUX_DATA_B_2,
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3 => Registers.PCH_DP_AUX_DATA_B_3,
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4 => Registers.PCH_DP_AUX_DATA_B_4,
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5 => Registers.PCH_DP_AUX_DATA_B_5),
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MUTEX => Registers.Invalid_Register),
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DP_C => AUX_CH_Registers'
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(CTL => Registers.PCH_DP_AUX_CTL_C,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.PCH_DP_AUX_DATA_C_1,
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2 => Registers.PCH_DP_AUX_DATA_C_2,
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3 => Registers.PCH_DP_AUX_DATA_C_3,
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4 => Registers.PCH_DP_AUX_DATA_C_4,
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5 => Registers.PCH_DP_AUX_DATA_C_5),
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MUTEX => Registers.Invalid_Register),
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DP_D => AUX_CH_Registers'
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(CTL => Registers.PCH_DP_AUX_CTL_D,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.PCH_DP_AUX_DATA_D_1,
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2 => Registers.PCH_DP_AUX_DATA_D_2,
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3 => Registers.PCH_DP_AUX_DATA_D_3,
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4 => Registers.PCH_DP_AUX_DATA_D_4,
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5 => Registers.PCH_DP_AUX_DATA_D_5),
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MUTEX => Registers.Invalid_Register))
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else
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AUX_CH_Registers_Array'
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(DP_A => AUX_CH_Registers'
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(CTL => Registers.DDI_AUX_CTL_A,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.DDI_AUX_DATA_A_1,
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2 => Registers.DDI_AUX_DATA_A_2,
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3 => Registers.DDI_AUX_DATA_A_3,
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4 => Registers.DDI_AUX_DATA_A_4,
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5 => Registers.DDI_AUX_DATA_A_5),
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MUTEX => Registers.DDI_AUX_MUTEX_A),
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DP_B => AUX_CH_Registers'
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(CTL => Registers.DDI_AUX_CTL_B,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.DDI_AUX_DATA_B_1,
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2 => Registers.DDI_AUX_DATA_B_2,
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3 => Registers.DDI_AUX_DATA_B_3,
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4 => Registers.DDI_AUX_DATA_B_4,
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5 => Registers.DDI_AUX_DATA_B_5),
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MUTEX => Registers.DDI_AUX_MUTEX_B),
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DP_C => AUX_CH_Registers'
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(CTL => Registers.DDI_AUX_CTL_C,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.DDI_AUX_DATA_C_1,
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2 => Registers.DDI_AUX_DATA_C_2,
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3 => Registers.DDI_AUX_DATA_C_3,
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4 => Registers.DDI_AUX_DATA_C_4,
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5 => Registers.DDI_AUX_DATA_C_5),
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MUTEX => Registers.DDI_AUX_MUTEX_C),
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DP_D => AUX_CH_Registers'
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(CTL => Registers.DDI_AUX_CTL_D,
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DATA => AUX_CH_Data_Regs_Array'
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(1 => Registers.DDI_AUX_DATA_D_1,
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2 => Registers.DDI_AUX_DATA_D_2,
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3 => Registers.DDI_AUX_DATA_D_3,
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4 => Registers.DDI_AUX_DATA_D_4,
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5 => Registers.DDI_AUX_DATA_D_5),
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MUTEX => Registers.DDI_AUX_MUTEX_D)));
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----------------------------------------------------------------------------
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function DP_AUX_CTL_MESSAGE_SIZE
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(Message_Length : DP_AUX_CTL_MESSAGE_SIZE_T)
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return Word32
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is
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begin
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return Word32 (Message_Length) * DP_AUX_CTL_MESSAGE_SIZE_SHIFT;
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end DP_AUX_CTL_MESSAGE_SIZE;
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----------------------------------------------------------------------------
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procedure Aux_Request_Low
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(Port : in DP_Port;
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Request : in DP_Defs.Aux_Request;
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Request_Length : in DP_Defs.Aux_Request_Length;
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Response : out DP_Defs.Aux_Response;
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Response_Length : out DP_Defs.Aux_Response_Length;
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Success : out Boolean)
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with
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Global => (In_Out => Registers.Register_State,
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Input => Time.State),
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Depends =>
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((Registers.Register_State,
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Response,
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Response_Length,
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Success)
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=>
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(Registers.Register_State,
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Time.State,
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Port,
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Request,
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Request_Length))
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is
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procedure Write_Data_Reg
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(Register : in Registers.Registers_Index;
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Buf : in DP_Defs.Aux_Request;
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Length : in DP_Defs.Aux_Request_Length;
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Offset : in DP_Defs.Aux_Request_Index)
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is
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Value : Word32;
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Count : Natural;
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begin
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if Offset < Length then
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if Length - Offset > 4 then
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Count := 4;
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else
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Count := Length - Offset;
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end if;
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Value := 0;
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for Idx in DP_Defs.Aux_Request_Index range 0 .. Count - 1 loop
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Value := Value or
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Shift_Left (Word32 (Buf (Offset + Idx)), (3 - Idx) * 8);
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end loop;
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Registers.Write (Register => Register, Value => Value);
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end if;
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end Write_Data_Reg;
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procedure Read_Data_Reg
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(Register : in Registers.Registers_Index;
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Buf : in out DP_Defs.Aux_Response;
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Length : in DP_Defs.Aux_Response_Length;
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Offset : in DP_Defs.Aux_Response_Index)
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is
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Value : Word32;
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Count : DP_Defs.Aux_Response_Length;
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begin
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if Offset < Length then
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if Length - Offset > 4 then
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Count := 4;
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else
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Count := Length - Offset;
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end if;
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Registers.Read (Register => Register, Value => Value);
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for Idx in 0 .. Count - 1 loop
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Buf (Offset + Idx) :=
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Word8 (Shift_Right (Value, (3 - Idx) * 8) and 16#ff#);
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end loop;
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end if;
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end Read_Data_Reg;
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Busy : Boolean;
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Status : Word32;
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begin
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Response := (others => 0); -- Don't care
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Response_Length := DP_Defs.Aux_Response_Length'First;
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if Config.Need_DP_Aux_Mutex then
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Registers.Set_Mask
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(Register => AUX_CH (Port).MUTEX,
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Mask => DDI_AUX_MUTEX_MUTEX_ENABLE);
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Registers.Wait_Set_Mask
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(Register => AUX_CH (Port).MUTEX,
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Mask => DDI_AUX_MUTEX_MUTEX_STATUS);
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end if;
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Registers.Is_Set_Mask
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(Register => AUX_CH (Port).CTL,
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Mask => DP_AUX_CTL_SEND_BUSY,
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Result => Busy);
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if Busy then
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Success := False;
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else
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for Idx in AUX_CH_Data_Regs loop
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Write_Data_Reg
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(Register => AUX_CH (Port).DATA (Idx),
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Buf => Request,
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Length => Request_Length,
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Offset => (Natural (Idx) - 1) * 4);
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end loop;
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Registers.Unset_And_Set_Mask
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(Register => AUX_CH (Port).CTL,
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Mask_Unset => DP_AUX_CTL_INTERRUPT_ON_DONE or
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DP_AUX_CTL_TIME_OUT_TIMER_MASK or
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DP_AUX_CTL_MESSAGE_SIZE_MASK,
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Mask_Set => DP_AUX_CTL_SEND_BUSY or -- starts transfer
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DP_AUX_CTL_DONE or -- clears the status
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DP_AUX_CTL_TIME_OUT_ERROR or -- clears the status
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DP_AUX_CTL_RECEIVE_ERROR or -- clears the status
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DP_AUX_CTL_TIME_OUT_TIMER_600US or
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DP_AUX_CTL_MESSAGE_SIZE (Request_Length));
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Registers.Wait_Unset_Mask
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(Register => AUX_CH (Port).CTL,
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Mask => DP_AUX_CTL_SEND_BUSY);
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Registers.Read (Register => AUX_CH (Port).CTL, Value => Status);
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Success := (Status and
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(DP_AUX_CTL_TIME_OUT_ERROR or DP_AUX_CTL_RECEIVE_ERROR))
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= 0;
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if Success then
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Status := (Status and DP_AUX_CTL_MESSAGE_SIZE_MASK)
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/ DP_AUX_CTL_MESSAGE_SIZE_SHIFT;
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if Natural (Status) < DP_Defs.Aux_Response_Length'First then
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Success := False;
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elsif Natural (Status) > DP_Defs.Aux_Response_Length'Last then
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Response_Length := DP_Defs.Aux_Response_Length'Last;
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else
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Response_Length := Natural (Status);
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end if;
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end if;
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if Success then
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for Idx in AUX_CH_Data_Regs loop
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Read_Data_Reg
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(Register => AUX_CH (Port).DATA (Idx),
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Buf => Response,
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Length => Response_Length,
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Offset => (Natural (Idx) - 1) * 4);
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end loop;
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end if;
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end if;
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if Config.Need_DP_Aux_Mutex then
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Registers.Unset_And_Set_Mask
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(Register => AUX_CH (Port).MUTEX,
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Mask_Unset => DDI_AUX_MUTEX_MUTEX_ENABLE,
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Mask_Set => DDI_AUX_MUTEX_MUTEX_STATUS); -- frees the mutex
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end if;
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end Aux_Request_Low;
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----------------------------------------------------------------------------
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procedure Do_Aux_Request
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(Port : in DP_Port;
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Request : in DP_Defs.Aux_Request;
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Request_Length : in DP_Defs.Aux_Request_Length;
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Response : out DP_Defs.Aux_Response;
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Response_Length : out DP_Defs.Aux_Response_Length;
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Success : out Boolean)
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is
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begin
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for Try in Positive range 1 .. 3 loop
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Aux_Request_Low
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(Port => Port,
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Request => Request,
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Request_Length => Request_Length,
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Response => Response,
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Response_Length => Response_Length,
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Success => Success);
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exit when Success;
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end loop;
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end Do_Aux_Request;
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end HW.GFX.GMA.DP_Aux_Request;
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