193 lines
4.7 KiB
C
193 lines
4.7 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2005 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/smbus_def.h>
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#define SMBHSTSTAT 0x0
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#define SMBSLVSTAT 0x1
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#define SMBHSTCTRL 0x2
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#define SMBHSTCMD 0x3
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#define SMBHSTADDR 0x4
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#define SMBHSTDAT0 0x5
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#define SMBHSTDAT1 0x6
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#define SMBHSTBLKDAT 0x7
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#define SMBSLVCTRL 0x8
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#define SMBSLVCMD_SHADOW 0x9
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#define SMBSLVEVT 0xa
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#define SMBSLVDAT 0xc
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/* Between 1-10 seconds, We should never timeout normally
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* Longer than this is just painful when a timeout condition occurs.
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*/
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#define SMBUS_TIMEOUT (100*1000*10)
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static inline void smbus_delay(void)
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{
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outb(0x80, 0x80);
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}
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static int smbus_wait_until_ready(unsigned smbus_io_base)
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{
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unsigned long loops;
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loops = SMBUS_TIMEOUT;
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do {
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unsigned char val;
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val = inb(smbus_io_base + SMBHSTSTAT);
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val &= 0x1f;
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if (val == 0) { // ready now
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return 0;
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}
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outb(val, smbus_io_base + SMBHSTSTAT);
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} while (--loops);
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return -2; // time out
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}
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static int smbus_wait_until_done(unsigned smbus_io_base)
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{
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unsigned long loops;
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loops = SMBUS_TIMEOUT;
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do {
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unsigned char val;
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val = inb(smbus_io_base + SMBHSTSTAT);
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val &= 0x1f; // mask off reserved bits
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if ( val & 0x1c) {
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return -5; // error
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}
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if ( val == 0x02) {
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outb(val, smbus_io_base + SMBHSTSTAT); // clear status
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return 0; //
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}
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} while (--loops);
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return -3; // timeout
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}
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static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
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{
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uint8_t byte;
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if (smbus_wait_until_ready(smbus_io_base) < 0) {
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return -2; // not ready
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}
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/* set the device I'm talking to */
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outb(((device & 0x7f) << 1)|1 , smbus_io_base + SMBHSTADDR);
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byte = inb(smbus_io_base + SMBHSTCTRL);
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byte &= 0xe3; // Clear [4:2]
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byte |= (1<<2) | (1<<6); // Byte data read/write command, start the command
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outb(byte, smbus_io_base + SMBHSTCTRL);
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/* poll for transaction completion */
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if (smbus_wait_until_done(smbus_io_base) < 0) {
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return -3; // timeout or error
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}
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/* read results of transaction */
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byte = inb(smbus_io_base + SMBHSTCMD);
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return byte;
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}
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static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned char val)
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{
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uint8_t byte;
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if (smbus_wait_until_ready(smbus_io_base) < 0) {
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return -2; // not ready
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}
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/* set the command... */
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outb(val, smbus_io_base + SMBHSTCMD);
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/* set the device I'm talking to */
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outb(((device & 0x7f) << 1)|0 , smbus_io_base + SMBHSTADDR);
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byte = inb(smbus_io_base + SMBHSTCTRL);
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byte &= 0xe3; // Clear [4:2]
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byte |= (1<<2) | (1<<6); // Byte data read/write command, start the command
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outb(byte, smbus_io_base + SMBHSTCTRL);
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/* poll for transaction completion */
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if (smbus_wait_until_done(smbus_io_base) < 0) {
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return -3; // timeout or error
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}
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return 0;
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}
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static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address)
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{
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uint8_t byte;
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if (smbus_wait_until_ready(smbus_io_base) < 0) {
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return -2; // not ready
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}
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/* set the command/address... */
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outb(address & 0xff, smbus_io_base + SMBHSTCMD);
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/* set the device I'm talking to */
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outb(((device & 0x7f) << 1)|1 , smbus_io_base + SMBHSTADDR);
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byte = inb(smbus_io_base + SMBHSTCTRL);
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byte &= 0xe3; // Clear [4:2]
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byte |= (1<<3) | (1<<6); // Byte data read/write command, start the command
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outb(byte, smbus_io_base + SMBHSTCTRL);
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/* poll for transaction completion */
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if (smbus_wait_until_done(smbus_io_base) < 0) {
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return -3; // timeout or error
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}
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/* read results of transaction */
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byte = inb(smbus_io_base + SMBHSTDAT0);
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return byte;
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}
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static int do_smbus_write_byte(unsigned smbus_io_base, unsigned device, unsigned address, unsigned char val)
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{
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uint8_t byte;
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if (smbus_wait_until_ready(smbus_io_base) < 0) {
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return -2; // not ready
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}
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/* set the command/address... */
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outb(address & 0xff, smbus_io_base + SMBHSTCMD);
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/* set the device I'm talking to */
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outb(((device & 0x7f) << 1)|0 , smbus_io_base + SMBHSTADDR);
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/* output value */
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outb(val, smbus_io_base + SMBHSTDAT0);
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byte = inb(smbus_io_base + SMBHSTCTRL);
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byte &= 0xe3; // Clear [4:2]
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byte |= (1<<3) | (1<<6); // Byte data read/write command, start the command
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outb(byte, smbus_io_base + SMBHSTCTRL);
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/* poll for transaction completion */
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if (smbus_wait_until_done(smbus_io_base) < 0) {
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return -3; // timeout or error
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}
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return 0;
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}
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