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soc/intel/cannonlake: Disable CPU ratio override 

Disable CPU Ratio override as input to FSP Memory init.

Change-Id: I4a1df15c619038f17c1bef5b7f53d322e352c56b
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lijian Zhao 2017-09-26 13:56:24 -07:00 committed by Aaron Durbin
parent 5d11cc9d7e
commit ed3e6b8b94
1 changed files with 2 additions and 0 deletions
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src/soc/intel/cannonlake/romstage/romstage.c
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@ -86,6 +86,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
m_cfg->PcieRpEnableMask = mask;
m_cfg->PrmrrSize = config->PrmrrSize;
m_cfg->EnableC6Dram = config->enable_c6dram;
/* Disable Cpu Ratio Override temporary. */
m_cfg->CpuRatio = 0;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)