Fix double inclusion of toplevel Makefile.inc

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2011-03-01 08:09:22 +00:00 committed by Patrick Georgi
parent 11ac1cfaa3
commit e38d0a6743
1 changed files with 6 additions and 3 deletions

View File

@ -44,6 +44,9 @@ export objk := $(objutil)/kconfig
export KCONFIG_AUTOHEADER := $(obj)/config.h
export KCONFIG_AUTOCONFIG := $(obj)/auto.conf
# directory containing the toplevel Makefile.inc
TOPLEVEL := .
CONFIG_SHELL := sh
KBUILD_DEFCONFIG := configs/defconfig
UNAME_RELEASE := $(shell uname -r)
@ -73,9 +76,8 @@ DOXYGEN_OUTPUT_DIR := doxygen
all: real-all
# This include must come _before_ he pattern rules below!
# This include must come _before_ the pattern rules below!
# Order _does_ matter for pattern rules.
include Makefile.inc
include util/kconfig/Makefile
# Three cases where we don't need fully populated $(obj) lists:
@ -93,6 +95,7 @@ endif
endif
ifeq ($(NOCOMPILE),1)
include $(TOPLEVEL)/Makefile.inc
real-all: config
else
@ -189,7 +192,7 @@ evaluate_subdirs= \
$(if $(subdirs),$(eval $(call evaluate_subdirs)))
# collect all object files eligible for building
subdirs:=.
subdirs:=$(TOPLEVEL)
$(eval $(call evaluate_subdirs))
src-to-obj=$(addsuffix .$(1).o, $(basename $(patsubst src/%, $(obj)/%, $($(1)-srcs))))