From 467a87abcea13a1b0b61223a175cf46b16474965 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 22 Jul 2017 21:39:48 -0600 Subject: [PATCH] Fix files with multiple newlines at the end. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iaab26033e947cb9cf299faf1ce6d40a90a9facbe Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20704 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel --- .checkpatch.conf | 1 - src/arch/x86/include/arch/pirq_routing.h | 1 - src/cpu/amd/agesa/family14/romstage.c | 1 - src/lib/gnat/COPYING.RUNTIME | 1 - src/mainboard/asus/p5gc-mx/Makefile.inc | 1 - src/mainboard/elmex/pcm205400/buildOpts.c | 1 - src/mainboard/google/reef/variants/coral/mainboard.c | 1 - src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h | 1 - src/mainboard/intel/leafhill/Kconfig.name | 1 - src/mainboard/intel/minnow3/gpio.c | 1 - src/mainboard/lenovo/x1_carbon_gen1/mainboard.c | 1 - src/mainboard/pcengines/apu2/mainboard.c | 2 -- src/mainboard/purism/librem13v2/Makefile.inc | 1 - src/soc/intel/apollolake/xdci.c | 1 - src/soc/intel/cannonlake/bootblock/cpu.c | 1 - src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h | 1 - src/soc/intel/cannonlake/romstage/power_state.c | 1 - src/soc/intel/common/block/cse/Kconfig | 1 - src/soc/intel/common/block/include/intelblocks/msr.h | 1 - src/soc/intel/common/block/include/intelblocks/xhci.h | 1 - src/soc/intel/common/block/sata/Kconfig | 1 - src/soc/intel/common/block/smbus/Makefile.inc | 1 - 22 files changed, 23 deletions(-) diff --git a/.checkpatch.conf b/.checkpatch.conf index ad04d39c3b..62cc5d5b96 100644 --- a/.checkpatch.conf +++ b/.checkpatch.conf @@ -28,4 +28,3 @@ # Exclude the vendorcode directory --exclude src/vendorcode - diff --git a/src/arch/x86/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h index 1ca7618f14..01179121ec 100644 --- a/src/arch/x86/include/arch/pirq_routing.h +++ b/src/arch/x86/include/arch/pirq_routing.h @@ -63,4 +63,3 @@ unsigned long write_pirq_routing_table(unsigned long start); void pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]); #endif /* ARCH_PIRQ_ROUTING_H */ - diff --git a/src/cpu/amd/agesa/family14/romstage.c b/src/cpu/amd/agesa/family14/romstage.c index e89b2fc84c..23fa008ecf 100644 --- a/src/cpu/amd/agesa/family14/romstage.c +++ b/src/cpu/amd/agesa/family14/romstage.c @@ -75,4 +75,3 @@ void agesa_postcar(struct sysinfo *cb) post_code(0x62); } } - diff --git a/src/lib/gnat/COPYING.RUNTIME b/src/lib/gnat/COPYING.RUNTIME index e1b3c69c17..e86f7fb58a 100644 --- a/src/lib/gnat/COPYING.RUNTIME +++ b/src/lib/gnat/COPYING.RUNTIME @@ -70,4 +70,3 @@ consistent with the licensing of the Independent Modules. The availability of this Exception does not imply any general presumption that third-party software is unaffected by the copyleft requirements of the license of GCC. - diff --git a/src/mainboard/asus/p5gc-mx/Makefile.inc b/src/mainboard/asus/p5gc-mx/Makefile.inc index 9aac7e2468..f3d7e76263 100644 --- a/src/mainboard/asus/p5gc-mx/Makefile.inc +++ b/src/mainboard/asus/p5gc-mx/Makefile.inc @@ -1,3 +1,2 @@ ramstage-y += cstates.c romstage-y += gpio.c - diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c index fe4e779626..eb6cf33fa4 100644 --- a/src/mainboard/elmex/pcm205400/buildOpts.c +++ b/src/mainboard/elmex/pcm205400/buildOpts.c @@ -294,4 +294,3 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] = // Instantiate all solution relevant data. #include "PlatformInstall.h" - diff --git a/src/mainboard/google/reef/variants/coral/mainboard.c b/src/mainboard/google/reef/variants/coral/mainboard.c index 41a8056542..54c24f8c43 100644 --- a/src/mainboard/google/reef/variants/coral/mainboard.c +++ b/src/mainboard/google/reef/variants/coral/mainboard.c @@ -29,4 +29,3 @@ void variant_nhlt_oem_overrides(const char **oem_id, *oem_table_id = CONFIG_VARIANT_DIR; *oem_revision = variant_board_sku(); } - diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h index 7a8314ee4f..2233339bc1 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h @@ -218,4 +218,3 @@ static const struct pad_config early_gpio_table[] = { #endif #endif - diff --git a/src/mainboard/intel/leafhill/Kconfig.name b/src/mainboard/intel/leafhill/Kconfig.name index 391203c594..bff60da3b6 100644 --- a/src/mainboard/intel/leafhill/Kconfig.name +++ b/src/mainboard/intel/leafhill/Kconfig.name @@ -1,3 +1,2 @@ config BOARD_INTEL_LEAFHILL bool "Leafhill" - diff --git a/src/mainboard/intel/minnow3/gpio.c b/src/mainboard/intel/minnow3/gpio.c index 4e8f926afa..330a24258b 100644 --- a/src/mainboard/intel/minnow3/gpio.c +++ b/src/mainboard/intel/minnow3/gpio.c @@ -348,4 +348,3 @@ const struct pad_config *sleep_gpio_table(size_t *num) *num = ARRAY_SIZE(sleep_gpio_table_config); return sleep_gpio_table_config; } - diff --git a/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c b/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c index a61f12c41a..a4f2b38c8e 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c @@ -34,4 +34,3 @@ struct chip_operations mainboard_ops = { void h8_mainboard_init_dock (void) { } - diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c index f82ed50201..a9b59c2316 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -231,5 +231,3 @@ const char *smbios_mainboard_sku(void) struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, }; - - diff --git a/src/mainboard/purism/librem13v2/Makefile.inc b/src/mainboard/purism/librem13v2/Makefile.inc index eb01360863..5a7131f1ba 100644 --- a/src/mainboard/purism/librem13v2/Makefile.inc +++ b/src/mainboard/purism/librem13v2/Makefile.inc @@ -18,4 +18,3 @@ romstage-y += pei_data.c ramstage-y += pei_data.c ramstage-y += ramstage.c ramstage-y += hda_verb.c - diff --git a/src/soc/intel/apollolake/xdci.c b/src/soc/intel/apollolake/xdci.c index 2578fa0f5b..4c3047c41b 100644 --- a/src/soc/intel/apollolake/xdci.c +++ b/src/soc/intel/apollolake/xdci.c @@ -89,4 +89,3 @@ void soc_xdci_init(struct device *dev) { configure_host_mode_port0(dev); } - diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c index 5b336da497..3ebe1e48e6 100644 --- a/src/soc/intel/cannonlake/bootblock/cpu.c +++ b/src/soc/intel/cannonlake/bootblock/cpu.c @@ -25,4 +25,3 @@ void bootblock_cpu_init(void) IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) fast_spi_cache_bios_region(); } - diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h index cdc40d4216..e9a5b89491 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h @@ -249,4 +249,3 @@ #define NUM_GPIO_COM2_PADS (GPD11 - GPD0 + 1) #endif - diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c index 2c98a9e5ac..2c45ad9354 100644 --- a/src/soc/intel/cannonlake/romstage/power_state.c +++ b/src/soc/intel/cannonlake/romstage/power_state.c @@ -29,4 +29,3 @@ struct chipset_power_state *fill_power_state(void) return ps; } - diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 441ff93cd7..321d34ce61 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -4,4 +4,3 @@ config SOC_INTEL_COMMON_BLOCK_CSE help Driver for communication with Converged Security Engine (CSE) over Host Embedded Controller Interface (HECI) - diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 1025c28e92..55d0bfd458 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -133,4 +133,3 @@ #define SGX_SUPPORTED (1<<2) #endif /* SOC_INTEL_COMMON_MSR_H */ - diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h index ea1f6828e8..32ae9a2a05 100644 --- a/src/soc/intel/common/block/include/intelblocks/xhci.h +++ b/src/soc/intel/common/block/include/intelblocks/xhci.h @@ -19,4 +19,3 @@ void soc_xhci_init(struct device *dev); #endif /* SOC_INTEL_COMMON_BLOCK_XHCI_H */ - diff --git a/src/soc/intel/common/block/sata/Kconfig b/src/soc/intel/common/block/sata/Kconfig index 89ca12ecde..6b24f595c4 100644 --- a/src/soc/intel/common/block/sata/Kconfig +++ b/src/soc/intel/common/block/sata/Kconfig @@ -2,4 +2,3 @@ config SOC_INTEL_COMMON_BLOCK_SATA bool help Intel Processor common SATA support - diff --git a/src/soc/intel/common/block/smbus/Makefile.inc b/src/soc/intel/common/block/smbus/Makefile.inc index e33f37f9af..1a10fd9735 100644 --- a/src/soc/intel/common/block/smbus/Makefile.inc +++ b/src/soc/intel/common/block/smbus/Makefile.inc @@ -6,4 +6,3 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus.c -